# LoongArch LSX/LASX 向量指令详细参考

> 本文档由 `generate_lsx_lasx_docs.py` 从 `lsx_lasx.json` 自动生成

## 概述

LoongArch 架构提供两种向量扩展：

| 扩展 | 位宽 | 类型 | 寄存器 | 条目数 | 性能覆盖 |
|------|------|------|--------|--------|----------|
| **LSX** | 128-bit | `__m128`, `__m128i`, `__m128d` | vr0-vr31 | 723 | 702 |
| **LASX** | 256-bit | `__m256`, `__m256i`, `__m256d` | xr0-xr31 | 744 | 723 |

### 数据类型对应

| C 类型 | LSX | LASX | 说明 |
|--------|-----|------|------|
| 8-bit 整数 | `__m128i` (16个) | `__m256i` (32个) | int8_t / uint8_t |
| 16-bit 整数 | `__m128i` (8个) | `__m256i` (16个) | int16_t / uint16_t |
| 32-bit 整数 | `__m128i` (4个) | `__m256i` (8个) | int32_t / uint32_t |
| 64-bit 整数 | `__m128i` (2个) | `__m256i` (4个) | int64_t / uint64_t |
| 单精度浮点 | `__m128` (4个) | `__m256` (8个) | float |
| 双精度浮点 | `__m128d` (2个) | `__m256d` (4个) | double |

### 统计

- 总条目数: 1467
- 带延迟/IPC 的条目: 1425
- 缺少性能数据的条目: 42

### 分类统计

| 分类 | 数量 |
|------|------|
| Integer Computation | 476 |
| Shift | 280 |
| Misc | 195 |
| Floating Point Comparison | 88 |
| Floating Point Conversion | 84 |
| Integer Comparison | 80 |
| Bitwise Operations | 76 |
| Floating Point Computation | 56 |
| Floating Point Misc | 24 |
| Memory Load & Store | 24 |
| Branch | 20 |
| Logical | 20 |
| Fused Multiply-Add | 16 |
| Shuffling | 16 |
| Undocumented Intrinsics | 7 |
| Permutation | 5 |

---

# LSX 指令集

## Bitwise Operations

### `__m128i __lsx_vbitclr_b (__m128i a, __m128i b)`

**汇编指令**: `vbitclr.b vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclr_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitclr.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Clear the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclr_b(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0xf7f7f7f7f7f7f7f7 0x99aabbccd5ecf700
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] & (~((u8)1 << (b.byte[i] % 8)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclr_d (__m128i a, __m128i b)`

**汇编指令**: `vbitclr.d vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclr_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitclr.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Clear the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclr_d(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0xfffff7ffffffffff 0x99aabbccddeeff00
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] & (~((u64)1 << (b.dword[i] % 64)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclr_h (__m128i a, __m128i b)`

**汇编指令**: `vbitclr.h vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclr_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitclr.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Clear the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclr_h(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0xf7fff7fff7fff7ff 0x99aabbccddecff00
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] & (~((u16)1 << (b.half[i] % 16)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclr_w (__m128i a, __m128i b)`

**汇编指令**: `vbitclr.w vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclr_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitclr.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Clear the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclr_w(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0xfffff7fffffff7ff 0x99aabbccddeeff00
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] & (~((u32)1 << (b.word[i] % 32)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vbitclri.b vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vbitclri.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Clear the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclri_b(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, 1)
= 0xfdfdfdfdfdfdfdfd 0x99a8b9ccddecfd00
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] & (~((u8)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vbitclri.d vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vbitclri.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Clear the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclri_d(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, 1)
= 0xfffffffffffffffd 0x99aabbccddeeff00
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] & (~((u64)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vbitclri.h vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vbitclri.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Clear the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclri_h(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, 1)
= 0xfffdfffdfffdfffd 0x99a8bbccddecff00
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] & (~((u16)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vbitclri.w vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vbitclri.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Clear the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitclri_w(__m128i{0xffffffffffffffff, 0x99aabbccddeeff00}, 1)
= 0xfffffffdfffffffd 0x99aabbccddeeff00
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] & (~((u32)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrev_b (__m128i a, __m128i b)`

**汇编指令**: `vbitrev.b vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrev_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitrev.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Toggle the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrev_b(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0707070707070707 0x9dbabfdcd5ecf702
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] ^ ((u8)1 << (b.byte[i] % 8));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrev_d (__m128i a, __m128i b)`

**汇编指令**: `vbitrev.d vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrev_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitrev.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Toggle the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrev_d(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0f0f070f0f0f0f0f 0x99aabbceddeeff00
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] ^ ((u64)1 << (b.dword[i] % 64));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrev_h (__m128i a, __m128i b)`

**汇编指令**: `vbitrev.h vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrev_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitrev.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Toggle the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrev_h(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x070f070f070f070f 0x99babbdcddecff02
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] ^ ((u16)1 << (b.half[i] % 16));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrev_w (__m128i a, __m128i b)`

**汇编指令**: `vbitrev.w vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrev_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitrev.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Toggle the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrev_w(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0f0f070f0f0f070f 0x99babbccddeeff02
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] ^ ((u32)1 << (b.word[i] % 32));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vbitrevi.b vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vbitrevi.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Toggle the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrevi_b(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, 1)
= 0x0d0d0d0d0d0d0d0d 0x9ba8b9cedfecfd02
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] ^ ((u8)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vbitrevi.d vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vbitrevi.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Toggle the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrevi_d(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, 1)
= 0x0f0f0f0f0f0f0f0d 0x99aabbccddeeff02
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] ^ ((u64)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vbitrevi.h vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vbitrevi.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Toggle the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrevi_h(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, 1)
= 0x0f0d0f0d0f0d0f0d 0x99a8bbceddecff02
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] ^ ((u16)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vbitrevi.w vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vbitrevi.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Toggle the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitrevi_w(__m128i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00}, 1)
= 0x0f0f0f0d0f0f0f0d 0x99aabbceddeeff02
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] ^ ((u32)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vbitsel.v vr, vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vbitsel.v vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise selection: for each bit position, if the bit in `c` equals to one, copy the bit from `b` to `dst`, otherwise copy from `a`.

#### Examples

```c++
__m128i __lsx_vbitsel_v(__m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321}, __m128i{0xffff0000aaaabbbb, 0x1111222233334444})
= 0xabab3344ffeeefab 0x98ba9beccfedfb00
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (c.dword[i] & b.dword[i]) | (~c.dword[i] & a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vbitseli.b vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vbitseli.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute bitwise selection: for each bit position, if the bit in `a` equals to one, copy the bit from `imm` to `dst`, otherwise copy from `b`.

#### Examples

```c++
__m128i __lsx_vbitseli_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321}, 0x12)
= 0xba8b9aabba8b9a23 0x1216123012031221
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (~a.byte[i] & b.byte[i]) | (a.byte[i] & (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vbitset_b (__m128i a, __m128i b)`

**汇编指令**: `vbitset.b vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitset_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitset.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Set the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitset_b(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0808080808080808 0x9dbabfdcddeeff02
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] | ((u8)1 << (b.byte[i] % 8));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitset_d (__m128i a, __m128i b)`

**汇编指令**: `vbitset.d vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitset_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitset.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Set the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitset_d(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0000080000000000 0x99aabbceddeeff00
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] | ((u64)1 << (b.dword[i] % 64));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitset_h (__m128i a, __m128i b)`

**汇编指令**: `vbitset.h vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitset_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitset.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Set the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitset_h(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0800080008000800 0x99babbdcddeeff02
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] | ((u16)1 << (b.half[i] % 16));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitset_w (__m128i a, __m128i b)`

**汇编指令**: `vbitset.w vr, vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitset_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vbitset.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Set the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitset_w(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, __m128i{0xabababababababab, 0x1234123443214321})
= 0x0000080000000800 0x99babbccddeeff02
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] | ((u32)1 << (b.word[i] % 32));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vbitseti.b vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vbitseti.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Set the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitseti_b(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, 1)
= 0x0202020202020202 0x9baabbcedfeeff02
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] | ((u8)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vbitseti.d vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vbitseti.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Set the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitseti_d(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, 1)
= 0x0000000000000002 0x99aabbccddeeff02
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] | ((u64)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vbitseti.h vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vbitseti.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Set the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitseti_h(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, 1)
= 0x0002000200020002 0x99aabbceddeeff02
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] | ((u16)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vbitseti.w vr, vr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vbitseti.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Set the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m128i __lsx_vbitseti_w(__m128i{0x0000000000000000, 0x99aabbccddeeff00}, 1)
= 0x0000000200000002 0x99aabbceddeeff02
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] | ((u32)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vclo_b (__m128i a)`

**汇编指令**: `vclo.b vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclo_b (__m128i a)
#include <lsxintrin.h>
Instruction: vclo.b vr, vr
CPU Flags: LSX
```

#### Description

Count leading ones of 8-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclo_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000001 0x0101010202030800
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = clo(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclo_d (__m128i a)`

**汇编指令**: `vclo.d vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclo_d (__m128i a)
#include <lsxintrin.h>
Instruction: vclo.d vr, vr
CPU Flags: LSX
```

#### Description

Count leading ones of 64-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclo_d(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000000 0x0000000000000001
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = clo(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclo_h (__m128i a)`

**汇编指令**: `vclo.h vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclo_h (__m128i a)
#include <lsxintrin.h>
Instruction: vclo.h vr, vr
CPU Flags: LSX
```

#### Description

Count leading ones of 16-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclo_h(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000000 0x0001000100020008
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = clo(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclo_w (__m128i a)`

**汇编指令**: `vclo.w vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclo_w (__m128i a)
#include <lsxintrin.h>
Instruction: vclo.w vr, vr
CPU Flags: LSX
```

#### Description

Count leading ones of 32-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclo_w(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000000 0x0000000100000002
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = clo(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclz_b (__m128i a)`

**汇编指令**: `vclz.b vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclz_b (__m128i a)
#include <lsxintrin.h>
Instruction: vclz.b vr, vr
CPU Flags: LSX
```

#### Description

Count leading zeros of 8-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclz_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0302020101010100 0x0000000000000008
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = clz(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclz_d (__m128i a)`

**汇编指令**: `vclz.d vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclz_d (__m128i a)
#include <lsxintrin.h>
Instruction: vclz.d vr, vr
CPU Flags: LSX
```

#### Description

Count leading zeros of 64-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclz_d(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000003 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = clz(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclz_h (__m128i a)`

**汇编指令**: `vclz.h vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclz_h (__m128i a)
#include <lsxintrin.h>
Instruction: vclz.h vr, vr
CPU Flags: LSX
```

#### Description

Count leading zeros of 16-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclz_h(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0003000200010001 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = clz(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vclz_w (__m128i a)`

**汇编指令**: `vclz.w vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vclz_w (__m128i a)
#include <lsxintrin.h>
Instruction: vclz.w vr, vr
CPU Flags: LSX
```

#### Description

Count leading zeros of 32-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vclz_w(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000300000001 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = clz(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpcnt_b (__m128i a)`

**汇编指令**: `vpcnt.b vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpcnt_b (__m128i a)
#include <lsxintrin.h>
Instruction: vpcnt.b vr, vr
CPU Flags: LSX
```

#### Description

Count the number of ones (population, popcount) in 8-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vpcnt_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0202040204040602 0x0404060406060800
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = popcount(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vpcnt_d (__m128i a)`

**汇编指令**: `vpcnt.d vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpcnt_d (__m128i a)
#include <lsxintrin.h>
Instruction: vpcnt.d vr, vr
CPU Flags: LSX
```

#### Description

Count the number of ones (population, popcount) in 64-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vpcnt_d(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x000000000000001a 0x0000000000000026
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = popcount(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vpcnt_h (__m128i a)`

**汇编指令**: `vpcnt.h vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpcnt_h (__m128i a)
#include <lsxintrin.h>
Instruction: vpcnt.h vr, vr
CPU Flags: LSX
```

#### Description

Count the number of ones (population, popcount) in 16-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vpcnt_h(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0004000600080008 0x0008000a000c0008
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = popcount(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vpcnt_w (__m128i a)`

**汇编指令**: `vpcnt.w vr, vr`  
**分类**: `Bitwise Operations`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpcnt_w (__m128i a)
#include <lsxintrin.h>
Instruction: vpcnt.w vr, vr
CPU Flags: LSX
```

#### Description

Count the number of ones (population, popcount) in 32-bit elements in `a`.

#### Examples

```c++
__m128i __lsx_vpcnt_w(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000a00000010 0x0000001200000014
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = popcount(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

## Branch

### `int __lsx_bnz_b (__m128i a)`

**汇编指令**: `vsetallnez.b fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bnz_b (__m128i a)
#include <lsxintrin.h>
Instruction: vsetallnez.b fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if all 8-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 16; i++) {
  if (a.byte[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bnz_d (__m128i a)`

**汇编指令**: `vsetallnez.d fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bnz_d (__m128i a)
#include <lsxintrin.h>
Instruction: vsetallnez.d fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if all 64-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 2; i++) {
  if (a.dword[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bnz_h (__m128i a)`

**汇编指令**: `vsetallnez.h fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bnz_h (__m128i a)
#include <lsxintrin.h>
Instruction: vsetallnez.h fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if all 16-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 8; i++) {
  if (a.half[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bnz_v (__m128i a)`

**汇编指令**: `vsetnez.v fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bnz_v (__m128i a)
#include <lsxintrin.h>
Instruction: vsetnez.v fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if the whole vector `a` is non-zero.

#### Operation

```c++
dst = a.qword[0] != 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bnz_w (__m128i a)`

**汇编指令**: `vsetallnez.w fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bnz_w (__m128i a)
#include <lsxintrin.h>
Instruction: vsetallnez.w fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if all 32-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 4; i++) {
  if (a.word[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bz_b (__m128i a)`

**汇编指令**: `vsetanyeqz.b fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bz_b (__m128i a)
#include <lsxintrin.h>
Instruction: vsetanyeqz.b fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if any 8-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 16; i++) {
  if (a.byte[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bz_d (__m128i a)`

**汇编指令**: `vsetanyeqz.d fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bz_d (__m128i a)
#include <lsxintrin.h>
Instruction: vsetanyeqz.d fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if any 64-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 2; i++) {
  if (a.dword[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bz_h (__m128i a)`

**汇编指令**: `vsetanyeqz.h fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bz_h (__m128i a)
#include <lsxintrin.h>
Instruction: vsetanyeqz.h fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if any 16-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 8; i++) {
  if (a.half[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bz_v (__m128i a)`

**汇编指令**: `vseteqz.v fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bz_v (__m128i a)
#include <lsxintrin.h>
Instruction: vseteqz.v fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if the whole vector `a` equals to zero.

#### Operation

```c++
dst = a.qword[0] == 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `int __lsx_bz_w (__m128i a)`

**汇编指令**: `vsetanyeqz.w fcc, vr; bcnez`  
**分类**: `Branch`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_bz_w (__m128i a)
#include <lsxintrin.h>
Instruction: vsetanyeqz.w fcc, vr; bcnez
CPU Flags: LSX
```

#### Description

Expected to be used in branches: branch if any 32-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 4; i++) {
  if (a.word[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

## Floating Point Comparison

### `__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.caf.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.caf.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_caf(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.caf.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.caf.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_caf(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.ceq.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.ceq.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_ceq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.ceq.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.ceq.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_ceq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cle.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cle.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cle(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cle.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cle.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cle(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.clt.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.clt.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_clt(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.clt.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.clt.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_clt(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cne.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cne.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cne(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cne.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cne.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cne(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cor.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cor.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cor(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cor.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cor.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cor(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cueq.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cueq.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cueq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cueq.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cueq.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cueq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cule.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cule.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cule(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cule.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cule.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cule(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cult.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cult.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cult(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cult.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cult.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cult(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cun.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cun.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cun(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cun.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cun.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cun(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.cune.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.cune.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_cune(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.cune.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.cune.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cune(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.saf.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.saf.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_saf(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.saf.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.saf.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_saf(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.seq.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.seq.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_seq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.seq.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.seq.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_seq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sle.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sle.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sle(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sle.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sle.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sle(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.slt.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.slt.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_slt(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.slt.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.slt.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_slt(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sne.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sne.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sne(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sne.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sne.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sne(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sor.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sor.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sor(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sor.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sor.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sor(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sueq.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sueq.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sueq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sueq.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sueq.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sueq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sule.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sule.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sule(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sule.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sule.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sule(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sult.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sult.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sult(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sult.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sult.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sult(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sun.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sun.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sun(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sun.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sun.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sun(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b)`

**汇编指令**: `vfcmp.sune.d vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcmp.sune.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (fp_compare_sune(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b)`

**汇编指令**: `vfcmp.sune.s vr, vr, vr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcmp.sune.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sune(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

## Floating Point Computation

### `__m128 __lsx_vfadd_s (__m128 a, __m128 b)`

**汇编指令**: `vfadd.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfadd_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfadd.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Add single precision floating point elements in `a` to elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] + b.fp32[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfdiv_s (__m128 a, __m128 b)`

**汇编指令**: `vfdiv.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfdiv_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfdiv.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide single precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] / b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 19.5 | 0.13(1/7.5) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |
| 2K1000LA | LA264 | 12, 28 | 0.04(1/28) |
| 2K3000 | LA364E | 12, 28 | 0.04(1/28) |

---

### `__m128 __lsx_vflogb_s (__m128 a)`

**汇编指令**: `vflogb.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vflogb_s (__m128 a)
#include <lsxintrin.h>
Instruction: vflogb.s vr, vr
CPU Flags: LSX
```

#### Description

Compute 2-based logarithm of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = log2(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfmax_s (__m128 a, __m128 b)`

**汇编指令**: `vfmax.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmax_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfmax.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute maximum of single precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = fmax(a.fp32[i], b.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128 __lsx_vfmaxa_s (__m128 a, __m128 b)`

**汇编指令**: `vfmaxa.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmaxa_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfmaxa.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute maximum of single precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (abs(a.fp32[i]) > abs(b.fp32[i])) ? a.fp32[i] : b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128 __lsx_vfmin_s (__m128 a, __m128 b)`

**汇编指令**: `vfmin.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmin_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfmin.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute minimum of single precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = fmin(a.fp32[i], b.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128 __lsx_vfmina_s (__m128 a, __m128 b)`

**汇编指令**: `vfmina.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmina_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfmina.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute minimum of single precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (abs(a.fp32[i]) < abs(b.fp32[i])) ? a.fp32[i] : b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128 __lsx_vfmul_s (__m128 a, __m128 b)`

**汇编指令**: `vfmul.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmul_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfmul.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply single precision floating point elements in `a` and elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfrecip_s (__m128 a)`

**汇编指令**: `vfrecip.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrecip_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrecip.s vr, vr
CPU Flags: LSX
```

#### Description

Compute reciprocal of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = 1 / a.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 27 | 0.14(1/7) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 27 | 0.12(1/8.5) |
| 2K1000LA | LA264 | 28 | 0.04(1/28) |
| 2K3000 | LA364E | 28 | 0.04(1/28) |

---

### `__m128 __lsx_vfrecipe_s (__m128 a)`

**汇编指令**: `vfrecipe.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrecipe_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrecipe.s vr, vr
CPU Flags: LSX
```

#### Description

Compute estimated reciprocal of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = 1 / a.fp32[i]; // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m128 __lsx_vfrsqrt_s (__m128 a)`

**汇编指令**: `vfrsqrt.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrsqrt_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrsqrt.s vr, vr
CPU Flags: LSX
```

#### Description

Compute reciprocal of square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = 1.0 / sqrt(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 21 | 0.11(1/9) |
| 3A6000 | LA664 | 17 | 0.05(1/19) |
| 3C6000 | LA664 | 21 | 0.11(1/9.5) |
| 2K1000LA | LA264 | 26 | 0(1/62) |
| 2K3000 | LA364E | 26 | 0(1/62) |

---

### `__m128 __lsx_vfrsqrte_s (__m128 a)`

**汇编指令**: `vfrsqrte.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrsqrte_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrsqrte.s vr, vr
CPU Flags: LSX
```

#### Description

Compute estimated reciprocal of square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = 1.0 / sqrt(a.fp32[i]); // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m128 __lsx_vfsqrt_s (__m128 a)`

**汇编指令**: `vfsqrt.s vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfsqrt_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfsqrt.s vr, vr
CPU Flags: LSX
```

#### Description

Compute square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = sqrt(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 27 | 0.17(1/6) |
| 3A6000 | LA664 | 11 | 0.08(1/12) |
| 3C6000 | LA664 | 25 | 0.09(1/11.5) |
| 2K1000LA | LA264 | 16 | 0.03(1/40) |
| 2K3000 | LA364E | 28 | 0.03(1/40) |

---

### `__m128 __lsx_vfsub_s (__m128 a, __m128 b)`

**汇编指令**: `vfsub.s vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfsub_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfsub.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract single precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] - b.fp32[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfadd_d (__m128d a, __m128d b)`

**汇编指令**: `vfadd.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfadd_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfadd.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add double precision floating point elements in `a` to elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] + b.fp64[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfdiv_d (__m128d a, __m128d b)`

**汇编指令**: `vfdiv.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfdiv_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfdiv.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide double precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] / b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 16.5 | 0.08(1/12.5) |
| 3A6000 | LA664 | 8, 21.5 | 0.25(1/4) |
| 3C6000 | LA664 | 8, 16.5 | 0.33(1/3) |
| 2K1000LA | LA264 | 9, 24 | 0.04(1/24) |
| 2K3000 | LA364E | 9, 24 | 0.04(1/24) |

---

### `__m128d __lsx_vflogb_d (__m128d a)`

**汇编指令**: `vflogb.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vflogb_d (__m128d a)
#include <lsxintrin.h>
Instruction: vflogb.d vr, vr
CPU Flags: LSX
```

#### Description

Compute 2-based logarithm of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = log2(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfmax_d (__m128d a, __m128d b)`

**汇编指令**: `vfmax.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmax_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfmax.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute maximum of double precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = fmax(a.fp64[i], b.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128d __lsx_vfmaxa_d (__m128d a, __m128d b)`

**汇编指令**: `vfmaxa.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmaxa_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfmaxa.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute maximum of double precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (abs(a.fp64[i]) > abs(b.fp64[i])) ? a.fp64[i] : b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128d __lsx_vfmin_d (__m128d a, __m128d b)`

**汇编指令**: `vfmin.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmin_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfmin.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute minimum of double precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = fmin(a.fp64[i], b.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128d __lsx_vfmina_d (__m128d a, __m128d b)`

**汇编指令**: `vfmina.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmina_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfmina.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute minimum of double precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (abs(a.fp64[i]) < abs(b.fp64[i])) ? a.fp64[i] : b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128d __lsx_vfmul_d (__m128d a, __m128d b)`

**汇编指令**: `vfmul.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmul_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfmul.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply double precision floating point elements in `a` and elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrecip_d (__m128d a)`

**汇编指令**: `vfrecip.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrecip_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrecip.d vr, vr
CPU Flags: LSX
```

#### Description

Compute reciprocal of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = 1 / a.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 23 | 0.08(1/12) |
| 3A6000 | LA664 | 8 | 0.25(1/4) |
| 3C6000 | LA664 | 23 | 0.1(1/10.5) |
| 2K1000LA | LA264 | 24 | 0.04(1/24) |
| 2K3000 | LA364E | 24 | 0.04(1/24) |

---

### `__m128d __lsx_vfrecipe_d (__m128d a)`

**汇编指令**: `vfrecipe.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrecipe_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrecipe.d vr, vr
CPU Flags: LSX
```

#### Description

Compute estimated reciprocal of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = 1 / a.fp64[i]; // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m128d __lsx_vfrsqrt_d (__m128d a)`

**汇编指令**: `vfrsqrt.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrsqrt_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrsqrt.d vr, vr
CPU Flags: LSX
```

#### Description

Compute reciprocal of square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = 1.0 / sqrt(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 15 | 0.04(1/27.5) |
| 3A6000 | LA664 | 15 | 0.04(1/26.5) |
| 3C6000 | LA664 | 15 | 0.04(1/26) |
| 2K1000LA | LA264 | 16 | 0(1/55) |
| 2K3000 | LA364E | 16 | 0(1/55) |

---

### `__m128d __lsx_vfrsqrte_d (__m128d a)`

**汇编指令**: `vfrsqrte.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrsqrte_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrsqrte.d vr, vr
CPU Flags: LSX
```

#### Description

Compute estimated reciprocal of square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = 1.0 / sqrt(a.fp64[i]); // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m128d __lsx_vfsqrt_d (__m128d a)`

**汇编指令**: `vfsqrt.d vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfsqrt_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfsqrt.d vr, vr
CPU Flags: LSX
```

#### Description

Compute square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = sqrt(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 36 | 0.05(1/18.5) |
| 3A6000 | LA664 | 36 | 0.06(1/17.5) |
| 3C6000 | LA664 | 36 | 0.06(1/17) |
| 2K1000LA | LA264 | 11 | 0.03(1/37) |
| 2K3000 | LA364E | 11 | 0.03(1/37) |

---

### `__m128d __lsx_vfsub_d (__m128d a, __m128d b)`

**汇编指令**: `vfsub.d vr, vr, vr`  
**分类**: `Floating Point Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfsub_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfsub.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract double precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] - b.fp64[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

## Floating Point Conversion

### `__m128 __lsx_vfcvt_s_d (__m128d a, __m128d b)`

**汇编指令**: `vfcvt.s.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfcvt_s_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcvt.s.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double precision floating point elements in `a` and `b` to single precision.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.fp32[i] = b.fp64[i];
}
for (; i < 4; i++) {
  dst.fp32[i] = a.fp64[i - 2];
}

// Expands to:

if (0) {
  dst.fp32[0] = b.fp64[0];
  dst.fp32[1] = b.fp64[1];
  dst.fp32[2] = a.fp64[0];
  dst.fp32[3] = a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128 __lsx_vfcvth_s_h (__m128i a)`

**汇编指令**: `vfcvth.s.h vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfcvth_s_h (__m128i a)
#include <lsxintrin.h>
Instruction: vfcvth.s.h vr, vr
CPU Flags: LSX
```

#### Description

Convert half precision floating point elements in higher half of `a` to single precision.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp16[i + 4];
}

// Expands to:

if (0) {
  dst.fp32[0] = a.fp16[4];
  dst.fp32[1] = a.fp16[5];
  dst.fp32[2] = a.fp16[6];
  dst.fp32[3] = a.fp16[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128 __lsx_vfcvtl_s_h (__m128i a)`

**汇编指令**: `vfcvtl.s.h vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfcvtl_s_h (__m128i a)
#include <lsxintrin.h>
Instruction: vfcvtl.s.h vr, vr
CPU Flags: LSX
```

#### Description

Convert half precision floating point elements in lower half of `a` to single precision.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp16[i];
}

// Expands to:

if (0) {
  dst.fp32[0] = a.fp16[0];
  dst.fp32[1] = a.fp16[1];
  dst.fp32[2] = a.fp16[2];
  dst.fp32[3] = a.fp16[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128 __lsx_vffint_s_l (__m128i a, __m128i b)`

**汇编指令**: `vffint.s.l vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vffint_s_l (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vffint.s.l vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert 64-bit integer elements in `a` and `b` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] =
      (i < 2) ? (f32)(s32)a.dword[i]
              : (f32)(s32)b.dword[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128 __lsx_vffint_s_w (__m128i a)`

**汇编指令**: `vffint.s.w vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vffint_s_w (__m128i a)
#include <lsxintrin.h>
Instruction: vffint.s.w vr, vr
CPU Flags: LSX
```

#### Description

Convert signed 32-bit integer elements in `a` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (f32)(s32)a.word[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vffint_s_wu (__m128i a)`

**汇编指令**: `vffint.s.wu vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vffint_s_wu (__m128i a)
#include <lsxintrin.h>
Instruction: vffint.s.wu vr, vr
CPU Flags: LSX
```

#### Description

Convert unsigned 32-bit integer elements in `a` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (f32)(u32)a.word[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfcvth_d_s (__m128 a)`

**汇编指令**: `vfcvth.d.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfcvth_d_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfcvth.d.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single precision floating point elements in higher half of `a` to double precision.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp32[i + 2];
}

// Expands to:

if (0) {
  dst.fp64[0] = a.fp32[2];
  dst.fp64[1] = a.fp32[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128d __lsx_vfcvtl_d_s (__m128 a)`

**汇编指令**: `vfcvtl.d.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfcvtl_d_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfcvtl.d.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single precision floating point elements in lower half of `a` to double precision.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp32[i];
}

// Expands to:

if (0) {
  dst.fp64[0] = a.fp32[0];
  dst.fp64[1] = a.fp32[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128d __lsx_vffint_d_l (__m128i a)`

**汇编指令**: `vffint.d.l vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vffint_d_l (__m128i a)
#include <lsxintrin.h>
Instruction: vffint.d.l vr, vr
CPU Flags: LSX
```

#### Description

Convert signed 64-bit integer elements in `a` to double-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(s64)a.dword[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vffint_d_lu (__m128i a)`

**汇编指令**: `vffint.d.lu vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vffint_d_lu (__m128i a)
#include <lsxintrin.h>
Instruction: vffint.d.lu vr, vr
CPU Flags: LSX
```

#### Description

Convert unsigned 64-bit integer elements in `a` to double-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(u64)a.dword[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vffinth_d_w (__m128i a)`

**汇编指令**: `vffinth.d.w vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vffinth_d_w (__m128i a)
#include <lsxintrin.h>
Instruction: vffinth.d.w vr, vr
CPU Flags: LSX
```

#### Description

Convert 32-bit integer elements in higher part of `a` to double precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i + 2]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128d __lsx_vffintl_d_w (__m128i a)`

**汇编指令**: `vffintl.d.w vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vffintl_d_w (__m128i a)
#include <lsxintrin.h>
Instruction: vffintl.d.w vr, vr
CPU Flags: LSX
```

#### Description

Convert 32-bit integer elements in lower part of `a` to double precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vfcvt_h_s (__m128 a, __m128 b)`

**汇编指令**: `vfcvt.h.s vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfcvt_h_s (__m128 a, __m128 b)
#include <lsxintrin.h>
Instruction: vfcvt.h.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert single precision floating point elements in `a` and `b` to half precision.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.fp16[i] = b.fp32[i];
}
for (; i < 8; i++) {
  dst.fp16[i] = a.fp32[i - 4];
}

// Expands to:

if (0) {
  dst.fp16[0] = b.fp32[0];
  dst.fp16[1] = b.fp32[1];
  dst.fp16[2] = b.fp32[2];
  dst.fp16[3] = b.fp32[3];
  dst.fp16[4] = a.fp32[0];
  dst.fp16[5] = a.fp32[1];
  dst.fp16[6] = a.fp32[2];
  dst.fp16[7] = a.fp32[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vftint_l_d (__m128d a)`

**汇编指令**: `vftint.l.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftint_l_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftint.l.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftint_lu_d (__m128d a)`

**汇编指令**: `vftint.lu.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftint_lu_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftint.lu.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to unsigned 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftint_w_d (__m128d a, __m128d b)`

**汇编指令**: `vftint.w.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftint_w_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vftint.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftint_w_s (__m128 a)`

**汇编指令**: `vftint.w.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftint_w_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftint.w.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftint_wu_s (__m128 a)`

**汇编指令**: `vftint.wu.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftint_wu_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftint.wu.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to unsigned 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftinth_l_s (__m128 a)`

**汇编指令**: `vftinth.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftinth_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftinth.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintl_l_s (__m128 a)`

**汇编指令**: `vftintl.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintl_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintl.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrm_l_d (__m128d a)`

**汇编指令**: `vftintrm.l.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrm_l_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftintrm.l.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrm_w_d (__m128d a, __m128d b)`

**汇编指令**: `vftintrm.w.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrm_w_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vftintrm.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrm_w_s (__m128 a)`

**汇编指令**: `vftintrm.w.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrm_w_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrm.w.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrmh_l_s (__m128 a)`

**汇编指令**: `vftintrmh.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrmh_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrmh.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrml_l_s (__m128 a)`

**汇编指令**: `vftintrml.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrml_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrml.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrne_l_d (__m128d a)`

**汇编指令**: `vftintrne.l.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrne_l_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftintrne.l.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrne_w_d (__m128d a, __m128d b)`

**汇编指令**: `vftintrne.w.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrne_w_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vftintrne.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrne_w_s (__m128 a)`

**汇编指令**: `vftintrne.w.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrne_w_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrne.w.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrneh_l_s (__m128 a)`

**汇编指令**: `vftintrneh.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrneh_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrneh.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrnel_l_s (__m128 a)`

**汇编指令**: `vftintrnel.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrnel_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrnel.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrp_l_d (__m128d a)`

**汇编指令**: `vftintrp.l.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrp_l_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftintrp.l.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrp_w_d (__m128d a, __m128d b)`

**汇编指令**: `vftintrp.w.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrp_w_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vftintrp.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrp_w_s (__m128 a)`

**汇编指令**: `vftintrp.w.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrp_w_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrp.w.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrph_l_s (__m128 a)`

**汇编指令**: `vftintrph.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrph_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrph.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrpl_l_s (__m128 a)`

**汇编指令**: `vftintrpl.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrpl_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrpl.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrz_l_d (__m128d a)`

**汇编指令**: `vftintrz.l.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrz_l_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftintrz.l.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrz_lu_d (__m128d a)`

**汇编指令**: `vftintrz.lu.d vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrz_lu_d (__m128d a)
#include <lsxintrin.h>
Instruction: vftintrz.lu.d vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` to unsigned 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrz_w_d (__m128d a, __m128d b)`

**汇编指令**: `vftintrz.w.d vr, vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrz_w_d (__m128d a, __m128d b)
#include <lsxintrin.h>
Instruction: vftintrz.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrz_w_s (__m128 a)`

**汇编指令**: `vftintrz.w.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrz_w_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrz.w.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrz_wu_s (__m128 a)`

**汇编指令**: `vftintrz.wu.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrz_wu_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrz.wu.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in `a` to unsigned 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vftintrzh_l_s (__m128 a)`

**汇编指令**: `vftintrzh.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrzh_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrzh.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

### `__m128i __lsx_vftintrzl_l_s (__m128 a)`

**汇编指令**: `vftintrzl.l.s vr, vr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vftintrzl_l_s (__m128 a)
#include <lsxintrin.h>
Instruction: vftintrzl.l.s vr, vr
CPU Flags: LSX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 5 | 0.5(1/2) |
| 2K3000 | LA364E | 5 | 0.5(1/2) |

---

## Floating Point Misc

### `__m128 __lsx_vfrint_s (__m128 a)`

**汇编指令**: `vfrint.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrint_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrint.s vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfrintrm_s (__m128 a)`

**汇编指令**: `vfrintrm.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrintrm_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrintrm.s vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfrintrne_s (__m128 a)`

**汇编指令**: `vfrintrne.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrintrne_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrintrne.s vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfrintrp_s (__m128 a)`

**汇编指令**: `vfrintrp.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrintrp_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrintrp.s vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfrintrz_s (__m128 a)`

**汇编指令**: `vfrintrz.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfrintrz_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfrintrz.s vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrint_d (__m128d a)`

**汇编指令**: `vfrint.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrint_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrint.d vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrintrm_d (__m128d a)`

**汇编指令**: `vfrintrm.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrintrm_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrintrm.d vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrintrne_d (__m128d a)`

**汇编指令**: `vfrintrne.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrintrne_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrintrne.d vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrintrp_d (__m128d a)`

**汇编指令**: `vfrintrp.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrintrp_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrintrp.d vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfrintrz_d (__m128d a)`

**汇编指令**: `vfrintrz.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfrintrz_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfrintrz.d vr, vr
CPU Flags: LSX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vfclass_d (__m128d a)`

**汇编指令**: `vfclass.d vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfclass_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfclass.d vr, vr
CPU Flags: LSX
```

#### Description

Classifiy each double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = fp_classify(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vfclass_s (__m128 a)`

**汇编指令**: `vfclass.s vr, vr`  
**分类**: `Floating Point Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfclass_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfclass.s vr, vr
CPU Flags: LSX
```

#### Description

Classifiy each single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = fp_classify(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

## Fused Multiply-Add

### `__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c)`

**汇编指令**: `vfmadd.s vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c)
#include <lsxintrin.h>
Instruction: vfmadd.s vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c)`

**汇编指令**: `vfmsub.s vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c)
#include <lsxintrin.h>
Instruction: vfmsub.s vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c)`

**汇编指令**: `vfnmadd.s vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c)
#include <lsxintrin.h>
Instruction: vfnmadd.s vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c)`

**汇编指令**: `vfnmsub.s vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c)
#include <lsxintrin.h>
Instruction: vfnmsub.s vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c)`

**汇编指令**: `vfmadd.d vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c)
#include <lsxintrin.h>
Instruction: vfmadd.d vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c)`

**汇编指令**: `vfmsub.d vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c)
#include <lsxintrin.h>
Instruction: vfmsub.d vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c)`

**汇编指令**: `vfnmadd.d vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c)
#include <lsxintrin.h>
Instruction: vfnmadd.d vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c)`

**汇编指令**: `vfnmsub.d vr, vr, vr, vr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c)
#include <lsxintrin.h>
Instruction: vfnmsub.d vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

## Integer Comparison

### `__m128i __lsx_vseq_b (__m128i a, __m128i b)`

**汇编指令**: `vseq.b vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseq_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vseq.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the 8-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (a.byte[i] == b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseq_d (__m128i a, __m128i b)`

**汇编指令**: `vseq.d vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseq_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vseq.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the 64-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (a.dword[i] == b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseq_h (__m128i a, __m128i b)`

**汇编指令**: `vseq.h vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseq_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vseq.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the 16-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (a.half[i] == b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseq_w (__m128i a, __m128i b)`

**汇编指令**: `vseq.w vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseq_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vseq.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the 32-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (a.word[i] == b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseqi_b (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vseqi.b vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseqi_b (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vseqi.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the 8-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] == imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseqi_d (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vseqi.d vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseqi_d (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vseqi.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the 64-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] == imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseqi_h (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vseqi.h vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseqi_h (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vseqi.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the 16-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] == imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vseqi_w (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vseqi.w vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vseqi_w (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vseqi.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the 32-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] == imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_b (__m128i a, __m128i b)`

**汇编指令**: `vsle.b vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] <= (s8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_bu (__m128i a, __m128i b)`

**汇编指令**: `vsle.bu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] <= (u8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_d (__m128i a, __m128i b)`

**汇编指令**: `vsle.d vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] <= (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsle_du (__m128i a, __m128i b)`

**汇编指令**: `vsle.du vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] <= (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsle_h (__m128i a, __m128i b)`

**汇编指令**: `vsle.h vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] <= (s16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_hu (__m128i a, __m128i b)`

**汇编指令**: `vsle.hu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] <= (u16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_w (__m128i a, __m128i b)`

**汇编指令**: `vsle.w vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] <= (s32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsle_wu (__m128i a, __m128i b)`

**汇编指令**: `vsle.wu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsle_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsle.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] <= (u32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_b (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslei.b vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_b (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslei.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] <= imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslei.bu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslei.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] <= imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_d (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslei.d vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_d (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslei.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] <= imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslei_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vslei.du vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslei.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] <= imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslei_h (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslei.h vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_h (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslei.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] <= imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslei.hu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslei.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] <= imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_w (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslei.w vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_w (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslei.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] <= imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslei_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslei.wu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslei_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslei.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] <= imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_b (__m128i a, __m128i b)`

**汇编指令**: `vslt.b vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_bu (__m128i a, __m128i b)`

**汇编指令**: `vslt.bu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_d (__m128i a, __m128i b)`

**汇编指令**: `vslt.d vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslt_du (__m128i a, __m128i b)`

**汇编指令**: `vslt.du vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslt_h (__m128i a, __m128i b)`

**汇编指令**: `vslt.h vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_hu (__m128i a, __m128i b)`

**汇编指令**: `vslt.hu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_w (__m128i a, __m128i b)`

**汇编指令**: `vslt.w vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslt_wu (__m128i a, __m128i b)`

**汇编指令**: `vslt.wu vr, vr, vr`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslt_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vslt.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_b (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslti.b vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_b (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslti.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] < imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslti.bu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslti.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] < imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_d (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslti.d vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_d (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslti.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] < imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslti_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vslti.du vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslti.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] < imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vslti_h (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslti.h vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_h (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslti.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] < imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslti.hu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslti.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] < imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_w (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vslti.w vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_w (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vslti.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] < imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslti_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vslti.wu vr, vr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslti_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslti.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] < imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

## Integer Computation

### `__m128i __lsx_vabsd_b (__m128i a, __m128i b)`

**汇编指令**: `vabsd.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] > (s8)b.byte[i]) ? (a.byte[i] - b.byte[i])
                                                : (b.byte[i] - a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_bu (__m128i a, __m128i b)`

**汇编指令**: `vabsd.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] > (u8)b.byte[i]) ? (a.byte[i] - b.byte[i])
                                                : (b.byte[i] - a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_d (__m128i a, __m128i b)`

**汇编指令**: `vabsd.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] > (s64)b.dword[i])
                     ? (a.dword[i] - b.dword[i])
                     : (b.dword[i] - a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_du (__m128i a, __m128i b)`

**汇编指令**: `vabsd.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] > (u64)b.dword[i])
                     ? (a.dword[i] - b.dword[i])
                     : (b.dword[i] - a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_h (__m128i a, __m128i b)`

**汇编指令**: `vabsd.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] > (s16)b.half[i]) ? (a.half[i] - b.half[i])
                                                  : (b.half[i] - a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_hu (__m128i a, __m128i b)`

**汇编指令**: `vabsd.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] > (u16)b.half[i]) ? (a.half[i] - b.half[i])
                                                  : (b.half[i] - a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_w (__m128i a, __m128i b)`

**汇编指令**: `vabsd.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] > (s32)b.word[i]) ? (a.word[i] - b.word[i])
                                                  : (b.word[i] - a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vabsd_wu (__m128i a, __m128i b)`

**汇编指令**: `vabsd.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vabsd_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vabsd.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute absolute difference of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] > (u32)b.word[i]) ? (a.word[i] - b.word[i])
                                                  : (b.word[i] - a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vadd_b (__m128i a, __m128i b)`

**汇编指令**: `vadd.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadd_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadd.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] + b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vadd_d (__m128i a, __m128i b)`

**汇编指令**: `vadd.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadd_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadd.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] + b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vadd_h (__m128i a, __m128i b)`

**汇编指令**: `vadd.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadd_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadd.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] + b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vadd_q (__m128i a, __m128i b)`

**汇编指令**: `vadd.q vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadd_q (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadd.q vr, vr, vr
CPU Flags: LSX
```

#### Description

Add 128-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
dst.qword[0] = a.qword[0] + b.qword[0];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vadd_w (__m128i a, __m128i b)`

**汇编指令**: `vadd.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadd_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadd.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] + b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vadda_b (__m128i a, __m128i b)`

**汇编指令**: `vadda.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadda_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadda.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add absolute of 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = abs((s8)a.byte[i]) + abs((s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vadda_d (__m128i a, __m128i b)`

**汇编指令**: `vadda.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadda_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadda.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add absolute of 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = abs((s64)a.dword[i]) + abs((s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vadda_h (__m128i a, __m128i b)`

**汇编指令**: `vadda.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadda_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadda.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add absolute of 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = abs((s16)a.half[i]) + abs((s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vadda_w (__m128i a, __m128i b)`

**汇编指令**: `vadda.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vadda_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vadda.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add absolute of 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = abs((s32)a.word[i]) + abs((s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vaddi.bu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vaddi.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Add 8-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vaddi.du vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vaddi.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Add 64-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vaddi.hu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vaddi.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Add 16-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vaddi.wu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vaddi.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Add 32-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) + ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) + ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) + ((u64)((u32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) + ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) + ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) + ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) + ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) + ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) + ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) + ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) + ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) + ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) + ((u16)((u8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) + ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) + ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) + ((u128)((u64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) + ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) + ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) + ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) + ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) + ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) + ((u32)((u16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)`

**汇编指令**: `vaddwev.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwev.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) + ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_d_w (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) + ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) + ((s64)((s32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((u64)((u32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_d_wu_w (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_d_wu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((s64)((s32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((s64)((s32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_h_b (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) + ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) + ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) + ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) + ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) + ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) + ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) + ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) + ((s16)((s8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((u16)((u8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_h_bu_b (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_h_bu_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((s16)((s8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((s16)((s8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((s16)((s8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((s16)((s8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((s16)((s8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((s16)((s8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((s16)((s8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((s16)((s8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_q_d (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) + ((s128)((s64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_q_du (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((u128)((u64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_q_du_d (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_q_du_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((s128)((s64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_w_h (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) + ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) + ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) + ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) + ((s32)((s16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((u32)((u16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vaddwod_w_hu_h (__m128i a, __m128i b)`

**汇编指令**: `vaddwod.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vaddwod_w_hu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vaddwod.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((s32)((s16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((s32)((s16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((s32)((s16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((s32)((s16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vavg_b (__m128i a, __m128i b)`

**汇编指令**: `vavg.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) +
                ((a.byte[i] & b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavg_bu (__m128i a, __m128i b)`

**汇编指令**: `vavg.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) +
                ((a.byte[i] & b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavg_d (__m128i a, __m128i b)`

**汇编指令**: `vavg.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
                 ((a.dword[i] & b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vavg_du (__m128i a, __m128i b)`

**汇编指令**: `vavg.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
                 ((a.dword[i] & b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vavg_h (__m128i a, __m128i b)`

**汇编指令**: `vavg.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
                ((a.half[i] & b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavg_hu (__m128i a, __m128i b)`

**汇编指令**: `vavg.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
                ((a.half[i] & b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavg_w (__m128i a, __m128i b)`

**汇编指令**: `vavg.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
                ((a.word[i] & b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavg_wu (__m128i a, __m128i b)`

**汇编指令**: `vavg.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavg_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavg.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
                ((a.word[i] & b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_b (__m128i a, __m128i b)`

**汇编指令**: `vavgr.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) +
                ((a.byte[i] | b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_bu (__m128i a, __m128i b)`

**汇编指令**: `vavgr.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) +
                ((a.byte[i] | b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_d (__m128i a, __m128i b)`

**汇编指令**: `vavgr.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
                 ((a.dword[i] | b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vavgr_du (__m128i a, __m128i b)`

**汇编指令**: `vavgr.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
                 ((a.dword[i] | b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vavgr_h (__m128i a, __m128i b)`

**汇编指令**: `vavgr.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
                ((a.half[i] | b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_hu (__m128i a, __m128i b)`

**汇编指令**: `vavgr.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
                ((a.half[i] | b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_w (__m128i a, __m128i b)`

**汇编指令**: `vavgr.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
                ((a.word[i] | b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vavgr_wu (__m128i a, __m128i b)`

**汇编指令**: `vavgr.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vavgr_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vavgr.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
                ((a.word[i] | b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vdiv_b (__m128i a, __m128i b)`

**汇编指令**: `vdiv.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide signed 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] / (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 32 | 0.06(1/17) |
| 3A6000 | LA664 | 29, 32 | 0.06(1/15.5) |
| 3C6000 | LA664 | 29, 32 | 0.07(1/13.5) |
| 2K1000LA | LA264 | 30, 58 | 0(1/55) |
| 2K3000 | LA364E | 30 | 0(1/55) |

---

### `__m128i __lsx_vdiv_bu (__m128i a, __m128i b)`

**汇编指令**: `vdiv.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide unsigned 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] / (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 36 | 0.06(1/18) |
| 3A6000 | LA664 | 29, 33 | 0.06(1/16.5) |
| 3C6000 | LA664 | 29, 36 | 0.07(1/13.5) |
| 2K1000LA | LA264 | 30, 44 | 0(1/55) |
| 2K3000 | LA364E | 30 | 0(1/55) |

---

### `__m128i __lsx_vdiv_d (__m128i a, __m128i b)`

**汇编指令**: `vdiv.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide signed 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] / (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 18.5 | 0.11(1/9) |
| 3A6000 | LA664 | 8 | 0.25(1/4) |
| 3C6000 | LA664 | 8, 18.5 | 0.33(1/3) |
| 2K1000LA | LA264 | 9, 19.5 | 0.08(1/12) |
| 2K3000 | LA364E | 9 | 0.08(1/12) |

---

### `__m128i __lsx_vdiv_du (__m128i a, __m128i b)`

**汇编指令**: `vdiv.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide unsigned 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] / (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 18.5 | 0.11(1/9) |
| 3A6000 | LA664 | 8 | 0.25(1/4) |
| 3C6000 | LA664 | 8, 18.5 | 0.33(1/3) |
| 2K1000LA | LA264 | 9 | 0.08(1/12) |
| 2K3000 | LA364E | 9 | 0.08(1/12) |

---

### `__m128i __lsx_vdiv_h (__m128i a, __m128i b)`

**汇编指令**: `vdiv.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide signed 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] / (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21.5 | 0.09(1/11) |
| 3A6000 | LA664 | 17 | 0.12(1/8.5) |
| 3C6000 | LA664 | 17, 21.5 | 0.13(1/7.5) |
| 2K1000LA | LA264 | 18, 36 | 0.03(1/31) |
| 2K3000 | LA364E | 18, 27 | 0.03(1/31) |

---

### `__m128i __lsx_vdiv_hu (__m128i a, __m128i b)`

**汇编指令**: `vdiv.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide unsigned 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] / (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21.5 | 0.07(1/14) |
| 3A6000 | LA664 | 17, 22 | 0.11(1/9) |
| 3C6000 | LA664 | 17, 21.5 | 0.13(1/7.5) |
| 2K1000LA | LA264 | 18, 27 | 0.03(1/31) |
| 2K3000 | LA364E | 18, 27 | 0.03(1/31) |

---

### `__m128i __lsx_vdiv_w (__m128i a, __m128i b)`

**汇编指令**: `vdiv.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide signed 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] / (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 17.5 | 0.09(1/11.5) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11, 17.5 | 0.22(1/4.5) |
| 2K1000LA | LA264 | 12, 25 | 0.06(1/18) |
| 2K3000 | LA364E | 12, 18.5 | 0.06(1/18) |

---

### `__m128i __lsx_vdiv_wu (__m128i a, __m128i b)`

**汇编指令**: `vdiv.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vdiv_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vdiv.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Divide unsigned 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] / (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 17.5 | 0.07(1/15) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11, 17.5 | 0.22(1/4.5) |
| 2K1000LA | LA264 | 12 | 0.06(1/18) |
| 2K3000 | LA364E | 12, 18.5 | 0.06(1/18) |

---

### `__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 32-bit elements in `a` to even-positioned signed 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[3])) + ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.du.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.du.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` to even-positioned unsigned 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((u64)((u32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 8-bit elements in `a` to even-positioned signed 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[3])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[5])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[7])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[9])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[11])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[13])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[15])) + ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.hu.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.hu.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` to even-positioned unsigned 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((u16)((u8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 64-bit elements in `a` to even-positioned signed 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) + ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.qu.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.qu.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` to even-positioned unsigned 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((u128)((u64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned signed 16-bit elements in `a` to even-positioned signed 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[3])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[5])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[7])) + ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b)`

**汇编指令**: `vhaddw.wu.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhaddw.wu.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` to even-positioned unsigned 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((u32)((u16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 32-bit elements in `a` by even-positioned signed 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) - ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[3])) - ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.du.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.du.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 32-bit elements in `a` by even-positioned unsigned 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) - ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[3])) - ((u64)((u32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 8-bit elements in `a` by even-positioned signed 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) - ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[3])) - ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[5])) - ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[7])) - ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[9])) - ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[11])) - ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[13])) - ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[15])) - ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.hu.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.hu.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 8-bit elements in `a` by even-positioned unsigned 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) - ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[3])) - ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[5])) - ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[7])) - ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[9])) - ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[11])) - ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[13])) - ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[15])) - ((u16)((u8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 64-bit elements in `a` by even-positioned signed 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) - ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.qu.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.qu.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 64-bit elements in `a` by even-positioned unsigned 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) - ((u128)((u64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 16-bit elements in `a` by even-positioned signed 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) - ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[3])) - ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[5])) - ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[7])) - ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b)`

**汇编指令**: `vhsubw.wu.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vhsubw.wu.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 16-bit elements in `a` by even-positioned unsigned 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) - ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[3])) - ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[5])) - ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[7])) - ((u32)((u16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmadd.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmadd.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 8-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = b.byte[i] * c.byte[i] + a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmadd.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmadd.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 64-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = b.dword[i] * c.dword[i] + a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmadd.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmadd.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 16-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = b.half[i] * c.half[i] + a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmadd.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmadd.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 32-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = b.word[i] * c.word[i] + a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] =
      (s64)(s32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((s64)((s32)b.word[0])) * ((s64)((s32)c.word[0]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((s64)((s32)b.word[2])) * ((s64)((s32)c.word[2]))) + ((s64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] =
      (u64)(u32)b.word[2 * i] * (u64)(u32)c.word[2 * i] + (u64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[0])) * ((u64)((u32)c.word[0]))) + ((u64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[2])) * ((u64)((u32)c.word[2]))) + ((u64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] =
      (u64)(u32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[0])) * ((s64)((s32)c.word[0]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[2])) * ((s64)((s32)c.word[2]))) + ((s64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (s16)(s8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((s16)((s8)b.byte[0])) * ((s16)((s8)c.byte[0]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((s16)((s8)b.byte[2])) * ((s16)((s8)c.byte[2]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((s16)((s8)b.byte[4])) * ((s16)((s8)c.byte[4]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((s16)((s8)b.byte[6])) * ((s16)((s8)c.byte[6]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((s16)((s8)b.byte[8])) * ((s16)((s8)c.byte[8]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((s16)((s8)b.byte[10])) * ((s16)((s8)c.byte[10]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((s16)((s8)b.byte[12])) * ((s16)((s8)c.byte[12]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((s16)((s8)b.byte[14])) * ((s16)((s8)c.byte[14]))) + ((s16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i] * (u16)(u8)c.byte[2 * i] + (u16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[0])) * ((u16)((u8)c.byte[0]))) + ((u16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[2])) * ((u16)((u8)c.byte[2]))) + ((u16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[4])) * ((u16)((u8)c.byte[4]))) + ((u16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[6])) * ((u16)((u8)c.byte[6]))) + ((u16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[8])) * ((u16)((u8)c.byte[8]))) + ((u16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[10])) * ((u16)((u8)c.byte[10]))) + ((u16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[12])) * ((u16)((u8)c.byte[12]))) + ((u16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[14])) * ((u16)((u8)c.byte[14]))) + ((u16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[0])) * ((s16)((s8)c.byte[0]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[2])) * ((s16)((s8)c.byte[2]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[4])) * ((s16)((s8)c.byte[4]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[6])) * ((s16)((s8)c.byte[6]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[8])) * ((s16)((s8)c.byte[8]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[10])) * ((s16)((s8)c.byte[10]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[12])) * ((s16)((s8)c.byte[12]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[14])) * ((s16)((s8)c.byte[14]))) + ((s16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] =
      (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((s128)((s64)b.dword[0])) * ((s128)((s64)c.dword[0]))) +
                 ((s128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] =
      (u128)(u64)b.dword[2 * i] * (u128)(u64)c.dword[2 * i] + (u128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[0])) * ((u128)((u64)c.dword[0]))) +
                 ((u128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] =
      (u128)(u64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[0])) * ((s128)((s64)c.dword[0]))) +
                 ((s128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] =
      (s32)(s16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((s32)((s16)b.half[0])) * ((s32)((s16)c.half[0]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((s32)((s16)b.half[2])) * ((s32)((s16)c.half[2]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((s32)((s16)b.half[4])) * ((s32)((s16)c.half[4]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((s32)((s16)b.half[6])) * ((s32)((s16)c.half[6]))) + ((s32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] =
      (u32)(u16)b.half[2 * i] * (u32)(u16)c.half[2 * i] + (u32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[0])) * ((u32)((u16)c.half[0]))) + ((u32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[2])) * ((u32)((u16)c.half[2]))) + ((u32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[4])) * ((u32)((u16)c.half[4]))) + ((u32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[6])) * ((u32)((u16)c.half[6]))) + ((u32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwev.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwev.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] =
      (u32)(u16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[0])) * ((s32)((s16)c.half[0]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[2])) * ((s32)((s16)c.half[2]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[4])) * ((s32)((s16)c.half[4]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[6])) * ((s32)((s16)c.half[6]))) + ((s32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
                 (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((s64)((s32)b.word[1])) * ((s64)((s32)c.word[1]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((s64)((s32)b.word[3])) * ((s64)((s32)c.word[3]))) + ((s64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (u64)(u32)c.word[2 * i + 1] +
                 (u64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[1])) * ((u64)((u32)c.word[1]))) + ((u64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[3])) * ((u64)((u32)c.word[3]))) + ((u64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
                 (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[1])) * ((s64)((s32)c.word[1]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[3])) * ((s64)((s32)c.word[3]))) + ((s64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (s16)(s8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((s16)((s8)b.byte[1])) * ((s16)((s8)c.byte[1]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((s16)((s8)b.byte[3])) * ((s16)((s8)c.byte[3]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((s16)((s8)b.byte[5])) * ((s16)((s8)c.byte[5]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((s16)((s8)b.byte[7])) * ((s16)((s8)c.byte[7]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((s16)((s8)b.byte[9])) * ((s16)((s8)c.byte[9]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((s16)((s8)b.byte[11])) * ((s16)((s8)c.byte[11]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((s16)((s8)b.byte[13])) * ((s16)((s8)c.byte[13]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((s16)((s8)b.byte[15])) * ((s16)((s8)c.byte[15]))) + ((s16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i + 1] * (u16)(u8)c.byte[2 * i + 1] + (u16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[1])) * ((u16)((u8)c.byte[1]))) + ((u16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[3])) * ((u16)((u8)c.byte[3]))) + ((u16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[5])) * ((u16)((u8)c.byte[5]))) + ((u16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[7])) * ((u16)((u8)c.byte[7]))) + ((u16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[9])) * ((u16)((u8)c.byte[9]))) + ((u16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[11])) * ((u16)((u8)c.byte[11]))) + ((u16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[13])) * ((u16)((u8)c.byte[13]))) + ((u16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[15])) * ((u16)((u8)c.byte[15]))) + ((u16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[1])) * ((s16)((s8)c.byte[1]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[3])) * ((s16)((s8)c.byte[3]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[5])) * ((s16)((s8)c.byte[5]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[7])) * ((s16)((s8)c.byte[7]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[9])) * ((s16)((s8)c.byte[9]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[11])) * ((s16)((s8)c.byte[11]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[13])) * ((s16)((s8)c.byte[13]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[15])) * ((s16)((s8)c.byte[15]))) + ((s16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
                 (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((s128)((s64)b.dword[1])) * ((s128)((s64)c.dword[1]))) +
                 ((s128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (u128)(u64)c.dword[2 * i + 1] +
                 (u128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[1])) * ((u128)((u64)c.dword[1]))) +
                 ((u128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
                 (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[1])) * ((s128)((s64)c.dword[1]))) +
                 ((s128)a.qword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
                (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((s32)((s16)b.half[1])) * ((s32)((s16)c.half[1]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((s32)((s16)b.half[3])) * ((s32)((s16)c.half[3]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((s32)((s16)b.half[5])) * ((s32)((s16)c.half[5]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((s32)((s16)b.half[7])) * ((s32)((s16)c.half[7]))) + ((s32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (u32)(u16)c.half[2 * i + 1] +
                (u32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[1])) * ((u32)((u16)c.half[1]))) + ((u32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[3])) * ((u32)((u16)c.half[3]))) + ((u32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[5])) * ((u32)((u16)c.half[5]))) + ((u32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[7])) * ((u32)((u16)c.half[7]))) + ((u32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmaddwod.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmaddwod.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
                (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[1])) * ((s32)((s16)c.half[1]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[3])) * ((s32)((s16)c.half[3]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[5])) * ((s32)((s16)c.half[5]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[7])) * ((s32)((s16)c.half[7]))) + ((s32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmax_b (__m128i a, __m128i b)`

**汇编指令**: `vmax.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = max((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmax_bu (__m128i a, __m128i b)`

**汇编指令**: `vmax.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = max((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmax_d (__m128i a, __m128i b)`

**汇编指令**: `vmax.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = max((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmax_du (__m128i a, __m128i b)`

**汇编指令**: `vmax.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = max((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmax_h (__m128i a, __m128i b)`

**汇编指令**: `vmax.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = max((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmax_hu (__m128i a, __m128i b)`

**汇编指令**: `vmax.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = max((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmax_w (__m128i a, __m128i b)`

**汇编指令**: `vmax.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = max((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmax_wu (__m128i a, __m128i b)`

**汇编指令**: `vmax.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmax_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmax.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = max((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmaxi.b vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmaxi.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = max((s8)a.byte[i], (s8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmaxi.bu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmaxi.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = max((u8)a.byte[i], (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmaxi.d vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmaxi.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = max((s64)a.dword[i], (s64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmaxi_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vmaxi.du vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmaxi.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = max((u64)a.dword[i], (u64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmaxi.h vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmaxi.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = max((s16)a.half[i], (s16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmaxi.hu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmaxi.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = max((u16)a.half[i], (u16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmaxi.w vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmaxi.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for signed 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = max((s32)a.word[i], (s32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmaxi_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmaxi.wu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmaxi_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmaxi.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise maximum for unsigned 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = max((u32)a.word[i], (u32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_b (__m128i a, __m128i b)`

**汇编指令**: `vmin.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = min((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_bu (__m128i a, __m128i b)`

**汇编指令**: `vmin.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = min((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_d (__m128i a, __m128i b)`

**汇编指令**: `vmin.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = min((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmin_du (__m128i a, __m128i b)`

**汇编指令**: `vmin.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = min((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmin_h (__m128i a, __m128i b)`

**汇编指令**: `vmin.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = min((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_hu (__m128i a, __m128i b)`

**汇编指令**: `vmin.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = min((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_w (__m128i a, __m128i b)`

**汇编指令**: `vmin.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = min((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmin_wu (__m128i a, __m128i b)`

**汇编指令**: `vmin.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmin_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmin.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = min((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmini.b vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmini.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = min((s8)a.byte[i], (s8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmini.bu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmini.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = min((u8)a.byte[i], (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmini.d vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmini.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = min((s64)a.dword[i], (s64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmini_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vmini.du vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmini.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = min((u64)a.dword[i], (u64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmini.h vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmini.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = min((s16)a.half[i], (s16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmini.hu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmini.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = min((u16)a.half[i], (u16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm)`

**汇编指令**: `vmini.w vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm)
#include <lsxintrin.h>
Instruction: vmini.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for signed 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = min((s32)a.word[i], (s32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmini_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vmini.wu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmini_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vmini.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute elementwise minimum for unsigned 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = min((u32)a.word[i], (u32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmod_b (__m128i a, __m128i b)`

**汇编指令**: `vmod.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual signed 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] % (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 33 | 0.06(1/17) |
| 3A6000 | LA664 | 29, 35 | 0.06(1/15.5) |
| 3C6000 | LA664 | 29 | 0.07(1/13.5) |
| 2K1000LA | LA264 | 30, 46 | 0(1/63) |
| 2K3000 | LA364E | 30, 46 | 0(1/63) |

---

### `__m128i __lsx_vmod_bu (__m128i a, __m128i b)`

**汇编指令**: `vmod.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual unsigned 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] % (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 33 | 0.05(1/19) |
| 3A6000 | LA664 | 29, 37 | 0.06(1/17.5) |
| 3C6000 | LA664 | 29 | 0.07(1/13.5) |
| 2K1000LA | LA264 | 30, 46 | 0(1/62) |
| 2K3000 | LA364E | 30, 46 | 0(1/63) |

---

### `__m128i __lsx_vmod_d (__m128i a, __m128i b)`

**汇编指令**: `vmod.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual signed 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] % (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 10 | 0.11(1/9.5) |
| 3A6000 | LA664 | 8, 10 | 0.25(1/4) |
| 3C6000 | LA664 | 8 | 0.33(1/3) |
| 2K1000LA | LA264 | 9, 11 | 0.08(1/13) |
| 2K3000 | LA364E | 9, 11 | 0.08(1/13) |

---

### `__m128i __lsx_vmod_du (__m128i a, __m128i b)`

**汇编指令**: `vmod.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual unsigned 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] % (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 10 | 0.11(1/9.5) |
| 3A6000 | LA664 | 8, 10 | 0.25(1/4) |
| 3C6000 | LA664 | 8 | 0.33(1/3) |
| 2K1000LA | LA264 | 9, 11 | 0.08(1/13) |
| 2K3000 | LA364E | 9, 11 | 0.08(1/13) |

---

### `__m128i __lsx_vmod_h (__m128i a, __m128i b)`

**汇编指令**: `vmod.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual signed 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] % (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21 | 0.09(1/11) |
| 3A6000 | LA664 | 17, 21 | 0.12(1/8.5) |
| 3C6000 | LA664 | 17 | 0.13(1/7.5) |
| 2K1000LA | LA264 | 18, 26 | 0.03(1/35) |
| 2K3000 | LA364E | 18, 26 | 0.03(1/35) |

---

### `__m128i __lsx_vmod_hu (__m128i a, __m128i b)`

**汇编指令**: `vmod.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual unsigned 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] % (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21 | 0.07(1/15) |
| 3A6000 | LA664 | 17, 21 | 0.11(1/9.5) |
| 3C6000 | LA664 | 17 | 0.13(1/7.5) |
| 2K1000LA | LA264 | 18, 26 | 0.03(1/35) |
| 2K3000 | LA364E | 18, 26 | 0.03(1/35) |

---

### `__m128i __lsx_vmod_w (__m128i a, __m128i b)`

**汇编指令**: `vmod.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual signed 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] % (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 15 | 0.08(1/12) |
| 3A6000 | LA664 | 11, 13 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |
| 2K1000LA | LA264 | 12, 16 | 0.05(1/20) |
| 2K3000 | LA364E | 12, 16 | 0.05(1/20) |

---

### `__m128i __lsx_vmod_wu (__m128i a, __m128i b)`

**汇编指令**: `vmod.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmod_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmod.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Modulo residual unsigned 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] % (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 15 | 0.06(1/16) |
| 3A6000 | LA664 | 11, 13 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |
| 2K1000LA | LA264 | 12, 16 | 0.05(1/20) |
| 2K3000 | LA364E | 12, 16 | 0.05(1/20) |

---

### `__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmsub.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmsub.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 8-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = -b.byte[i] * c.byte[i] + a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmsub.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmsub.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 64-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = -b.dword[i] * c.dword[i] + a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmsub.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmsub.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 16-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = -b.half[i] * c.half[i] + a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vmsub.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vmsub.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 32-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = -b.word[i] * c.word[i] + a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_b (__m128i a, __m128i b)`

**汇编指令**: `vmuh.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply signed 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (((s16)(s8)a.byte[i] * (s16)(s8)b.byte[i])) >> 8;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_bu (__m128i a, __m128i b)`

**汇编指令**: `vmuh.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply unsigned 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (((u16)(u8)a.byte[i] * (u16)(u8)b.byte[i])) >> 8;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_d (__m128i a, __m128i b)`

**汇编指令**: `vmuh.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply signed 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (((s128)(s64)a.dword[i] * (s128)(s64)b.dword[i])) >> 64;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_du (__m128i a, __m128i b)`

**汇编指令**: `vmuh.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply unsigned 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (((u128)(u64)a.dword[i] * (u128)(u64)b.dword[i])) >> 64;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_h (__m128i a, __m128i b)`

**汇编指令**: `vmuh.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply signed 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (((s32)(s16)a.half[i] * (s32)(s16)b.half[i])) >> 16;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_hu (__m128i a, __m128i b)`

**汇编指令**: `vmuh.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply unsigned 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (((u32)(u16)a.half[i] * (u32)(u16)b.half[i])) >> 16;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_w (__m128i a, __m128i b)`

**汇编指令**: `vmuh.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply signed 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (((s64)(s32)a.word[i] * (s64)(s32)b.word[i])) >> 32;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmuh_wu (__m128i a, __m128i b)`

**汇编指令**: `vmuh.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmuh_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmuh.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply unsigned 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (((u64)(u32)a.word[i] * (u64)(u32)b.word[i])) >> 32;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmul_b (__m128i a, __m128i b)`

**汇编指令**: `vmul.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmul_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmul.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] * b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmul_d (__m128i a, __m128i b)`

**汇编指令**: `vmul.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmul_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmul.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] * b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmul_h (__m128i a, __m128i b)`

**汇编指令**: `vmul.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmul_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmul.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] * b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmul_w (__m128i a, __m128i b)`

**汇编指令**: `vmul.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmul_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmul.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] * b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) * ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) * ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] * (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) * ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) * ((u64)((u32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) * ((s64)((s32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) * ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) * ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) * ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) * ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) * ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) * ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) * ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) * ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) * ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] * (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) * ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) * ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) * ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) * ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) * ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) * ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) * ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) * ((u16)((u8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) * ((s16)((s8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) * ((s16)((s8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) * ((s16)((s8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) * ((s16)((s8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) * ((s16)((s8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) * ((s16)((s8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) * ((s16)((s8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) * ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) * ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) * ((u128)((u64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) * ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) * ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) * ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) * ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) * ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] * (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) * ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) * ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) * ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) * ((u32)((u16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b)`

**汇编指令**: `vmulwev.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwev.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) * ((s32)((s16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) * ((s32)((s16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) * ((s32)((s16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) * ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_d_w (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] * (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) * ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) * ((s64)((s32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] * (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) * ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) * ((u64)((u32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_d_wu_w (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.d.wu.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_d_wu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.d.wu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] * (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) * ((s64)((s32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) * ((s64)((s32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_h_b (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] * (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) * ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) * ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) * ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) * ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) * ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) * ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) * ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) * ((s16)((s8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] * (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) * ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) * ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) * ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) * ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) * ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) * ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) * ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) * ((u16)((u8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_h_bu_b (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.h.bu.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_h_bu_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.h.bu.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] * (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) * ((s16)((s8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) * ((s16)((s8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) * ((s16)((s8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) * ((s16)((s8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) * ((s16)((s8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) * ((s16)((s8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) * ((s16)((s8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) * ((s16)((s8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_q_d (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] * (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) * ((s128)((s64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwod_q_du (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] * (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) * ((u128)((u64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwod_q_du_d (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.q.du.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_q_du_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.q.du.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] * (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) * ((s128)((s64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |
| 2K1000LA | LA264 | 6 | 1 |
| 2K3000 | LA364E | 6 | 1 |

---

### `__m128i __lsx_vmulwod_w_h (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] * (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) * ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) * ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) * ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) * ((s32)((s16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] * (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) * ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) * ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) * ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) * ((u32)((u16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmulwod_w_hu_h (__m128i a, __m128i b)`

**汇编指令**: `vmulwod.w.hu.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmulwod_w_hu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vmulwod.w.hu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] * (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) * ((s32)((s16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) * ((s32)((s16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) * ((s32)((s16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) * ((s32)((s16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vneg_b (__m128i a)`

**汇编指令**: `vneg.b vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vneg_b (__m128i a)
#include <lsxintrin.h>
Instruction: vneg.b vr, vr
CPU Flags: LSX
```

#### Description

Negate 8-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = -a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vneg_d (__m128i a)`

**汇编指令**: `vneg.d vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vneg_d (__m128i a)
#include <lsxintrin.h>
Instruction: vneg.d vr, vr
CPU Flags: LSX
```

#### Description

Negate 64-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = -a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vneg_h (__m128i a)`

**汇编指令**: `vneg.h vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vneg_h (__m128i a)
#include <lsxintrin.h>
Instruction: vneg.h vr, vr
CPU Flags: LSX
```

#### Description

Negate 16-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = -a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vneg_w (__m128i a)`

**汇编指令**: `vneg.w vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vneg_w (__m128i a)
#include <lsxintrin.h>
Instruction: vneg.w vr, vr
CPU Flags: LSX
```

#### Description

Negate 32-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = -a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_b (__m128i a, __m128i b)`

**汇编指令**: `vsadd.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the signed 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_bu (__m128i a, __m128i b)`

**汇编指令**: `vsadd.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the unsigned 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (u8)sadd((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_d (__m128i a, __m128i b)`

**汇编指令**: `vsadd.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the signed 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_du (__m128i a, __m128i b)`

**汇编指令**: `vsadd.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the unsigned 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)sadd((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_h (__m128i a, __m128i b)`

**汇编指令**: `vsadd.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the signed 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_hu (__m128i a, __m128i b)`

**汇编指令**: `vsadd.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the unsigned 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)sadd((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_w (__m128i a, __m128i b)`

**汇编指令**: `vsadd.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the signed 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsadd_wu (__m128i a, __m128i b)`

**汇编指令**: `vsadd.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsadd_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsadd.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating add the unsigned 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)sadd((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_b (__m128i a, __m128i b)`

**汇编指令**: `vssub.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the signed 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (s8)ssub((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_bu (__m128i a, __m128i b)`

**汇编指令**: `vssub.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the unsigned 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (u8)ssub((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_d (__m128i a, __m128i b)`

**汇编指令**: `vssub.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the signed 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)ssub((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_du (__m128i a, __m128i b)`

**汇编指令**: `vssub.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the unsigned 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)ssub((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_h (__m128i a, __m128i b)`

**汇编指令**: `vssub.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the signed 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)ssub((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_hu (__m128i a, __m128i b)`

**汇编指令**: `vssub.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the unsigned 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)ssub((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_w (__m128i a, __m128i b)`

**汇编指令**: `vssub.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the signed 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)ssub((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vssub_wu (__m128i a, __m128i b)`

**汇编指令**: `vssub.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssub_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssub.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Saturating subtract the unsigned 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)ssub((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsub_b (__m128i a, __m128i b)`

**汇编指令**: `vsub.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsub_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsub.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] - b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsub_d (__m128i a, __m128i b)`

**汇编指令**: `vsub.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsub_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsub.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] - b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsub_h (__m128i a, __m128i b)`

**汇编指令**: `vsub.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsub_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsub.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] - b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsub_q (__m128i a, __m128i b)`

**汇编指令**: `vsub.q vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsub_q (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsub.q vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract 128-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
dst.qword[0] = a.qword[0] - b.qword[0];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsub_w (__m128i a, __m128i b)`

**汇编指令**: `vsub.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsub_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsub.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] - b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsubi_bu (__m128i a, imm0_31 imm)`

**汇编指令**: `vsubi.bu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubi_bu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsubi.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Subtract 8-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsubi_du (__m128i a, imm0_31 imm)`

**汇编指令**: `vsubi.du vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubi_du (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsubi.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Subtract 64-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsubi_hu (__m128i a, imm0_31 imm)`

**汇编指令**: `vsubi.hu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubi_hu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsubi.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Subtract 16-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsubi_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vsubi.wu vr, vr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubi_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsubi.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Subtract 32-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] - (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) - ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) - ((s64)((s32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] - (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) - ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) - ((u64)((u32)b.word[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] - (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) - ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) - ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) - ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) - ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) - ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) - ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) - ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) - ((s16)((s8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] - (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) - ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) - ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) - ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) - ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) - ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) - ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) - ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) - ((u16)((u8)b.byte[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] - (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) - ((s128)((s64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] - (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) - ((u128)((u64)b.dword[0]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] - (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) - ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) - ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) - ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) - ((s32)((s16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vsubwev.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwev.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] - (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) - ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) - ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) - ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) - ((u32)((u16)b.half[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_d_w (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.d.w vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_d_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.d.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) - ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) - ((s64)((s32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_d_wu (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.d.wu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_d_wu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.d.wu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) - ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) - ((u64)((u32)b.word[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_h_b (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.h.b vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_h_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.h.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) - ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) - ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) - ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) - ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) - ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) - ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) - ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) - ((s16)((s8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_h_bu (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.h.bu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_h_bu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.h.bu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) - ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) - ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) - ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) - ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) - ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) - ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) - ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) - ((u16)((u8)b.byte[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_q_d (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.q.d vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_q_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.q.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) - ((s128)((s64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_q_du (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.q.du vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_q_du (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.q.du vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) - ((u128)((u64)b.dword[1]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_w_h (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.w.h vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_w_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.w.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) - ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) - ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) - ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) - ((s32)((s16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsubwod_w_hu (__m128i a, __m128i b)`

**汇编指令**: `vsubwod.w.hu vr, vr, vr`  
**分类**: `Integer Computation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsubwod_w_hu (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsubwod.w.hu vr, vr, vr
CPU Flags: LSX
```

#### Description

Subtract odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) - ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) - ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) - ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) - ((u32)((u16)b.half[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

## Logical

### `__m128i __lsx_vand_v (__m128i a, __m128i b)`

**汇编指令**: `vand.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vand_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vand.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise AND between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] & b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vandi_b (__m128i a, imm0_255 imm)`

**汇编指令**: `vandi.b vr, vr, imm`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vandi_b (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vandi.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute bitwise AND between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] & imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vandn_v (__m128i a, __m128i b)`

**汇编指令**: `vandn.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vandn_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vandn.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise ANDN between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = b.dword[i] & (~a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vnor_v (__m128i a, __m128i b)`

**汇编指令**: `vnor.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vnor_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vnor.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise NOR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ~(a.dword[i] | b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vnori_b (__m128i a, imm0_255 imm)`

**汇编指令**: `vnori.b vr, vr, imm`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vnori_b (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vnori.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute bitwise NOR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ~(a.byte[i] | imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vor_v (__m128i a, __m128i b)`

**汇编指令**: `vor.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vor_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vor.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise OR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] | b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vori_b (__m128i a, imm0_255 imm)`

**汇编指令**: `vori.b vr, vr, imm`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vori_b (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vori.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute bitwise OR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] | imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 3 |

---

### `__m128i __lsx_vorn_v (__m128i a, __m128i b)`

**汇编指令**: `vorn.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vorn_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vorn.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise ORN between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] | (~b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vxor_v (__m128i a, __m128i b)`

**汇编指令**: `vxor.v vr, vr, vr`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vxor_v (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vxor.v vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute bitwise XOR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] ^ b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vxori_b (__m128i a, imm0_255 imm)`

**汇编指令**: `vxori.b vr, vr, imm`  
**分类**: `Logical`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vxori_b (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vxori.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute bitwise XOR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] ^ imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

## Memory Load & Store

### `__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)`

**汇编指令**: `vld vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)
#include <lsxintrin.h>
Instruction: vld vr, r, imm
CPU Flags: LSX
```

#### Description

Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors.

#### Operation

```c++
dst = memory_load(128, addr + offset);
```

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset)`

**汇编指令**: `vldrepl.b vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset)
#include <lsxintrin.h>
Instruction: vldrepl.b vr, r, imm
CPU Flags: LSX
```

#### Description

Read 8-bit data from memory address `addr + (offset << 0)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u8 data = memory_load(8, addr + offset);
for (int i = 0; i < 16; i++) {
  dst.byte[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset)`

**汇编指令**: `vldrepl.d vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset)
#include <lsxintrin.h>
Instruction: vldrepl.d vr, r, imm
CPU Flags: LSX
```

#### Description

Read 64-bit data from memory address `addr + (offset << 3)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u64 data = memory_load(64, addr + (offset << 3));
for (int i = 0; i < 2; i++) {
  dst.dword[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset)`

**汇编指令**: `vldrepl.h vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset)
#include <lsxintrin.h>
Instruction: vldrepl.h vr, r, imm
CPU Flags: LSX
```

#### Description

Read 16-bit data from memory address `addr + (offset << 1)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u16 data = memory_load(16, addr + (offset << 1));
for (int i = 0; i < 8; i++) {
  dst.half[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset)`

**汇编指令**: `vldrepl.w vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset)
#include <lsxintrin.h>
Instruction: vldrepl.w vr, r, imm
CPU Flags: LSX
```

#### Description

Read 32-bit data from memory address `addr + (offset << 2)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u32 data = memory_load(32, addr + (offset << 2));
for (int i = 0; i < 4; i++) {
  dst.word[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vldx (void * addr, long int offset)`

**汇编指令**: `vldx vr, r, r`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldx (void * addr, long int offset)
#include <lsxintrin.h>
Instruction: vldx vr, r, r
CPU Flags: LSX
```

#### Description

Read whole vector from memory address `addr + offset`, save the data into `dst`.  Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors.

#### Operation

```c++
dst = memory_load(128, addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)`

**汇编指令**: `vst vr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)
#include <lsxintrin.h>
Instruction: vst vr, r, imm
CPU Flags: LSX
```

#### Description

Write whole vector data in `data` to memory address `addr + offset`.

#### Operation

```c++
memory_store(128, data, addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane)`

**汇编指令**: `vstelm.b vr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane)
#include <lsxintrin.h>
Instruction: vstelm.b vr, r, imm, imm
CPU Flags: LSX
```

#### Description

Store the 8-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(8, data.byte[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane)`

**汇编指令**: `vstelm.d vr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane)
#include <lsxintrin.h>
Instruction: vstelm.d vr, r, imm, imm
CPU Flags: LSX
```

#### Description

Store the 64-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(64, data.dword[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane)`

**汇编指令**: `vstelm.h vr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane)
#include <lsxintrin.h>
Instruction: vstelm.h vr, r, imm, imm
CPU Flags: LSX
```

#### Description

Store the 16-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(16, data.half[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane)`

**汇编指令**: `vstelm.w vr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane)
#include <lsxintrin.h>
Instruction: vstelm.w vr, r, imm, imm
CPU Flags: LSX
```

#### Description

Store the 32-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(32, data.word[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lsx_vstx (__m128i data, void * addr, long int offset)`

**汇编指令**: `vstx vr, r, r`  
**分类**: `Memory Load & Store`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
void __lsx_vstx (__m128i data, void * addr, long int offset)
#include <lsxintrin.h>
Instruction: vstx vr, r, r
CPU Flags: LSX
```

#### Description

Write whole-vector data in `data` to memory address `addr + offset`.

#### Operation

```c++
memory_store(128, data, addr + offset);
```

#### Latency and Throughput

未提供

---

## Misc

### `__m128i __lsx_vexth_d_w (__m128i a)`

**汇编指令**: `vexth.d.w vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_d_w (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.d.w vr, vr
CPU Flags: LSX
```

#### Description

Extend signed 32-bit elements in the higher half of `a` to 64-bit.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[i + 2];
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)((s32)a.word[2]);
  dst.dword[1] = (s64)((s32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_du_wu (__m128i a)`

**汇编指令**: `vexth.du.wu vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_du_wu (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.du.wu vr, vr
CPU Flags: LSX
```

#### Description

Extend unsigned 32-bit elements in the higher half of `a` to 64-bit.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[i + 2];
}

// Expands to:

if (0) {
  dst.dword[0] = (u64)((u32)a.word[2]);
  dst.dword[1] = (u64)((u32)a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_h_b (__m128i a)`

**汇编指令**: `vexth.h.b vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_h_b (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.h.b vr, vr
CPU Flags: LSX
```

#### Description

Extend signed 8-bit elements in the higher half of `a` to 16-bit.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[i + 8];
}

// Expands to:

if (0) {
  dst.half[0] = (s16)((s8)a.byte[8]);
  dst.half[1] = (s16)((s8)a.byte[9]);
  dst.half[2] = (s16)((s8)a.byte[10]);
  dst.half[3] = (s16)((s8)a.byte[11]);
  dst.half[4] = (s16)((s8)a.byte[12]);
  dst.half[5] = (s16)((s8)a.byte[13]);
  dst.half[6] = (s16)((s8)a.byte[14]);
  dst.half[7] = (s16)((s8)a.byte[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_hu_bu (__m128i a)`

**汇编指令**: `vexth.hu.bu vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_hu_bu (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.hu.bu vr, vr
CPU Flags: LSX
```

#### Description

Extend unsigned 8-bit elements in the higher half of `a` to 16-bit.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[i + 8];
}

// Expands to:

if (0) {
  dst.half[0] = (u16)((u8)a.byte[8]);
  dst.half[1] = (u16)((u8)a.byte[9]);
  dst.half[2] = (u16)((u8)a.byte[10]);
  dst.half[3] = (u16)((u8)a.byte[11]);
  dst.half[4] = (u16)((u8)a.byte[12]);
  dst.half[5] = (u16)((u8)a.byte[13]);
  dst.half[6] = (u16)((u8)a.byte[14]);
  dst.half[7] = (u16)((u8)a.byte[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_q_d (__m128i a)`

**汇编指令**: `vexth.q.d vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_q_d (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.q.d vr, vr
CPU Flags: LSX
```

#### Description

Extend signed 64-bit elements in the higher half of `a` to 128-bit.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = (s128)((s64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_qu_du (__m128i a)`

**汇编指令**: `vexth.qu.du vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_qu_du (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.qu.du vr, vr
CPU Flags: LSX
```

#### Description

Extend unsigned 64-bit elements in the higher half of `a` to 128-bit.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = (u128)((u64)a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_w_h (__m128i a)`

**汇编指令**: `vexth.w.h vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_w_h (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.w.h vr, vr
CPU Flags: LSX
```

#### Description

Extend signed 16-bit elements in the higher half of `a` to 32-bit.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[i + 4];
}

// Expands to:

if (0) {
  dst.word[0] = (s32)((s16)a.half[4]);
  dst.word[1] = (s32)((s16)a.half[5]);
  dst.word[2] = (s32)((s16)a.half[6]);
  dst.word[3] = (s32)((s16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vexth_wu_hu (__m128i a)`

**汇编指令**: `vexth.wu.hu vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vexth_wu_hu (__m128i a)
#include <lsxintrin.h>
Instruction: vexth.wu.hu vr, vr
CPU Flags: LSX
```

#### Description

Extend unsigned 16-bit elements in the higher half of `a` to 32-bit.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[i + 4];
}

// Expands to:

if (0) {
  dst.word[0] = (u32)((u16)a.half[4]);
  dst.word[1] = (u32)((u16)a.half[5]);
  dst.word[2] = (u32)((u16)a.half[6]);
  dst.word[3] = (u32)((u16)a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextl_q_d (__m128i a)`

**汇编指令**: `vextl.q.d vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextl_q_d (__m128i a)
#include <lsxintrin.h>
Instruction: vextl.q.d vr, vr
CPU Flags: LSX
```

#### Description

Extend signed 64-bit elements in the lower half of `a` to 128-bit.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (s128)((s64)a.dword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextl_qu_du (__m128i a)`

**汇编指令**: `vextl.qu.du vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextl_qu_du (__m128i a)
#include <lsxintrin.h>
Instruction: vextl.qu.du vr, vr
CPU Flags: LSX
```

#### Description

Extend unsigned 64-bit elements in the lower half of `a` to 128-bit.

#### Operation

```c++
for (int i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (u128)((u64)a.dword[0]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vextrins.b vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vextrins.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Extract one 8-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i == ((imm >> 4) & 15)) ? b.byte[imm & 15] : a.byte[i];
}

// Expands to:

if (0) {
  dst.byte[0] = (0 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[0]);
  dst.byte[1] = (1 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[1]);
  dst.byte[2] = (2 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[2]);
  dst.byte[3] = (3 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[3]);
  dst.byte[4] = (4 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[4]);
  dst.byte[5] = (5 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[5]);
  dst.byte[6] = (6 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[6]);
  dst.byte[7] = (7 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[7]);
  dst.byte[8] = (8 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[8]);
  dst.byte[9] = (9 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[9]);
  dst.byte[10] = (10 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[10]);
  dst.byte[11] = (11 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[11]);
  dst.byte[12] = (12 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[12]);
  dst.byte[13] = (13 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[13]);
  dst.byte[14] = (14 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[14]);
  dst.byte[15] = (15 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vextrins.d vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vextrins.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Extract one 64-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i == ((imm >> 4) & 1)) ? b.dword[imm & 1] : a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] = (0 == ((imm >> 4) & 1)) ? (b.dword[imm & 1]) : (a.dword[0]);
  dst.dword[1] = (1 == ((imm >> 4) & 1)) ? (b.dword[imm & 1]) : (a.dword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vextrins.h vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vextrins.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Extract one 16-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i == ((imm >> 4) & 7)) ? b.half[imm & 7] : a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] = (0 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[0]);
  dst.half[1] = (1 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[1]);
  dst.half[2] = (2 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[2]);
  dst.half[3] = (3 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[3]);
  dst.half[4] = (4 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[4]);
  dst.half[5] = (5 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[5]);
  dst.half[6] = (6 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[6]);
  dst.half[7] = (7 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vextrins.w vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vextrins.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Extract one 32-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i == ((imm >> 4) & 3)) ? b.word[imm & 3] : a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] = (0 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[0]);
  dst.word[1] = (1 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[1]);
  dst.word[2] = (2 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[2]);
  dst.word[3] = (3 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vfrstp_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vfrstp.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfrstp_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vfrstp.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `c`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i];
}
int i;
for (i = 0; i < 16; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[c.byte[0] % 16] = i;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vfrstp_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vfrstp.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfrstp_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vfrstp.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `c`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i];
}
int i;
for (i = 0; i < 8; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[c.half[0] % 8] = i;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vfrstpi_b (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vfrstpi.b vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfrstpi_b (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vfrstpi.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i];
}
int i;
for (i = 0; i < 16; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[imm % 16] = i;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vfrstpi_h (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vfrstpi.h vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vfrstpi_h (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vfrstpi.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i];
}
int i;
for (i = 0; i < 8; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[imm % 8] = i;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvh_b (__m128i a, __m128i b)`

**汇编指令**: `vilvh.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvh_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvh.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 8-bit elements in higher half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[8];
  dst.byte[1] = a.byte[8];
  dst.byte[2] = b.byte[9];
  dst.byte[3] = a.byte[9];
  dst.byte[4] = b.byte[10];
  dst.byte[5] = a.byte[10];
  dst.byte[6] = b.byte[11];
  dst.byte[7] = a.byte[11];
  dst.byte[8] = b.byte[12];
  dst.byte[9] = a.byte[12];
  dst.byte[10] = b.byte[13];
  dst.byte[11] = a.byte[13];
  dst.byte[12] = b.byte[14];
  dst.byte[13] = a.byte[14];
  dst.byte[14] = b.byte[15];
  dst.byte[15] = a.byte[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvh_d (__m128i a, __m128i b)`

**汇编指令**: `vilvh.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvh_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvh.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 64-bit elements in higher half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvh_h (__m128i a, __m128i b)`

**汇编指令**: `vilvh.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvh_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvh.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 16-bit elements in higher half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[4];
  dst.half[1] = a.half[4];
  dst.half[2] = b.half[5];
  dst.half[3] = a.half[5];
  dst.half[4] = b.half[6];
  dst.half[5] = a.half[6];
  dst.half[6] = b.half[7];
  dst.half[7] = a.half[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvh_w (__m128i a, __m128i b)`

**汇编指令**: `vilvh.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvh_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvh.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 32-bit elements in higher half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[2];
  dst.word[1] = a.word[2];
  dst.word[2] = b.word[3];
  dst.word[3] = a.word[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvl_b (__m128i a, __m128i b)`

**汇编指令**: `vilvl.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvl_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvl.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 8-bit elements in lower half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2] : b.byte[i / 2];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = a.byte[0];
  dst.byte[2] = b.byte[1];
  dst.byte[3] = a.byte[1];
  dst.byte[4] = b.byte[2];
  dst.byte[5] = a.byte[2];
  dst.byte[6] = b.byte[3];
  dst.byte[7] = a.byte[3];
  dst.byte[8] = b.byte[4];
  dst.byte[9] = a.byte[4];
  dst.byte[10] = b.byte[5];
  dst.byte[11] = a.byte[5];
  dst.byte[12] = b.byte[6];
  dst.byte[13] = a.byte[6];
  dst.byte[14] = b.byte[7];
  dst.byte[15] = a.byte[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvl_d (__m128i a, __m128i b)`

**汇编指令**: `vilvl.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvl_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvl.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 64-bit elements in lower half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2] : b.dword[i / 2];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvl_h (__m128i a, __m128i b)`

**汇编指令**: `vilvl.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvl_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvl.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 16-bit elements in lower half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2] : b.half[i / 2];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = a.half[0];
  dst.half[2] = b.half[1];
  dst.half[3] = a.half[1];
  dst.half[4] = b.half[2];
  dst.half[5] = a.half[2];
  dst.half[6] = b.half[3];
  dst.half[7] = a.half[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vilvl_w (__m128i a, __m128i b)`

**汇编指令**: `vilvl.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vilvl_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vilvl.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Interleave 32-bit elements in lower half of `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2] : b.word[i / 2];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = a.word[0];
  dst.word[2] = b.word[1];
  dst.word[3] = a.word[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vinsgr2vr_b (__m128i a, int b, imm0_15 imm)`

**汇编指令**: `vinsgr2vr.b vr, r, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vinsgr2vr_b (__m128i a, int b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vinsgr2vr.b vr, r, imm
CPU Flags: LSX
```

#### Description

Insert 8-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i == imm) ? b : a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vinsgr2vr_d (__m128i a, long int b, imm0_1 imm)`

**汇编指令**: `vinsgr2vr.d vr, r, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vinsgr2vr_d (__m128i a, long int b, imm0_1 imm)
#include <lsxintrin.h>
Instruction: vinsgr2vr.d vr, r, imm
CPU Flags: LSX
```

#### Description

Insert 64-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i == imm) ? b : a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vinsgr2vr_h (__m128i a, int b, imm0_7 imm)`

**汇编指令**: `vinsgr2vr.h vr, r, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vinsgr2vr_h (__m128i a, int b, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vinsgr2vr.h vr, r, imm
CPU Flags: LSX
```

#### Description

Insert 16-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i == imm) ? b : a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vinsgr2vr_w (__m128i a, int b, imm0_3 imm)`

**汇编指令**: `vinsgr2vr.w vr, r, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vinsgr2vr_w (__m128i a, int b, imm0_3 imm)
#include <lsxintrin.h>
Instruction: vinsgr2vr.w vr, r, imm
CPU Flags: LSX
```

#### Description

Insert 32-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i == imm) ? b : a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vldi (imm_n1024_1023 imm)`

**汇编指令**: `vldi vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vldi (imm_n1024_1023 imm)
#include <lsxintrin.h>
Instruction: vldi vr, imm
CPU Flags: LSX
```

#### Description

Initialize `dst` using predefined patterns:

- `imm[12:10]=0b000`: broadcast `imm[7:0]` as 8-bit elements to all lanes
- `imm[12:10]=0b001`: broadcast sign-extended `imm[9:0]` as 16-bit elements to all lanes
- `imm[12:10]=0b010`: broadcast sign-extended `imm[9:0]` as 32-bit elements to all lanes
- `imm[12:10]=0b011`: broadcast sign-extended `imm[9:0]` as 64-bit elements to all lanes
- `imm[12:8]=0b10000`: broadcast `imm[7:0]` as 32-bit elements to all lanes
- `imm[12:8]=0b10001`: broadcast `imm[7:0] << 8` as 32-bit elements to all lanes
- `imm[12:8]=0b10010`: broadcast `imm[7:0] << 16` as 32-bit elements to all lanes
- `imm[12:8]=0b10011`: broadcast `imm[7:0] << 24` as 32-bit elements to all lanes
- `imm[12:8]=0b10100`: broadcast `imm[7:0]` as 16-bit elements to all lanes
- `imm[12:8]=0b10101`: broadcast `imm[7:0] << 8` as 16-bit elements to all lanes
- `imm[12:8]=0b10110`: broadcast `(imm[7:0] << 8) | 0xFF` as 32-bit elements to all lanes
- `imm[12:8]=0b10111`: broadcast `(imm[7:0] << 16) | 0xFFFF` as 32-bit elements to all lanes
- `imm[12:8]=0b11000`: broadcast `imm[7:0]` as 8-bit elements to all lanes
- `imm[12:8]=0b11001`: repeat each bit of `imm[7:0]` eight times, and broadcast the result as 64-bit elements to all lanes
- `imm[12:8]=0b11010`: broadcast `(imm[7] << 31) | ((1-imm[6]) << 30) | ((imm[6] * 0x1F) << 25) | (imm[5:0] << 19)` as 32-bit elements to all lanes
- `imm[12:8]=0b11011`: broadcast `(imm[7] << 31) | ((1-imm[6]) << 30) | ((imm[6] * 0x1F) << 25) | (imm[5:0] << 19)` as 64-bit elements to all lanes
- `imm[12:8]=0b11100`: broadcast `(imm[7] << 63) | ((1-imm[6]) << 62) | ((imm[6] * 0xFF) << 54) | (imm[5:0] << 48)` as 64-bit elements to all lanes

#### Operation

```c++
u64 imm12_10 = (imm >> 10) & 0b111;
u64 imm12_8 = (imm >> 8) & 0b11111;
u64 imm9_0 = imm & 0x3FF;
s64 simm9_0 = ((s64)imm9_0 << 54) >> 54;
u64 imm7_0 = imm & 0xFF;
u64 imm7 = (imm >> 7) & 0x1;
u64 imm6 = (imm >> 6) & 0x1;
u64 imm5 = (imm >> 5) & 0x1;
u64 imm5_0 = imm & 0x3F;
u64 imm4 = (imm >> 4) & 0x1;
u64 imm3 = (imm >> 3) & 0x1;
u64 imm2 = (imm >> 2) & 0x1;
u64 imm1 = (imm >> 1) & 0x1;
u64 imm0 = imm & 0x1;

u64 broadcast_value;
u64 broadcast_width;
if (imm12_10 == 0b000) {
  broadcast_value = imm7_0;
  broadcast_width = 8;
} else if (imm12_10 == 0b001) {
  broadcast_value = simm9_0;
  broadcast_width = 16;
} else if (imm12_10 == 0b010) {
  broadcast_value = simm9_0;
  broadcast_width = 32;
} else if (imm12_10 == 0b011) {
  broadcast_value = simm9_0;
  broadcast_width = 64;
} else if (imm12_8 == 0b10000) {
  broadcast_value = imm7_0;
  broadcast_width = 32;
} else if (imm12_8 == 0b10001) {
  broadcast_value = imm7_0 << 8;
  broadcast_width = 32;
} else if (imm12_8 == 0b10010) {
  broadcast_value = imm7_0 << 16;
  broadcast_width = 32;
} else if (imm12_8 == 0b10011) {
  broadcast_value = imm7_0 << 24;
  broadcast_width = 32;
} else if (imm12_8 == 0b10100) {
  broadcast_value = imm7_0;
  broadcast_width = 16;
} else if (imm12_8 == 0b10101) {
  broadcast_value = imm7_0 << 8;
  broadcast_width = 16;
} else if (imm12_8 == 0b10110) {
  broadcast_value = (imm7_0 << 8) | 0xFF;
  broadcast_width = 32;
} else if (imm12_8 == 0b10111) {
  broadcast_value = (imm7_0 << 16) | 0xFFFF;
  broadcast_width = 32;
} else if (imm12_8 == 0b11000) {
  broadcast_value = imm7_0;
  broadcast_width = 8;
} else if (imm12_8 == 0b11001) {
  broadcast_value = imm0 * 0xFF + imm1 * 0xFF00 + imm2 * 0xFF0000 +
                    imm3 * 0xFF000000 + imm4 * 0xFF00000000 +
                    imm5 * 0xFF0000000000 + imm6 * 0xFF000000000000 +
                    imm7 * 0xFF00000000000000;
  broadcast_width = 64;
} else if (imm12_8 == 0b11010) {
  broadcast_value = (imm7 << 31) | ((1 - imm6) << 30) | ((imm6 * 0x1F) << 25) |
                    (imm5_0 << 19);
  broadcast_width = 32;
} else if (imm12_8 == 0b11011) {
  broadcast_value = (imm7 << 31) | ((1 - imm6) << 30) | ((imm6 * 0x1F) << 25) |
                    (imm5_0 << 19);
  broadcast_width = 64;
} else if (imm12_8 == 0b11100) {
  broadcast_value = (imm7 << 63) | ((1 - imm6) << 62) | ((imm6 * 0xFF) << 54) |
                    (imm5_0 << 48);
  broadcast_width = 64;
}

if (broadcast_width == 8) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i] = broadcast_value;
  }
} else if (broadcast_width == 16) {
  for (int i = 0; i < 8; i++) {
    dst.half[i] = broadcast_value;
  }
} else if (broadcast_width == 32) {
  for (int i = 0; i < 4; i++) {
    dst.word[i] = broadcast_value;
  }
} else if (broadcast_width == 64) {
  for (int i = 0; i < 2; i++) {
    dst.dword[i] = broadcast_value;
  }
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vmskgez_b (__m128i a)`

**汇编指令**: `vmskgez.b vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmskgez_b (__m128i a)
#include <lsxintrin.h>
Instruction: vmskgez.b vr, vr
CPU Flags: LSX
```

#### Description

For each 8-bit element in `a`, if the element is greater than or equal to zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmskgez_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x00000000000001fe 0x0000000000000000
__m128i __lsx_vmskgez_b(__m128i{0x0000808000000000, 0x0081000081716151})
= 0x000000000000b7cf 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8080808080808080;
u64 c = m & a.dword[0];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[0] = (u16)~dst.dword[0];
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmskltz_b (__m128i a)`

**汇编指令**: `vmskltz.b vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmskltz_b (__m128i a)
#include <lsxintrin.h>
Instruction: vmskltz.b vr, vr
CPU Flags: LSX
```

#### Description

For each 8-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmskltz_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x000000000000fe01 0x0000000000000000
__m128i __lsx_vmskltz_b(__m128i{0x0000808000000000, 0x0081000081716151})
= 0x0000000000004830 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8080808080808080;
u64 c = m & a.dword[0];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmskltz_d (__m128i a)`

**汇编指令**: `vmskltz.d vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmskltz_d (__m128i a)
#include <lsxintrin.h>
Instruction: vmskltz.d vr, vr
CPU Flags: LSX
```

#### Description

For each 64-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmskltz_d(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x0000000000000002 0x0000000000000000
__m128i __lsx_vmskltz_d(__m128i{0x0000808000000000, 0x0081000081716151})
= 0x0000000000000000 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000000000000000;
u64 c = m & a.dword[0];
c >>= 63;
dst.dword[0] = c;
c = m & a.dword[1];
c >>= 63;
dst.dword[0] |= c << 1;
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmskltz_h (__m128i a)`

**汇编指令**: `vmskltz.h vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmskltz_h (__m128i a)
#include <lsxintrin.h>
Instruction: vmskltz.h vr, vr
CPU Flags: LSX
```

#### Description

For each 16-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmskltz_h(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x00000000000000f0 0x0000000000000000
__m128i __lsx_vmskltz_h(__m128i{0x0000808000000000, 0x0081000081716151})
= 0x0000000000000024 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000800080008000;
u64 c = m & a.dword[0];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[0] |= c << 4;
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmskltz_w (__m128i a)`

**汇编指令**: `vmskltz.w vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmskltz_w (__m128i a)
#include <lsxintrin.h>
Instruction: vmskltz.w vr, vr
CPU Flags: LSX
```

#### Description

For each 32-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmskltz_w(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x000000000000000c 0x0000000000000000
__m128i __lsx_vmskltz_w(__m128i{0x0000808000000000, 0x0081000081716151})
= 0x0000000000000004 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000000080000000;
u64 c = m & a.dword[0];
c |= c << 31;
c >>= 62;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 31;
c >>= 62;
dst.dword[0] |= c << 2;
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vmsknz_b (__m128i a)`

**汇编指令**: `vmsknz.b vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmsknz_b (__m128i a)
#include <lsxintrin.h>
Instruction: vmsknz.b vr, vr
CPU Flags: LSX
```

#### Description

For each 8-bit element in `a`, if the element is non-zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m128i __lsx_vmsknz_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00})
= 0x000000000000feff 0x0000000000000000
__m128i __lsx_vmsknz_b(__m128i{0x0000111100000000, 0x0011000011111111})
= 0x0000000000004f30 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x7F7F7F7F7F7F7F7F;
u64 c = ~(((a.dword[0] & m) + m) | a.dword[0] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = ~(((a.dword[1] & m) + m) | a.dword[1] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[0] = (u16)~dst.dword[0];
dst.dword[1] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackev_b (__m128i a, __m128i b)`

**汇编指令**: `vpackev.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackev_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackev.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack even-positioned 8-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i - 1] : b.byte[i];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = a.byte[0];
  dst.byte[2] = b.byte[2];
  dst.byte[3] = a.byte[2];
  dst.byte[4] = b.byte[4];
  dst.byte[5] = a.byte[4];
  dst.byte[6] = b.byte[6];
  dst.byte[7] = a.byte[6];
  dst.byte[8] = b.byte[8];
  dst.byte[9] = a.byte[8];
  dst.byte[10] = b.byte[10];
  dst.byte[11] = a.byte[10];
  dst.byte[12] = b.byte[12];
  dst.byte[13] = a.byte[12];
  dst.byte[14] = b.byte[14];
  dst.byte[15] = a.byte[14];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackev_d (__m128i a, __m128i b)`

**汇编指令**: `vpackev.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackev_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackev.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack even-positioned 64-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i - 1] : b.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackev_h (__m128i a, __m128i b)`

**汇编指令**: `vpackev.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackev_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackev.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack even-positioned 16-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i - 1] : b.half[i];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = a.half[0];
  dst.half[2] = b.half[2];
  dst.half[3] = a.half[2];
  dst.half[4] = b.half[4];
  dst.half[5] = a.half[4];
  dst.half[6] = b.half[6];
  dst.half[7] = a.half[6];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackev_w (__m128i a, __m128i b)`

**汇编指令**: `vpackev.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackev_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackev.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack even-positioned 32-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i - 1] : b.word[i];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = a.word[0];
  dst.word[2] = b.word[2];
  dst.word[3] = a.word[2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackod_b (__m128i a, __m128i b)`

**汇编指令**: `vpackod.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackod_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackod.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack odd-positioned 8-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i] : b.byte[i + 1];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[1];
  dst.byte[1] = a.byte[1];
  dst.byte[2] = b.byte[3];
  dst.byte[3] = a.byte[3];
  dst.byte[4] = b.byte[5];
  dst.byte[5] = a.byte[5];
  dst.byte[6] = b.byte[7];
  dst.byte[7] = a.byte[7];
  dst.byte[8] = b.byte[9];
  dst.byte[9] = a.byte[9];
  dst.byte[10] = b.byte[11];
  dst.byte[11] = a.byte[11];
  dst.byte[12] = b.byte[13];
  dst.byte[13] = a.byte[13];
  dst.byte[14] = b.byte[15];
  dst.byte[15] = a.byte[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackod_d (__m128i a, __m128i b)`

**汇编指令**: `vpackod.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackod_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackod.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack odd-positioned 64-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i] : b.dword[i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackod_h (__m128i a, __m128i b)`

**汇编指令**: `vpackod.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackod_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackod.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack odd-positioned 16-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i] : b.half[i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[1];
  dst.half[1] = a.half[1];
  dst.half[2] = b.half[3];
  dst.half[3] = a.half[3];
  dst.half[4] = b.half[5];
  dst.half[5] = a.half[5];
  dst.half[6] = b.half[7];
  dst.half[7] = a.half[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpackod_w (__m128i a, __m128i b)`

**汇编指令**: `vpackod.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpackod_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpackod.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Collect and pack odd-positioned 32-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i] : b.word[i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[1];
  dst.word[1] = a.word[1];
  dst.word[2] = b.word[3];
  dst.word[3] = a.word[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickev_b (__m128i a, __m128i b)`

**汇编指令**: `vpickev.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickev_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickev.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick even-positioned 8-bit elements in `b` first, then pick even-positioned 8-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? b.byte[i * 2] : a.byte[(i - 8) * 2];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = b.byte[2];
  dst.byte[2] = b.byte[4];
  dst.byte[3] = b.byte[6];
  dst.byte[4] = b.byte[8];
  dst.byte[5] = b.byte[10];
  dst.byte[6] = b.byte[12];
  dst.byte[7] = b.byte[14];
  dst.byte[8] = a.byte[0];
  dst.byte[9] = a.byte[2];
  dst.byte[10] = a.byte[4];
  dst.byte[11] = a.byte[6];
  dst.byte[12] = a.byte[8];
  dst.byte[13] = a.byte[10];
  dst.byte[14] = a.byte[12];
  dst.byte[15] = a.byte[14];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickev_d (__m128i a, __m128i b)`

**汇编指令**: `vpickev.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickev_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickev.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick even-positioned 64-bit elements in `b` first, then pick even-positioned 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? b.dword[i * 2] : a.dword[(i - 1) * 2];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickev_h (__m128i a, __m128i b)`

**汇编指令**: `vpickev.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickev_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickev.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick even-positioned 16-bit elements in `b` first, then pick even-positioned 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? b.half[i * 2] : a.half[(i - 4) * 2];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = b.half[2];
  dst.half[2] = b.half[4];
  dst.half[3] = b.half[6];
  dst.half[4] = a.half[0];
  dst.half[5] = a.half[2];
  dst.half[6] = a.half[4];
  dst.half[7] = a.half[6];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickev_w (__m128i a, __m128i b)`

**汇编指令**: `vpickev.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickev_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickev.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick even-positioned 32-bit elements in `b` first, then pick even-positioned 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? b.word[i * 2] : a.word[(i - 2) * 2];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = b.word[2];
  dst.word[2] = a.word[0];
  dst.word[3] = a.word[2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickod_b (__m128i a, __m128i b)`

**汇编指令**: `vpickod.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickod_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickod.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick odd-positioned 8-bit elements in `b` first, then pick odd-positioned 8-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? b.byte[i * 2 + 1] : a.byte[(i - 8) * 2 + 1];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[1];
  dst.byte[1] = b.byte[3];
  dst.byte[2] = b.byte[5];
  dst.byte[3] = b.byte[7];
  dst.byte[4] = b.byte[9];
  dst.byte[5] = b.byte[11];
  dst.byte[6] = b.byte[13];
  dst.byte[7] = b.byte[15];
  dst.byte[8] = a.byte[1];
  dst.byte[9] = a.byte[3];
  dst.byte[10] = a.byte[5];
  dst.byte[11] = a.byte[7];
  dst.byte[12] = a.byte[9];
  dst.byte[13] = a.byte[11];
  dst.byte[14] = a.byte[13];
  dst.byte[15] = a.byte[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickod_d (__m128i a, __m128i b)`

**汇编指令**: `vpickod.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickod_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickod.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick odd-positioned 64-bit elements in `b` first, then pick odd-positioned 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? b.dword[i * 2 + 1] : a.dword[(i - 1) * 2 + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickod_h (__m128i a, __m128i b)`

**汇编指令**: `vpickod.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickod_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickod.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick odd-positioned 16-bit elements in `b` first, then pick odd-positioned 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? b.half[i * 2 + 1] : a.half[(i - 4) * 2 + 1];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[1];
  dst.half[1] = b.half[3];
  dst.half[2] = b.half[5];
  dst.half[3] = b.half[7];
  dst.half[4] = a.half[1];
  dst.half[5] = a.half[3];
  dst.half[6] = a.half[5];
  dst.half[7] = a.half[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vpickod_w (__m128i a, __m128i b)`

**汇编指令**: `vpickod.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpickod_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vpickod.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Pick odd-positioned 32-bit elements in `b` first, then pick odd-positioned 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? b.word[i * 2 + 1] : a.word[(i - 2) * 2 + 1];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[1];
  dst.word[1] = b.word[3];
  dst.word[2] = a.word[1];
  dst.word[3] = a.word[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplgr2vr_b (int val)`

**汇编指令**: `vreplgr2vr.b vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplgr2vr_b (int val)
#include <lsxintrin.h>
Instruction: vreplgr2vr.b vr, r
CPU Flags: LSX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |
| 2K1000LA | LA264 | N/A | 0.5(1/2) |
| 2K3000 | LA364E | N/A | 1 |

---

### `__m128i __lsx_vreplgr2vr_d (long int val)`

**汇编指令**: `vreplgr2vr.d vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplgr2vr_d (long int val)
#include <lsxintrin.h>
Instruction: vreplgr2vr.d vr, r
CPU Flags: LSX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `__m128i __lsx_vreplgr2vr_h (int val)`

**汇编指令**: `vreplgr2vr.h vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplgr2vr_h (int val)
#include <lsxintrin.h>
Instruction: vreplgr2vr.h vr, r
CPU Flags: LSX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |
| 2K1000LA | LA264 | N/A | 0.5(1/2) |
| 2K3000 | LA364E | N/A | 1 |

---

### `__m128i __lsx_vreplgr2vr_w (int val)`

**汇编指令**: `vreplgr2vr.w vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplgr2vr_w (int val)
#include <lsxintrin.h>
Instruction: vreplgr2vr.w vr, r
CPU Flags: LSX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

### `__m128i __lsx_vrepli_b (imm_n512_511 imm)`

**汇编指令**: `vldi vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrepli_b (imm_n512_511 imm)
#include <lsxintrin.h>
Instruction: vldi vr, imm
CPU Flags: LSX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vrepli_d (imm_n512_511 imm)`

**汇编指令**: `vldi vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrepli_d (imm_n512_511 imm)
#include <lsxintrin.h>
Instruction: vldi vr, imm
CPU Flags: LSX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vrepli_h (imm_n512_511 imm)`

**汇编指令**: `vldi vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrepli_h (imm_n512_511 imm)
#include <lsxintrin.h>
Instruction: vldi vr, imm
CPU Flags: LSX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vrepli_w (imm_n512_511 imm)`

**汇编指令**: `vldi vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrepli_w (imm_n512_511 imm)
#include <lsxintrin.h>
Instruction: vldi vr, imm
CPU Flags: LSX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m128i __lsx_vreplve_b (__m128i a, int idx)`

**汇编指令**: `vreplve.b vr, vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplve_b (__m128i a, int idx)
#include <lsxintrin.h>
Instruction: vreplve.b vr, vr, r
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[idx % 16];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplve_d (__m128i a, int idx)`

**汇编指令**: `vreplve.d vr, vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplve_d (__m128i a, int idx)
#include <lsxintrin.h>
Instruction: vreplve.d vr, vr, r
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[idx % 2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplve_h (__m128i a, int idx)`

**汇编指令**: `vreplve.h vr, vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplve_h (__m128i a, int idx)
#include <lsxintrin.h>
Instruction: vreplve.h vr, vr, r
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[idx % 8];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplve_w (__m128i a, int idx)`

**汇编指令**: `vreplve.w vr, vr, r`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplve_w (__m128i a, int idx)
#include <lsxintrin.h>
Instruction: vreplve.w vr, vr, r
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[idx % 4];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx)`

**汇编指令**: `vreplvei.b vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx)
#include <lsxintrin.h>
Instruction: vreplvei.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[idx];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx)`

**汇编指令**: `vreplvei.d vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx)
#include <lsxintrin.h>
Instruction: vreplvei.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[idx];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx)`

**汇编指令**: `vreplvei.h vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx)
#include <lsxintrin.h>
Instruction: vreplvei.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[idx];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx)`

**汇编指令**: `vreplvei.w vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx)
#include <lsxintrin.h>
Instruction: vreplvei.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[idx];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsat_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsat.b vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsat.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp signed 8-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = clamp<s8>(a.byte[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_bu (__m128i a, imm0_7 imm)`

**汇编指令**: `vsat.bu vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_bu (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsat.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp unsigned 8-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = clamp<u8>(a.byte[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vsat.d vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsat.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp signed 64-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = clamp<s64>(a.dword[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_du (__m128i a, imm0_63 imm)`

**汇编指令**: `vsat.du vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_du (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsat.du vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp unsigned 64-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = clamp<u64>(a.dword[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsat.h vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsat.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp signed 16-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = clamp<s16>(a.half[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_hu (__m128i a, imm0_15 imm)`

**汇编指令**: `vsat.hu vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_hu (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsat.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp unsigned 16-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = clamp<u16>(a.half[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsat.w vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsat.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp signed 32-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = clamp<s32>(a.word[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsat_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vsat.wu vr, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsat_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsat.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Clamp unsigned 32-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = clamp<u32>(a.word[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsigncov_b (__m128i a, __m128i b)`

**汇编指令**: `vsigncov.b vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsigncov_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsigncov.b vr, vr, vr
CPU Flags: LSX
```

#### Description

If the 8-bit element in `a` equals to zero, set the result to zero. If the signed 8-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (a.byte[i] == 0) ? 0 : ((s8)a.byte[i] > 0 ? b.byte[i] : -b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsigncov_d (__m128i a, __m128i b)`

**汇编指令**: `vsigncov.d vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsigncov_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsigncov.d vr, vr, vr
CPU Flags: LSX
```

#### Description

If the 64-bit element in `a` equals to zero, set the result to zero. If the signed 64-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] =
      (a.dword[i] == 0) ? 0 : ((s64)a.dword[i] > 0 ? b.dword[i] : -b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsigncov_h (__m128i a, __m128i b)`

**汇编指令**: `vsigncov.h vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsigncov_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsigncov.h vr, vr, vr
CPU Flags: LSX
```

#### Description

If the 16-bit element in `a` equals to zero, set the result to zero. If the signed 16-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (a.half[i] == 0) ? 0 : ((s16)a.half[i] > 0 ? b.half[i] : -b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsigncov_w (__m128i a, __m128i b)`

**汇编指令**: `vsigncov.w vr, vr, vr`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsigncov_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsigncov.w vr, vr, vr
CPU Flags: LSX
```

#### Description

If the 32-bit element in `a` equals to zero, set the result to zero. If the signed 32-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] =
      (a.word[i] == 0) ? 0 : ((s32)a.word[i] > 0 ? b.word[i] : -b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `int __lsx_vpickve2gr_b (__m128i a, imm0_15 idx)`

**汇编指令**: `vpickve2gr.b r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_vpickve2gr_b (__m128i a, imm0_15 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.b r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s8)a.byte[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `int __lsx_vpickve2gr_h (__m128i a, imm0_7 idx)`

**汇编指令**: `vpickve2gr.h r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_vpickve2gr_h (__m128i a, imm0_7 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.h r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s16)a.half[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `int __lsx_vpickve2gr_w (__m128i a, imm0_3 idx)`

**汇编指令**: `vpickve2gr.w r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
int __lsx_vpickve2gr_w (__m128i a, imm0_3 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.w r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s32)a.word[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `long int __lsx_vpickve2gr_d (__m128i a, imm0_1 idx)`

**汇编指令**: `vpickve2gr.d r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
long int __lsx_vpickve2gr_d (__m128i a, imm0_1 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.d r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s64)a.dword[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `unsigned int __lsx_vpickve2gr_bu (__m128i a, imm0_15 idx)`

**汇编指令**: `vpickve2gr.bu r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
unsigned int __lsx_vpickve2gr_bu (__m128i a, imm0_15 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.bu r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u8)a.byte[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `unsigned int __lsx_vpickve2gr_hu (__m128i a, imm0_7 idx)`

**汇编指令**: `vpickve2gr.hu r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
unsigned int __lsx_vpickve2gr_hu (__m128i a, imm0_7 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.hu r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u16)a.half[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `unsigned int __lsx_vpickve2gr_wu (__m128i a, imm0_3 idx)`

**汇编指令**: `vpickve2gr.wu r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
unsigned int __lsx_vpickve2gr_wu (__m128i a, imm0_3 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.wu r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u32)a.word[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `unsigned long int __lsx_vpickve2gr_du (__m128i a, imm0_1 idx)`

**汇编指令**: `vpickve2gr.du r, vr, imm`  
**分类**: `Misc`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
unsigned long int __lsx_vpickve2gr_du (__m128i a, imm0_1 idx)
#include <lsxintrin.h>
Instruction: vpickve2gr.du r, vr, imm
CPU Flags: LSX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u64)a.dword[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

## Permutation

### `__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vpermi.w vr, vr, imm`  
**分类**: `Permutation`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vpermi.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`.

#### Examples

```c++
__m128i __lsx_vpermi_w(__m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xababababbbbbbbbb, 0x1234123443214321}, 0x12)
= 0xbbbbbbbb43214321 0x5566778811223344
```

#### Operation

```c++
dst.word[0] = b.word[imm & 0x3];
dst.word[1] = b.word[(imm >> 2) & 0x3];
dst.word[2] = a.word[(imm >> 4) & 0x3];
dst.word[3] = a.word[(imm >> 6) & 0x3];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

## Shift

### `__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)`

**汇编指令**: `vbsll.v vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vbsll.v vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute whole vector `a` shifted left by `imm * 8` bits.

#### Operation

```c++
int shift = (imm * 8) % 128;
dst.qword[0] = (u128)a.qword[0] << shift;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)`

**汇编指令**: `vbsrl.v vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vbsrl.v vr, vr, imm
CPU Flags: LSX
```

#### Description

Compute whole vector `a` shifted right by `imm * 8` bits.

#### Operation

```c++
int shift = (imm * 8) % 128;
dst.qword[0] = (u128)a.qword[0] >> shift;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotr_b (__m128i a, __m128i b)`

**汇编指令**: `vrotr.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotr_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vrotr.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (a.byte[i] >> (b.byte[i] & 0x7)) | (a.byte[i] << (8 - (b.byte[i] & 0x7)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotr_d (__m128i a, __m128i b)`

**汇编指令**: `vrotr.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotr_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vrotr.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) |
                 (a.dword[i] << (64 - (b.dword[i] & 0x3f)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotr_h (__m128i a, __m128i b)`

**汇编指令**: `vrotr.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotr_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vrotr.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) |
                (a.half[i] << (16 - (b.half[i] & 0xf)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotr_w (__m128i a, __m128i b)`

**汇编指令**: `vrotr.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotr_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vrotr.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) |
                (a.word[i] << (32 - (b.word[i] & 0x1f)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotri_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vrotri.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotri_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vrotri.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (a.byte[i] >> imm) | (a.byte[i] << (8 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotri_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vrotri.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotri_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vrotri.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (a.dword[i] >> imm) | (a.dword[i] << (64 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotri_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vrotri.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotri_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vrotri.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (a.half[i] >> imm) | (a.half[i] << (16 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vrotri_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vrotri.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vrotri_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vrotri.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Rotate right the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (a.word[i] >> imm) | (a.word[i] << (32 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsll_b (__m128i a, __m128i b)`

**汇编指令**: `vsll.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsll_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsll.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] << (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsll_d (__m128i a, __m128i b)`

**汇编指令**: `vsll.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsll_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsll.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] << (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsll_h (__m128i a, __m128i b)`

**汇编指令**: `vsll.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsll_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsll.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] << (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsll_w (__m128i a, __m128i b)`

**汇编指令**: `vsll.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsll_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsll.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] << (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslli_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vslli.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslli_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vslli.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslli_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vslli.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslli_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vslli.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslli_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vslli.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslli_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vslli.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vslli_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vslli.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vslli_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vslli.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical left shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsllwil_d_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsllwil.d.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_d_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsllwil.d.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift signed 32-bit elements in `a` by `imm` to signed 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsllwil_du_wu (__m128i a, imm0_31 imm)`

**汇编指令**: `vsllwil.du.wu vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_du_wu (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsllwil.du.wu vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift unsigned 32-bit elements in `a` by `imm` to unsigned 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsllwil_h_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsllwil.h.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_h_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsllwil.h.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift signed 8-bit elements in `a` by `imm` to signed 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsllwil_hu_bu (__m128i a, imm0_7 imm)`

**汇编指令**: `vsllwil.hu.bu vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_hu_bu (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsllwil.hu.bu vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift unsigned 8-bit elements in `a` by `imm` to unsigned 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsllwil_w_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsllwil.w.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_w_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsllwil.w.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift signed 16-bit elements in `a` by `imm` to signed 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsllwil_wu_hu (__m128i a, imm0_15 imm)`

**汇编指令**: `vsllwil.wu.hu vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsllwil_wu_hu (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsllwil.wu.hu vr, vr, imm
CPU Flags: LSX
```

#### Description

Extend and shift unsigned 16-bit elements in `a` by `imm` to unsigned 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsra_b (__m128i a, __m128i b)`

**汇编指令**: `vsra.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsra_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsra.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i]) >> (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsra_d (__m128i a, __m128i b)`

**汇编指令**: `vsra.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsra_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsra.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i]) >> (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsra_h (__m128i a, __m128i b)`

**汇编指令**: `vsra.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsra_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsra.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i]) >> (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsra_w (__m128i a, __m128i b)`

**汇编指令**: `vsra.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsra_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsra.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i]) >> (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrai_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsrai.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrai_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsrai.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = ((s8)a.byte[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrai_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vsrai.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrai_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrai.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = ((s64)a.dword[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrai_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsrai.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrai_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrai.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = ((s16)a.half[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrai_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsrai.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrai_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrai.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = ((s32)a.word[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsran_b_h (__m128i a, __m128i b)`

**汇编指令**: `vsran.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsran_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsran.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? (s8)((s16)a.half[i] >> (b.half[i] & 15)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsran_h_w (__m128i a, __m128i b)`

**汇编指令**: `vsran.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsran_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsran.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? (s16)((s32)a.word[i] >> (b.word[i] & 31)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsran_w_d (__m128i a, __m128i b)`

**汇编指令**: `vsran.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsran_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsran.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (s32)((s64)a.dword[i] >> (b.dword[i] & 63)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsrani_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vsrani.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrani_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrani.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (i < 8) ? (s8)((s16)b.half[i] >> imm) : (s8)((s16)a.half[i - 8] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrani_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vsrani.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrani_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vsrani.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? (s64)((s128)b.qword[i] >> imm)
                         : (s64)((s128)a.qword[i - 1] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrani_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vsrani.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrani_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrani.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (i < 4) ? (s16)((s32)b.word[i] >> imm) : (s16)((s32)a.word[i - 4] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrani_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vsrani.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrani_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrani.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (s32)((s64)b.dword[i] >> imm)
                        : (s32)((s64)a.dword[i - 2] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrar_b (__m128i a, __m128i b)`

**汇编指令**: `vsrar.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrar_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrar.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if ((b.byte[i] & 0x7) == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = ((s8)a.byte[i] >> (b.byte[i] & 0x7)) +
                  (((s8)a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrar_d (__m128i a, __m128i b)`

**汇编指令**: `vsrar.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrar_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrar.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if ((b.dword[i] & 0x3f) == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = ((s64)a.dword[i] >> (b.dword[i] & 0x3f)) +
                   (((s64)a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrar_h (__m128i a, __m128i b)`

**汇编指令**: `vsrar.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrar_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrar.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((b.half[i] & 0xf) == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = ((s16)a.half[i] >> (b.half[i] & 0xf)) +
                  (((s16)a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrar_w (__m128i a, __m128i b)`

**汇编指令**: `vsrar.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrar_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrar.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((b.word[i] & 0x1f) == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = ((s32)a.word[i] >> (b.word[i] & 0x1f)) +
                  (((s32)a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrari_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsrari.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrari_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsrari.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (imm == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = ((s8)a.byte[i] >> imm) + (((s8)a.byte[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrari_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vsrari.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrari_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrari.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (imm == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] =
        ((s64)a.dword[i] >> imm) + (((s64)a.dword[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrari_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsrari.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrari_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrari.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (imm == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] =
        ((s16)a.half[i] >> imm) + (((s16)a.half[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrari_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsrari.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrari_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrari.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (imm == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] =
        ((s32)a.word[i] >> imm) + (((s32)a.word[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrarn_b_h (__m128i a, __m128i b)`

**汇编指令**: `vsrarn.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarn_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrarn.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u8 shift = (b.half[i] & 15);
    if (shift == 0) {
      dst.byte[i] = (s8)(s16)a.half[i];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i] >> shift) +
                         (((s16)a.half[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrarn_h_w (__m128i a, __m128i b)`

**汇编指令**: `vsrarn.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarn_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrarn.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u8 shift = (b.word[i] & 31);
    if (shift == 0) {
      dst.half[i] = (s16)(s32)a.word[i];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i] >> shift) +
                          (((s32)a.word[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrarn_w_d (__m128i a, __m128i b)`

**汇编指令**: `vsrarn.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarn_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrarn.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u8 shift = (b.dword[i] & 63);
    if (shift == 0) {
      dst.word[i] = (s32)(s64)a.dword[i];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i] >> shift) +
                          (((s64)a.dword[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrarni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vsrarni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrarni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)b.half[i];
    } else {
      dst.byte[i] =
          (s8)(((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)a.half[i - 8];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i - 8] >> imm) +
                         (((s16)a.half[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrarni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vsrarni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vsrarni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)b.qword[i];
    } else {
      dst.dword[i] = (s64)(((s128)b.qword[i] >> imm) +
                           (((s128)b.qword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)a.qword[i - 1];
    } else {
      dst.dword[i] = (s64)(((s128)a.qword[i - 1] >> imm) +
                           (((s128)a.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrarni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vsrarni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrarni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)b.word[i];
    } else {
      dst.half[i] = (s16)(((s32)b.word[i] >> imm) +
                          (((s32)b.word[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)a.word[i - 4];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i - 4] >> imm) +
                          (((s32)a.word[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrarni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vsrarni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrarni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrarni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)b.dword[i];
    } else {
      dst.word[i] = (s32)(((s64)b.dword[i] >> imm) +
                          (((s64)b.dword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)a.dword[i - 2];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i - 2] >> imm) +
                          (((s64)a.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrl_b (__m128i a, __m128i b)`

**汇编指令**: `vsrl.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrl_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrl.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] >> (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrl_d (__m128i a, __m128i b)`

**汇编指令**: `vsrl.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrl_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrl.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] >> (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrl_h (__m128i a, __m128i b)`

**汇编指令**: `vsrl.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrl_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrl.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] >> (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrl_w (__m128i a, __m128i b)`

**汇编指令**: `vsrl.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrl_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrl.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] >> (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrli_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsrli.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrli_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsrli.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrli_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vsrli.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrli_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrli.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrli_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsrli.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrli_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrli.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrli_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsrli.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrli_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrli.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vsrln_b_h (__m128i a, __m128i b)`

**汇编指令**: `vsrln.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrln_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrln.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? (u8)((u16)a.half[i] >> (b.half[i] & 15)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsrln_h_w (__m128i a, __m128i b)`

**汇编指令**: `vsrln.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrln_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrln.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? (u16)((u32)a.word[i] >> (b.word[i] & 31)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsrln_w_d (__m128i a, __m128i b)`

**汇编指令**: `vsrln.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrln_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrln.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (u32)((u64)a.dword[i] >> (b.dword[i] & 63)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vsrlni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrlni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (i < 8) ? (u8)((u16)b.half[i] >> imm) : (u8)((u16)a.half[i - 8] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vsrlni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vsrlni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? (u64)((u128)b.qword[i] >> imm)
                         : (u64)((u128)a.qword[i - 1] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vsrlni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrlni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (i < 4) ? (u16)((u32)b.word[i] >> imm) : (u16)((u32)a.word[i - 4] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vsrlni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrlni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (u32)((u64)b.dword[i] >> imm)
                        : (u32)((u64)a.dword[i - 2] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlr_b (__m128i a, __m128i b)`

**汇编指令**: `vsrlr.b vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlr_b (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlr.b vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if ((b.byte[i] & 0x7) == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) +
                  ((a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlr_d (__m128i a, __m128i b)`

**汇编指令**: `vsrlr.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlr_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlr.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if ((b.dword[i] & 0x3f) == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) +
                   ((a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlr_h (__m128i a, __m128i b)`

**汇编指令**: `vsrlr.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlr_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlr.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((b.half[i] & 0xf) == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) +
                  ((a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlr_w (__m128i a, __m128i b)`

**汇编指令**: `vsrlr.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlr_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlr.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((b.word[i] & 0x1f) == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) +
                  ((a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlri_b (__m128i a, imm0_7 imm)`

**汇编指令**: `vsrlri.b vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlri_b (__m128i a, imm0_7 imm)
#include <lsxintrin.h>
Instruction: vsrlri.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (imm == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = (a.byte[i] >> imm) + ((a.byte[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlri_d (__m128i a, imm0_63 imm)`

**汇编指令**: `vsrlri.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlri_d (__m128i a, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrlri.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (imm == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = (a.dword[i] >> imm) + ((a.dword[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlri_h (__m128i a, imm0_15 imm)`

**汇编指令**: `vsrlri.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlri_h (__m128i a, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrlri.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (imm == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = (a.half[i] >> imm) + ((a.half[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlri_w (__m128i a, imm0_31 imm)`

**汇编指令**: `vsrlri.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlri_w (__m128i a, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrlri.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (imm == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = (a.word[i] >> imm) + ((a.word[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlrn_b_h (__m128i a, __m128i b)`

**汇编指令**: `vsrlrn.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrn_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlrn.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u8 shift = (b.half[i] & 15);
    if (shift == 0) {
      dst.byte[i] = (u8)(u16)a.half[i];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i] >> shift) +
                         (((u16)a.half[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlrn_h_w (__m128i a, __m128i b)`

**汇编指令**: `vsrlrn.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrn_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlrn.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u8 shift = (b.word[i] & 31);
    if (shift == 0) {
      dst.half[i] = (u16)(u32)a.word[i];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i] >> shift) +
                          (((u32)a.word[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlrn_w_d (__m128i a, __m128i b)`

**汇编指令**: `vsrlrn.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrn_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrlrn.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u8 shift = (b.dword[i] & 63);
    if (shift == 0) {
      dst.word[i] = (u32)(u64)a.dword[i];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i] >> shift) +
                          (((u64)a.dword[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlrni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vsrlrni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vsrlrni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)b.half[i];
    } else {
      dst.byte[i] =
          (u8)(((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)a.half[i - 8];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i - 8] >> imm) +
                         (((u16)a.half[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlrni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vsrlrni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vsrlrni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)b.qword[i];
    } else {
      dst.dword[i] = (u64)(((u128)b.qword[i] >> imm) +
                           (((u128)b.qword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)a.qword[i - 1];
    } else {
      dst.dword[i] = (u64)(((u128)a.qword[i - 1] >> imm) +
                           (((u128)a.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vsrlrni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vsrlrni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vsrlrni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)b.word[i];
    } else {
      dst.half[i] = (u16)(((u32)b.word[i] >> imm) +
                          (((u32)b.word[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)a.word[i - 4];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i - 4] >> imm) +
                          (((u32)a.word[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vsrlrni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vsrlrni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vsrlrni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vsrlrni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)b.dword[i];
    } else {
      dst.word[i] = (u32)(((u64)b.dword[i] >> imm) +
                          (((u64)b.dword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)a.dword[i - 2];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i - 2] >> imm) +
                          (((u64)a.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_b_h (__m128i a, __m128i b)`

**汇编指令**: `vssran.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_bu_h (__m128i a, __m128i b)`

**汇编指令**: `vssran.bu.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_bu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.bu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_h_w (__m128i a, __m128i b)`

**汇编指令**: `vssran.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_hu_w (__m128i a, __m128i b)`

**汇编指令**: `vssran.hu.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_hu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.hu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_w_d (__m128i a, __m128i b)`

**汇编指令**: `vssran.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssran_wu_d (__m128i a, __m128i b)`

**汇编指令**: `vssran.wu.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssran_wu_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssran.wu.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrani.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrani.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)b.half[i] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp = (s16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_bu_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrani.bu.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_bu_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrani.bu.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)b.half[i] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp = (s16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrani.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrani.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp = (s128)b.qword[i] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp = (s128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrani_du_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrani.du.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_du_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrani.du.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp = (s128)b.qword[i] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp = (s128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrani_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrani.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrani.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)b.word[i] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp = (s32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_hu_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrani.hu.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_hu_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrani.hu.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)b.word[i] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp = (s32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrani.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrani.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)b.dword[i] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp = (s64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrani_wu_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrani.wu.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrani_wu_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrani.wu.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)b.dword[i] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp = (s64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_b_h (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (s16)a.half[i];
    } else {
      temp = ((s16)a.half[i] >> (b.half[i] & 15)) +
             (((s16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_bu_h (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.bu.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_bu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.bu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (s16)a.half[i];
    } else {
      temp = ((s16)a.half[i] >> (b.half[i] & 15)) +
             (((s16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_h_w (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (s32)a.word[i];
    } else {
      temp = ((s32)a.word[i] >> (b.word[i] & 31)) +
             (((s32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_hu_w (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.hu.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_hu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.hu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (s32)a.word[i];
    } else {
      temp = ((s32)a.word[i] >> (b.word[i] & 31)) +
             (((s32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_w_d (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (s64)a.dword[i];
    } else {
      temp = ((s64)a.dword[i] >> (b.dword[i] & 63)) +
             (((s64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarn_wu_d (__m128i a, __m128i b)`

**汇编指令**: `vssrarn.wu.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarn_wu_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrarn.wu.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (s64)a.dword[i];
    } else {
      temp = ((s64)a.dword[i] >> (b.dword[i] & 63)) +
             (((s64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrarni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrarni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i];
    } else {
      temp = ((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp =
          ((s16)a.half[i - 8] >> imm) + (((s16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_bu_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrarni.bu.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_bu_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrarni.bu.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i];
    } else {
      temp = ((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp =
          ((s16)a.half[i - 8] >> imm) + (((s16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrarni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrarni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i];
    } else {
      temp = ((s128)b.qword[i] >> imm) + (((s128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 1];
    } else {
      temp = ((s128)a.qword[i - 1] >> imm) +
             (((s128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrarni_du_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrarni.du.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_du_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrarni.du.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i];
    } else {
      temp = ((s128)b.qword[i] >> imm) + (((s128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 1];
    } else {
      temp = ((s128)a.qword[i - 1] >> imm) +
             (((s128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrarni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrarni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrarni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i];
    } else {
      temp = ((s32)b.word[i] >> imm) + (((s32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp =
          ((s32)a.word[i - 4] >> imm) + (((s32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_hu_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrarni.hu.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_hu_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrarni.hu.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i];
    } else {
      temp = ((s32)b.word[i] >> imm) + (((s32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp =
          ((s32)a.word[i - 4] >> imm) + (((s32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrarni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrarni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i];
    } else {
      temp = ((s64)b.dword[i] >> imm) + (((s64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> imm) +
             (((s64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrarni_wu_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrarni.wu.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrarni_wu_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrarni.wu.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i];
    } else {
      temp = ((s64)b.dword[i] >> imm) + (((s64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> imm) +
             (((s64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_b_h (__m128i a, __m128i b)`

**汇编指令**: `vssrln.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_bu_h (__m128i a, __m128i b)`

**汇编指令**: `vssrln.bu.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_bu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.bu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_h_w (__m128i a, __m128i b)`

**汇编指令**: `vssrln.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_hu_w (__m128i a, __m128i b)`

**汇编指令**: `vssrln.hu.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_hu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.hu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_w_d (__m128i a, __m128i b)`

**汇编指令**: `vssrln.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrln_wu_d (__m128i a, __m128i b)`

**汇编指令**: `vssrln.wu.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrln_wu_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrln.wu.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrlni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrlni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)b.half[i] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp = (u16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_bu_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrlni.bu.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_bu_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrlni.bu.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)b.half[i] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp = (u16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrlni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrlni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp = (u128)b.qword[i] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp = (u128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrlni_du_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrlni.du.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_du_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrlni.du.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp = (u128)b.qword[i] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp = (u128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrlni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrlni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrlni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)b.word[i] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp = (u32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_hu_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrlni.hu.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_hu_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrlni.hu.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)b.word[i] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp = (u32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrlni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrlni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)b.dword[i] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp = (u64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlni_wu_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrlni.wu.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlni_wu_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrlni.wu.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)b.dword[i] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp = (u64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_b_h (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.b.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_b_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.b.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (u16)a.half[i];
    } else {
      temp = ((u16)a.half[i] >> (b.half[i] & 15)) +
             (((u16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_bu_h (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.bu.h vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_bu_h (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.bu.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (u16)a.half[i];
    } else {
      temp = ((u16)a.half[i] >> (b.half[i] & 15)) +
             (((u16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_h_w (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.h.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.h.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (u32)a.word[i];
    } else {
      temp = ((u32)a.word[i] >> (b.word[i] & 31)) +
             (((u32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_hu_w (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.hu.w vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_hu_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.hu.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (u32)a.word[i];
    } else {
      temp = ((u32)a.word[i] >> (b.word[i] & 31)) +
             (((u32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_w_d (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.w.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_w_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.w.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (u64)a.dword[i];
    } else {
      temp = ((u64)a.dword[i] >> (b.dword[i] & 63)) +
             (((u64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrn_wu_d (__m128i a, __m128i b)`

**汇编指令**: `vssrlrn.wu.d vr, vr, vr`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrn_wu_d (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vssrlrn.wu.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (u64)a.dword[i];
    } else {
      temp = ((u64)a.dword[i] >> (b.dword[i] & 63)) +
             (((u64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_b_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrlrni.b.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_b_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.b.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i];
    } else {
      temp = ((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp =
          ((u16)a.half[i - 8] >> imm) + (((u16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_bu_h (__m128i a, __m128i b, imm0_15 imm)`

**汇编指令**: `vssrlrni.bu.h vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_bu_h (__m128i a, __m128i b, imm0_15 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.bu.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i];
    } else {
      temp = ((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp =
          ((u16)a.half[i - 8] >> imm) + (((u16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_d_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrlrni.d.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_d_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.d.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i];
    } else {
      temp = ((u128)b.qword[i] >> imm) + (((u128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 1];
    } else {
      temp = ((u128)a.qword[i - 1] >> imm) +
             (((u128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrlrni_du_q (__m128i a, __m128i b, imm0_127 imm)`

**汇编指令**: `vssrlrni.du.q vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_du_q (__m128i a, __m128i b, imm0_127 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.du.q vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i];
    } else {
      temp = ((u128)b.qword[i] >> imm) + (((u128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 1];
    } else {
      temp = ((u128)a.qword[i - 1] >> imm) +
             (((u128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |
| 2K1000LA | LA264 | 2 | 1 |
| 2K3000 | LA364E | 2 | 1 |

---

### `__m128i __lsx_vssrlrni_h_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrlrni.h.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_h_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.h.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i];
    } else {
      temp = ((u32)b.word[i] >> imm) + (((u32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp =
          ((u32)a.word[i - 4] >> imm) + (((u32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_hu_w (__m128i a, __m128i b, imm0_31 imm)`

**汇编指令**: `vssrlrni.hu.w vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_hu_w (__m128i a, __m128i b, imm0_31 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.hu.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i];
    } else {
      temp = ((u32)b.word[i] >> imm) + (((u32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp =
          ((u32)a.word[i - 4] >> imm) + (((u32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_w_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrlrni.w.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_w_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.w.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i];
    } else {
      temp = ((u64)b.dword[i] >> imm) + (((u64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> imm) +
             (((u64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

### `__m128i __lsx_vssrlrni_wu_d (__m128i a, __m128i b, imm0_63 imm)`

**汇编指令**: `vssrlrni.wu.d vr, vr, imm`  
**分类**: `Shift`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vssrlrni_wu_d (__m128i a, __m128i b, imm0_63 imm)
#include <lsxintrin.h>
Instruction: vssrlrni.wu.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i];
    } else {
      temp = ((u64)b.dword[i] >> imm) + (((u64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> imm) +
             (((u64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 3 | 0.5(1/2) |
| 2K3000 | LA364E | 3 | 0.5(1/2) |

---

## Shuffling

### `__m128i __lsx_vshuf4i_b (__m128i a, imm0_255 imm)`

**汇编指令**: `vshuf4i.b vr, vr, imm`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf4i_b (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vshuf4i.b vr, vr, imm
CPU Flags: LSX
```

#### Description

Shuffle every four 8-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/vshuf4i_b.svg)

#### Examples

```c++
__m128i __lsx_vshuf4i_b(__m128i{0xabcdef1314156678, 0x1234123443214321}, 0x12)
= 0x13ef13cd78667815 0x3412343421432121
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.byte[0] = a.byte[0 + ((imm >> 0) & 0x3)];
  dst.byte[1] = a.byte[0 + ((imm >> 2) & 0x3)];
  dst.byte[2] = a.byte[0 + ((imm >> 4) & 0x3)];
  dst.byte[3] = a.byte[0 + ((imm >> 6) & 0x3)];
  dst.byte[4] = a.byte[4 + ((imm >> 0) & 0x3)];
  dst.byte[5] = a.byte[4 + ((imm >> 2) & 0x3)];
  dst.byte[6] = a.byte[4 + ((imm >> 4) & 0x3)];
  dst.byte[7] = a.byte[4 + ((imm >> 6) & 0x3)];
  dst.byte[8] = a.byte[8 + ((imm >> 0) & 0x3)];
  dst.byte[9] = a.byte[8 + ((imm >> 2) & 0x3)];
  dst.byte[10] = a.byte[8 + ((imm >> 4) & 0x3)];
  dst.byte[11] = a.byte[8 + ((imm >> 6) & 0x3)];
  dst.byte[12] = a.byte[12 + ((imm >> 0) & 0x3)];
  dst.byte[13] = a.byte[12 + ((imm >> 2) & 0x3)];
  dst.byte[14] = a.byte[12 + ((imm >> 4) & 0x3)];
  dst.byte[15] = a.byte[12 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf4i_d (__m128i a, __m128i b, imm0_255 imm)`

**汇编指令**: `vshuf4i.d vr, vr, imm`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf4i_d (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vshuf4i.d vr, vr, imm
CPU Flags: LSX
```

#### Description

Shuffle every four 64-bit elements in `a` and `b` with indices packed in `imm`, save the result to `dst`.

![](../diagram/vshuf4i_d.svg)

#### Examples

```c++
__m128i __lsx_vshuf4i_d(__m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabcdef1314156678, 0x1234123443214321}, 0x12)
= 0xabcdef1314156678 0x1122334455667788
```

#### Operation

```c++
dst.dword[0] = (imm & 2) ? b.dword[(imm & 1)] : a.dword[(imm & 1)];
dst.dword[1] =
    (imm & 8) ? b.dword[((imm >> 2) & 1)] : a.dword[((imm >> 2) & 1)];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf4i_h (__m128i a, imm0_255 imm)`

**汇编指令**: `vshuf4i.h vr, vr, imm`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf4i_h (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vshuf4i.h vr, vr, imm
CPU Flags: LSX
```

#### Description

Shuffle every four 16-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/vshuf4i_h.svg)

#### Examples

```c++
__m128i __lsx_vshuf4i_h(__m128i{0xabcdef1314156678, 0x1234123443214321}, 0x12)
= 0x667814156678ef13 0x4321432143211234
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.half[0] = a.half[0 + ((imm >> 0) & 0x3)];
  dst.half[1] = a.half[0 + ((imm >> 2) & 0x3)];
  dst.half[2] = a.half[0 + ((imm >> 4) & 0x3)];
  dst.half[3] = a.half[0 + ((imm >> 6) & 0x3)];
  dst.half[4] = a.half[4 + ((imm >> 0) & 0x3)];
  dst.half[5] = a.half[4 + ((imm >> 2) & 0x3)];
  dst.half[6] = a.half[4 + ((imm >> 4) & 0x3)];
  dst.half[7] = a.half[4 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf4i_w (__m128i a, imm0_255 imm)`

**汇编指令**: `vshuf4i.w vr, vr, imm`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf4i_w (__m128i a, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vshuf4i.w vr, vr, imm
CPU Flags: LSX
```

#### Description

Shuffle every four 32-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/vshuf4i_w.svg)

#### Examples

```c++
__m128i __lsx_vshuf4i_w(__m128i{0xabcdef1314156678, 0x1234123443214321}, 0x12)
= 0x1415667843214321 0x14156678abcdef13
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.word[0] = a.word[0 + ((imm >> 0) & 0x3)];
  dst.word[1] = a.word[0 + ((imm >> 2) & 0x3)];
  dst.word[2] = a.word[0 + ((imm >> 4) & 0x3)];
  dst.word[3] = a.word[0 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vshuf.b vr, vr, vr, vr`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vshuf.b vr, vr, vr, vr
CPU Flags: LSX
```

#### Description

Shuffle bytes from `a` and `b` with indices from `c`.

Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics, they are placed in `a`.


![](../diagram/vshuf_b.svg)

#### Examples

```c++
__m128i __lsx_vshuf_b(__m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabcdef1314156678, 0x1234123443214321}, __m128i{0x0011021304050607, 0x0811120213031404})
= 0x7877155513efcdab 0x2177661555144413
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (c.byte[i] >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.byte[i] = 0;
  } else if ((c.byte[i] % 32) < 16) {
    dst.byte[i] = b.byte[c.byte[i] % 16];
  } else {
    dst.byte[i] = a.byte[c.byte[i] % 16];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vshuf.d vr, vr, vr`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vshuf.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Shuffle 64-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/vshuf_d.svg)

#### Examples

```c++
__m128i __lsx_vshuf_d(__m128i{0x0000000000000001, 0x0000000000000002}, __m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabcdef1314156678, 0x1234123443214321})
= 0x1234123443214321 0x1122334455667788
```

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if ((a.dword[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.dword[i] = 0;
  } else if ((a.dword[i] % 4) < 2) {
    dst.dword[i] = c.dword[a.dword[i] % 2];
  } else {
    dst.dword[i] = b.dword[a.dword[i] % 2];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vshuf.h vr, vr, vr`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vshuf.h vr, vr, vr
CPU Flags: LSX
```

#### Description

Shuffle 16-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/vshuf_h.svg)

#### Examples

```c++
__m128i __lsx_vshuf_h(__m128i{0x0001000200030004, 0x0005000a000b000c}, __m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabcdef1314156678, 0x1234123443214321})
= 0x1415ef13abcd4321 0x432133441122ff00
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((a.half[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.half[i] = 0;
  } else if ((a.half[i] % 16) < 8) {
    dst.half[i] = c.half[a.half[i] % 8];
  } else {
    dst.half[i] = b.half[a.half[i] % 8];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

### `__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c)`

**汇编指令**: `vshuf.w vr, vr, vr`  
**分类**: `Shuffling`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vshuf.w vr, vr, vr
CPU Flags: LSX
```

#### Description

Shuffle 32-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/vshuf_w.svg)

#### Examples

```c++
__m128i __lsx_vshuf_w(__m128i{0x0000000200000004, 0x0000000700000005}, __m128i{0x1122334455667788, 0x99aabbccddeeff00}, __m128i{0xabcdef1314156678, 0x1234123443214321})
= 0x4321432155667788 0x99aabbcc11223344
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((a.word[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.word[i] = 0;
  } else if ((a.word[i] % 8) < 4) {
    dst.word[i] = c.word[a.word[i] % 4];
  } else {
    dst.word[i] = b.word[a.word[i] % 4];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |
| 2K1000LA | LA264 | 1 | 1 |
| 2K3000 | LA364E | 1 | 1 |

---

## Undocumented Intrinsics

### `__m128 __lsx_vfscaleb_s (__m128 a, __m128i b)`

**汇编指令**: `vfscaleb.s vr, vr, vr`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128 __lsx_vfscaleb_s (__m128 a, __m128i b)
#include <lsxintrin.h>
Instruction: vfscaleb.s vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute IEEE754 scaleB of single precision floating point elements in `a` by integer elements in `b`. Currently undocumented.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp32[i] = __builtin_scalbn(a.fp32[i], b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128d __lsx_vfscaleb_d (__m128d a, __m128i b)`

**汇编指令**: `vfscaleb.d vr, vr, vr`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128d __lsx_vfscaleb_d (__m128d a, __m128i b)
#include <lsxintrin.h>
Instruction: vfscaleb.d vr, vr, vr
CPU Flags: LSX
```

#### Description

Compute IEEE754 scaleB of double precision floating point elements in `a` by integer elements in `b`. Currently undocumented.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = __builtin_scalbn(a.fp64[i], b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | 4 | 2 |
| 2K1000LA | LA264 | 4 | 1 |
| 2K3000 | LA364E | 4 | 1 |

---

### `__m128i __lsx_vmepatmsk_v (int mode, int uimm5)`

**汇编指令**: `vmepatmsk.v vr, mode, uimm5`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LSX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m128i __lsx_vmepatmsk_v (int mode, int uimm5)
#include <lsxintrin.h>
Instruction: vmepatmsk.v vr, mode, uimm5
CPU Flags: LSX
```

#### Description

Compute pattern according to `mode`, then add `uimm5` to each element.

#### Examples

```c++
__m128i __lsx_vmepatmsk_v(3, 1)
= 0x0807060504030201 0x100f0e0d0c0b0a09
```

#### Operation

```c++
if (mode == 0b00) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i] = uimm5 + (i % 4); // [0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3]
  }
} else if (mode == 0b01) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i] =
        uimm5 + (i / 4) + (i % 4); // [0 1 2 3 1 2 3 4 2 3 4 5 3 4 5 6]
  }
} else if (mode == 0b10) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i] =
        uimm5 + (i / 4) + (i % 4) + 4; // [4 5 6 7 5 6 7 8 6 7 8 9 7 8 9 10]
  }
} else if (mode == 0b11) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i] = uimm5 + i; // [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
  }
} else {
  // illegal instruction
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | N/A | 4 |
| 2K1000LA | LA264 | N/A | 1 |
| 2K3000 | LA364E | N/A | 1 |

---

# LASX 指令集

## Bitwise Operations

### `__m256i __lasx_xvbitclr_b (__m256i a, __m256i b)`

**汇编指令**: `xvbitclr.b xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclr_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitclr.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Clear the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclr_b(__m256i{0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0xf7f7f7f7f7f7f7f7 0x99aabbccd5ecf700 0xabcdeb0212341234 0xaabaaaba9dee9dee
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] & (~((u8)1 << (b.byte[i] % 8)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclr_d (__m256i a, __m256i b)`

**汇编指令**: `xvbitclr.d xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclr_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitclr.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Clear the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclr_d(__m256i{0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0xfffff7ffffffffff 0x99aabbccddeeff00 0xabcdef1012341234 0xaabbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] & (~((u64)1 << (b.dword[i] % 64)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclr_h (__m256i a, __m256i b)`

**汇编指令**: `xvbitclr.h xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclr_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitclr.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Clear the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclr_h(__m256i{0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0xf7fff7fff7fff7ff 0x99aabbccddecff00 0xabcdef0212341234 0xaabbaabbdceedcee
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] & (~((u16)1 << (b.half[i] % 16)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclr_w (__m256i a, __m256i b)`

**汇编指令**: `xvbitclr.w xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclr_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitclr.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Clear the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclr_w(__m256i{0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0xfffff7fffffff7ff 0x99aabbccddeeff00 0xabcdef1212341234 0xaabbaabbdceeddee
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] & (~((u32)1 << (b.word[i] % 32)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclri_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvbitclri.b xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclri_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvbitclri.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Clear the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclri_b( __m256i{ 0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0xfdfdfdfdfdfdfdfd 0x99a8b9ccddecfd00 0xa9cded1010341034 0xa8b9a8b9ddecddec
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] & (~((u8)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclri_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvbitclri.d xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclri_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvbitclri.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Clear the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclri_d( __m256i{ 0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0xfffffffffffffffd 0x99aabbccddeeff00 0xabcdef1212341234 0xaabbaabbddeeddec
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] & (~((u64)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclri_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvbitclri.h xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclri_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvbitclri.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Clear the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclri_h( __m256i{ 0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0xfffdfffdfffdfffd 0x99a8bbccddecff00 0xabcdef1012341234 0xaab9aab9ddecddec
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] & (~((u16)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitclri_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvbitclri.w xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitclri_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvbitclri.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Clear the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitclri_w( __m256i{ 0xffffffffffffffff, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0xfffffffdfffffffd 0x99aabbccddeeff00 0xabcdef1012341234 0xaabbaab9ddeeddec
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] & (~((u32)1 << imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrev_b (__m256i a, __m256i b)`

**汇编指令**: `xvbitrev.b xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrev_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitrev.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Toggle the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrev_b(__m256i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0707070707070707 0x9dbabfdcd5ecf702 0xafddeb021a361a36 0xeabaeaba9def9def
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] ^ ((u8)1 << (b.byte[i] % 8));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrev_d (__m256i a, __m256i b)`

**汇编指令**: `xvbitrev.d xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrev_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitrev.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Toggle the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrev_d(__m256i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0f0f070f0f0f0f0f 0x99aabbceddeeff00 0xabcdef1012341234 0xabbbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] ^ ((u64)1 << (b.dword[i] % 64));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrev_h (__m256i a, __m256i b)`

**汇编指令**: `xvbitrev.h xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrev_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitrev.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Toggle the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrev_h(__m256i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x070f070f070f070f 0x99babbdcddecff02 0xabddef0212361236 0xabbbabbbdceedcee
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] ^ ((u16)1 << (b.half[i] % 16));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrev_w (__m256i a, __m256i b)`

**汇编指令**: `xvbitrev.w xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrev_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitrev.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Toggle the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrev_w(__m256i{0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0f0f070f0f0f070f 0x99babbccddeeff02 0xabddef1212341236 0xabbbaabbdceeddee
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] ^ ((u32)1 << (b.word[i] % 32));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrevi_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvbitrevi.b xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrevi_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvbitrevi.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Toggle the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrevi_b( __m256i{ 0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0d0d0d0d0d0d0d0d 0x9ba8b9cedfecfd02 0xa9cfed1010361036 0xa8b9a8b9dfecdfec
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] ^ ((u8)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrevi_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvbitrevi.d xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrevi_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvbitrevi.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Toggle the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrevi_d( __m256i{ 0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0f0f0f0f0f0f0f0d 0x99aabbccddeeff02 0xabcdef1212341236 0xaabbaabbddeeddec
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] ^ ((u64)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrevi_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvbitrevi.h xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrevi_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvbitrevi.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Toggle the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrevi_h( __m256i{ 0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0f0d0f0d0f0d0f0d 0x99a8bbceddecff02 0xabcfef1012361236 0xaab9aab9ddecddec
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] ^ ((u16)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitrevi_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvbitrevi.w xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitrevi_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvbitrevi.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Toggle the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitrevi_w( __m256i{ 0x0f0f0f0f0f0f0f0f, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0f0f0f0d0f0f0f0d 0x99aabbceddeeff02 0xabcdef1012341236 0xaabbaab9ddeeddec
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] ^ ((u32)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitsel_v (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvbitsel.v xr, xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitsel_v (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvbitsel.v xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise selection: for each bit position, if the bit in `c` equals to one, copy the bit from `b` to `dst`, otherwise copy from `a`.

#### Examples

```c++
__m256i __lasx_xvbitsel_v(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, __m256i{0xffff0000aaaabbbb, 0x1111222233334444, 0x00000000ffffffff, 0xffffffff00000000})
= 0xabab3344ffeeefab 0x98ba9beccfedfb00 0xabcdef1243214321 0x56785678ddeeddee
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (c.dword[i] & b.dword[i]) | (~c.dword[i] & a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvbitseli_b (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvbitseli.b xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitseli_b (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvbitseli.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute bitwise selection: for each bit position, if the bit in `a` equals to one, copy the bit from `imm` to `dst`, otherwise copy from `b`.

#### Examples

```c++
__m256i __lasx_xvbitseli_b( __m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{ 0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0xba8b9aabba8b9a23 0x1216123012031221 0x1230123653115311 0x5652565212121212
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (~a.byte[i] & b.byte[i]) | (a.byte[i] & (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvbitset_b (__m256i a, __m256i b)`

**汇编指令**: `xvbitset.b xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitset_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitset.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Set the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitset_b(__m256i{0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0808080808080808 0x9dbabfdcddeeff02 0xafddef121a361a36 0xeabbeabbddefddef
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] | ((u8)1 << (b.byte[i] % 8));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitset_d (__m256i a, __m256i b)`

**汇编指令**: `xvbitset.d xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitset_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitset.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Set the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitset_d(__m256i{0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0000080000000000 0x99aabbceddeeff00 0xabcdef1212341234 0xabbbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] | ((u64)1 << (b.dword[i] % 64));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitset_h (__m256i a, __m256i b)`

**汇编指令**: `xvbitset.h xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitset_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitset.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Set the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitset_h(__m256i{0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0800080008000800 0x99babbdcddeeff02 0xabddef1212361236 0xabbbabbbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] | ((u16)1 << (b.half[i] % 16));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitset_w (__m256i a, __m256i b)`

**汇编指令**: `xvbitset.w xr, xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitset_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvbitset.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Set the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitset_w(__m256i{0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabababababababab, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x0000080000000800 0x99babbccddeeff02 0xabddef1212341236 0xabbbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] | ((u32)1 << (b.word[i] % 32));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitseti_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvbitseti.b xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitseti_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvbitseti.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Set the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitseti_b( __m256i{ 0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0202020202020202 0x9baabbcedfeeff02 0xabcfef1212361236 0xaabbaabbdfeedfee
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] | ((u8)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitseti_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvbitseti.d xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitseti_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvbitseti.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Set the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitseti_d( __m256i{ 0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0000000000000002 0x99aabbccddeeff02 0xabcdef1212341236 0xaabbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] | ((u64)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitseti_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvbitseti.h xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitseti_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvbitseti.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Set the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitseti_h( __m256i{ 0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0002000200020002 0x99aabbceddeeff02 0xabcfef1212361236 0xaabbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] | ((u16)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvbitseti_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvbitseti.w xr, xr, imm`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbitseti_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvbitseti.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Set the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`.

#### Examples

```c++
__m256i __lasx_xvbitseti_w( __m256i{ 0x0000000000000000, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 1)
= 0x0000000200000002 0x99aabbceddeeff02 0xabcdef1212341236 0xaabbaabbddeeddee
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] | ((u32)1 << imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvclo_b (__m256i a)`

**汇编指令**: `xvclo.b xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclo_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvclo.b xr, xr
CPU Flags: LASX
```

#### Description

Count leading ones of 8-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclo_b(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000000000001 0x0101010202030800 0x0102030000000000 0x0101010102030203
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = clo(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclo_d (__m256i a)`

**汇编指令**: `xvclo.d xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclo_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvclo.d xr, xr
CPU Flags: LASX
```

#### Description

Count leading ones of 64-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclo_d(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000000000000 0x0000000000000001 0x0000000000000001 0x0000000000000001
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = clo(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclo_h (__m256i a)`

**汇编指令**: `xvclo.h xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclo_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvclo.h xr, xr
CPU Flags: LASX
```

#### Description

Count leading ones of 16-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclo_h(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000000000000 0x0001000100020008 0x0001000300000000 0x0001000100020002
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = clo(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclo_w (__m256i a)`

**汇编指令**: `xvclo.w xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclo_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvclo.w xr, xr
CPU Flags: LASX
```

#### Description

Count leading ones of 32-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclo_w(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000000000000 0x0000000100000002 0x0000000100000000 0x0000000100000002
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = clo(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclz_b (__m256i a)`

**汇编指令**: `xvclz.b xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclz_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvclz.b xr, xr
CPU Flags: LASX
```

#### Description

Count leading zeros of 8-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclz_b(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0302020101010100 0x0000000000000008 0x0000000303020302 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = clz(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclz_d (__m256i a)`

**汇编指令**: `xvclz.d xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclz_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvclz.d xr, xr
CPU Flags: LASX
```

#### Description

Count leading zeros of 64-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclz_d(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000000000003 0x0000000000000000 0x0000000000000000 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = clz(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclz_h (__m256i a)`

**汇编指令**: `xvclz.h xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclz_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvclz.h xr, xr
CPU Flags: LASX
```

#### Description

Count leading zeros of 16-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclz_h(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0003000200010001 0x0000000000000000 0x0000000000030003 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = clz(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvclz_w (__m256i a)`

**汇编指令**: `xvclz.w xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvclz_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvclz.w xr, xr
CPU Flags: LASX
```

#### Description

Count leading zeros of 32-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvclz_w(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000300000001 0x0000000000000000 0x0000000000000003 0x0000000000000000
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = clz(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvpcnt_b (__m256i a)`

**汇编指令**: `xvpcnt.b xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpcnt_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvpcnt.b xr, xr
CPU Flags: LASX
```

#### Description

Count the number of ones (population, popcount) in 8-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvpcnt_b(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0202040204040602 0x0404060406060800 0x0505070202030203 0x0406040606060606
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = popcount(a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvpcnt_d (__m256i a)`

**汇编指令**: `xvpcnt.d xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpcnt_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvpcnt.d xr, xr
CPU Flags: LASX
```

#### Description

Count the number of ones (population, popcount) in 64-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvpcnt_d(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x000000000000001a 0x0000000000000026 0x000000000000001d 0x000000000000002c
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = popcount(a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvpcnt_h (__m256i a)`

**汇编指令**: `xvpcnt.h xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpcnt_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvpcnt.h xr, xr
CPU Flags: LASX
```

#### Description

Count the number of ones (population, popcount) in 16-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvpcnt_h(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0004000600080008 0x0008000a000c0008 0x000a000900050005 0x000a000a000c000c
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = popcount(a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvpcnt_w (__m256i a)`

**汇编指令**: `xvpcnt.w xr, xr`  
**分类**: `Bitwise Operations`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpcnt_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvpcnt.w xr, xr
CPU Flags: LASX
```

#### Description

Count the number of ones (population, popcount) in 32-bit elements in `a`.

#### Examples

```c++
__m256i __lasx_xvpcnt_w(__m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee})
= 0x0000000a00000010 0x0000001200000014 0x000000130000000a 0x0000001400000018
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = popcount(a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

## Branch

### `int __lasx_xbnz_b (__m256i a)`

**汇编指令**: `xvsetallnez.b fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbnz_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetallnez.b fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if all 8-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 32; i++) {
  if (a.byte[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbnz_d (__m256i a)`

**汇编指令**: `xvsetallnez.d fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbnz_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetallnez.d fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if all 64-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 4; i++) {
  if (a.dword[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbnz_h (__m256i a)`

**汇编指令**: `xvsetallnez.h fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbnz_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetallnez.h fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if all 16-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 16; i++) {
  if (a.half[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbnz_v (__m256i a)`

**汇编指令**: `xvsetnez.v fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbnz_v (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetnez.v fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if the whole vector `a` is non-zero.

#### Operation

```c++
dst = a.qword[0] != 0 || a.qword[1] != 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbnz_w (__m256i a)`

**汇编指令**: `xvsetallnez.w fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbnz_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetallnez.w fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if all 32-bit elements in `a` are non-zero.

#### Operation

```c++
dst = 1;
for (int i = 0; i < 8; i++) {
  if (a.word[i] == 0) {
    dst = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbz_b (__m256i a)`

**汇编指令**: `xvsetanyeqz.b fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbz_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetanyeqz.b fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if any 8-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 32; i++) {
  if (a.byte[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbz_d (__m256i a)`

**汇编指令**: `xvsetanyeqz.d fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbz_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetanyeqz.d fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if any 64-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 4; i++) {
  if (a.dword[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbz_h (__m256i a)`

**汇编指令**: `xvsetanyeqz.h fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbz_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetanyeqz.h fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if any 16-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 16; i++) {
  if (a.half[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbz_v (__m256i a)`

**汇编指令**: `xvseteqz.v fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbz_v (__m256i a)
#include <lasxintrin.h>
Instruction: xvseteqz.v fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if the whole vector `a` equals to zero.

#### Operation

```c++
dst = a.qword[0] == 0 && a.qword[1] == 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

### `int __lasx_xbz_w (__m256i a)`

**汇编指令**: `xvsetanyeqz.w fcc, xr; bcnez`  
**分类**: `Branch`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xbz_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvsetanyeqz.w fcc, xr; bcnez
CPU Flags: LASX
```

#### Description

Expected to be used in branches: branch if any 32-bit element in `a` equals to zero.

#### Operation

```c++
dst = 0;
for (int i = 0; i < 8; i++) {
  if (a.word[i] == 0) {
    dst = 1;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 2 |
| 3A6000 | LA664 | N/A | 2 |
| 3C6000 | LA664 | N/A | 2 |

---

## Floating Point Comparison

### `__m256i __lasx_xvfcmp_caf_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.caf.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_caf_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.caf.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_caf(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_caf_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.caf.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_caf_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.caf.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_caf(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_ceq_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.ceq.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_ceq_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.ceq.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_ceq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_ceq_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.ceq.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_ceq_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.ceq.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_ceq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cle_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cle.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cle_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cle.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cle(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cle_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cle.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cle_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cle.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cle(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_clt_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.clt.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_clt_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.clt.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_clt(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_clt_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.clt.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_clt_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.clt.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_clt(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cne_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cne.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cne_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cne.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cne(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cne_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cne.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cne_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cne.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cne(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cor_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cor.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cor_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cor.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cor(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cor_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cor.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cor_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cor.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cor(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cueq_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cueq.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cueq_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cueq.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cueq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cueq_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cueq.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cueq_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cueq.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cueq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cule_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cule.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cule_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cule.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cule(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cule_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cule.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cule_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cule.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cule(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cult_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cult.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cult_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cult.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cult(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cult_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cult.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cult_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cult.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cult(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cun_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cun.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cun_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cun.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cun(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cun_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cun.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cun_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cun.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cun(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cune_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.cune.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cune_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.cune.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_cune(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_cune_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.cune.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_cune_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.cune.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_cune(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_saf_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.saf.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_saf_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.saf.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_saf(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_saf_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.saf.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_saf_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.saf.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_saf(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_seq_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.seq.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_seq_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.seq.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_seq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_seq_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.seq.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_seq_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.seq.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_seq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sle_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sle.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sle_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sle.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sle(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sle_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sle.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sle_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sle.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sle(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_slt_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.slt.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_slt_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.slt.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_slt(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_slt_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.slt.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_slt_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.slt.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_slt(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sne_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sne.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sne_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sne.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sne(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sne_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sne.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sne_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sne.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sne(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sor_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sor.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sor_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sor.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sor(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sor_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sor.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sor_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sor.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sor(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sueq_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sueq.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sueq_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sueq.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sueq(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sueq_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sueq.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sueq_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sueq.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sueq(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sule_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sule.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sule_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sule.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sule(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sule_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sule.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sule_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sule.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sule(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sult_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sult.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sult_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sult.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sult(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sult_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sult.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sult_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sult.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sult(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sun_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sun.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sun_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sun.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sun(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sun_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sun.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sun_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sun.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sun(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sune_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcmp.sune.d xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sune_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcmp.sune.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (fp_compare_sune(a.fp64[i], b.fp64[i])) {
    dst.dword[i] = 0xFFFFFFFFFFFFFFFF;
  } else {
    dst.dword[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfcmp_sune_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcmp.sune.s xr, xr, xr`  
**分类**: `Floating Point Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcmp_sune_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcmp.sune.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (fp_compare_sune(a.fp32[i], b.fp32[i])) {
    dst.word[i] = 0xFFFFFFFF;
  } else {
    dst.word[i] = 0;
  }
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

## Floating Point Computation

### `__m256 __lasx_xvfadd_s (__m256 a, __m256 b)`

**汇编指令**: `xvfadd.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfadd_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfadd.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Add single precision floating point elements in `a` to elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] + b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256 __lasx_xvfdiv_s (__m256 a, __m256 b)`

**汇编指令**: `xvfdiv.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfdiv_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfdiv.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide single precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] / b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 19.5 | 0.1(1/10.5) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |

---

### `__m256 __lasx_xvflogb_s (__m256 a)`

**汇编指令**: `xvflogb.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvflogb_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvflogb.s xr, xr
CPU Flags: LASX
```

#### Description

Compute 2-based logarithm of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = log2(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256 __lasx_xvfmax_s (__m256 a, __m256 b)`

**汇编指令**: `xvfmax.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmax_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfmax.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute maximum of single precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = fmax(a.fp32[i], b.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256 __lasx_xvfmaxa_s (__m256 a, __m256 b)`

**汇编指令**: `xvfmaxa.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmaxa_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfmaxa.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute maximum of single precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (abs(a.fp32[i]) > abs(b.fp32[i])) ? a.fp32[i] : b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256 __lasx_xvfmin_s (__m256 a, __m256 b)`

**汇编指令**: `xvfmin.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmin_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfmin.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute minimum of single precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = fmin(a.fp32[i], b.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256 __lasx_xvfmina_s (__m256 a, __m256 b)`

**汇编指令**: `xvfmina.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmina_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfmina.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute minimum of single precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (abs(a.fp32[i]) < abs(b.fp32[i])) ? a.fp32[i] : b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256 __lasx_xvfmul_s (__m256 a, __m256 b)`

**汇编指令**: `xvfmul.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmul_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfmul.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply single precision floating point elements in `a` and elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256 __lasx_xvfrecip_s (__m256 a)`

**汇编指令**: `xvfrecip.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrecip_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrecip.s xr, xr
CPU Flags: LASX
```

#### Description

Compute reciprocal of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = 1 / a.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 27 | 0.14(1/7) |
| 3A6000 | LA664 | 27 | 0.18(1/5.5) |
| 3C6000 | LA664 | 27 | 0.12(1/8.5) |

---

### `__m256 __lasx_xvfrecipe_s (__m256 a)`

**汇编指令**: `xvfrecipe.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrecipe_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrecipe.s xr, xr
CPU Flags: LASX
```

#### Description

Compute estimated reciprocal of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = 1 / a.fp32[i]; // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m256 __lasx_xvfrsqrt_s (__m256 a)`

**汇编指令**: `xvfrsqrt.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrsqrt_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrsqrt.s xr, xr
CPU Flags: LASX
```

#### Description

Compute reciprocal of square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = 1.0 / sqrt(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 25 | 0.03(1/32) |
| 3A6000 | LA664 | 25 | 0.05(1/19) |
| 3C6000 | LA664 | 21 | 0.11(1/9.5) |

---

### `__m256 __lasx_xvfrsqrte_s (__m256 a)`

**汇编指令**: `xvfrsqrte.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrsqrte_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrsqrte.s xr, xr
CPU Flags: LASX
```

#### Description

Compute estimated reciprocal of square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = 1.0 / sqrt(a.fp32[i]); // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m256 __lasx_xvfsqrt_s (__m256 a)`

**汇编指令**: `xvfsqrt.s xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfsqrt_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfsqrt.s xr, xr
CPU Flags: LASX
```

#### Description

Compute square root of single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = sqrt(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 15 | 0.07(1/13.5) |
| 3A6000 | LA664 | 15 | 0.08(1/12) |
| 3C6000 | LA664 | 25 | 0.09(1/11.5) |

---

### `__m256 __lasx_xvfsub_s (__m256 a, __m256 b)`

**汇编指令**: `xvfsub.s xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfsub_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfsub.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract single precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] - b.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256d __lasx_xvfadd_d (__m256d a, __m256d b)`

**汇编指令**: `xvfadd.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfadd_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfadd.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add double precision floating point elements in `a` to elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] + b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256d __lasx_xvfdiv_d (__m256d a, __m256d b)`

**汇编指令**: `xvfdiv.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfdiv_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfdiv.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide double precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] / b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 17 | 0.08(1/12.5) |
| 3A6000 | LA664 | 8, 21.5 | 0.25(1/4) |
| 3C6000 | LA664 | 8, 16.5 | 0.33(1/3) |

---

### `__m256d __lasx_xvflogb_d (__m256d a)`

**汇编指令**: `xvflogb.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvflogb_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvflogb.d xr, xr
CPU Flags: LASX
```

#### Description

Compute 2-based logarithm of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = log2(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256d __lasx_xvfmax_d (__m256d a, __m256d b)`

**汇编指令**: `xvfmax.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmax_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfmax.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute maximum of double precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = fmax(a.fp64[i], b.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256d __lasx_xvfmaxa_d (__m256d a, __m256d b)`

**汇编指令**: `xvfmaxa.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmaxa_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfmaxa.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute maximum of double precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (abs(a.fp64[i]) > abs(b.fp64[i])) ? a.fp64[i] : b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256d __lasx_xvfmin_d (__m256d a, __m256d b)`

**汇编指令**: `xvfmin.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmin_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfmin.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute minimum of double precision floating point elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = fmin(a.fp64[i], b.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256d __lasx_xvfmina_d (__m256d a, __m256d b)`

**汇编指令**: `xvfmina.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmina_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfmina.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute minimum of double precision floating point elements in `a` and `b` by magnitude.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (abs(a.fp64[i]) < abs(b.fp64[i])) ? a.fp64[i] : b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256d __lasx_xvfmul_d (__m256d a, __m256d b)`

**汇编指令**: `xvfmul.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmul_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfmul.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply double precision floating point elements in `a` and elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvfrecip_d (__m256d a)`

**汇编指令**: `xvfrecip.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrecip_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrecip.d xr, xr
CPU Flags: LASX
```

#### Description

Compute reciprocal of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = 1 / a.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 23 | 0.08(1/12) |
| 3A6000 | LA664 | 23 | 0.25(1/4) |
| 3C6000 | LA664 | 23 | 0.1(1/10.5) |

---

### `__m256d __lasx_xvfrecipe_d (__m256d a)`

**汇编指令**: `xvfrecipe.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrecipe_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrecipe.d xr, xr
CPU Flags: LASX
```

#### Description

Compute estimated reciprocal of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = 1 / a.fp64[i]; // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m256d __lasx_xvfrsqrt_d (__m256d a)`

**汇编指令**: `xvfrsqrt.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrsqrt_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrsqrt.d xr, xr
CPU Flags: LASX
```

#### Description

Compute reciprocal of square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = 1.0 / sqrt(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 15 | 0.04(1/27.5) |
| 3A6000 | LA664 | 15 | 0.04(1/26.5) |
| 3C6000 | LA664 | 15 | 0.04(1/26) |

---

### `__m256d __lasx_xvfrsqrte_d (__m256d a)`

**汇编指令**: `xvfrsqrte.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrsqrte_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrsqrte.d xr, xr
CPU Flags: LASX
```

#### Description

Compute estimated reciprocal of square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = 1.0 / sqrt(a.fp64[i]); // estimated
}
```

#### Latency and Throughput

未提供

---

### `__m256d __lasx_xvfsqrt_d (__m256d a)`

**汇编指令**: `xvfsqrt.d xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfsqrt_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfsqrt.d xr, xr
CPU Flags: LASX
```

#### Description

Compute square root of double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = sqrt(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 36 | 0.05(1/18.5) |
| 3A6000 | LA664 | 36 | 0.06(1/17.5) |
| 3C6000 | LA664 | 36 | 0.06(1/17) |

---

### `__m256d __lasx_xvfsub_d (__m256d a, __m256d b)`

**汇编指令**: `xvfsub.d xr, xr, xr`  
**分类**: `Floating Point Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfsub_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfsub.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract double precision floating point elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] - b.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

## Floating Point Conversion

### `__m256 __lasx_xvfcvt_s_d (__m256d a, __m256d b)`

**汇编指令**: `xvfcvt.s.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfcvt_s_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvfcvt.s.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double precision floating point elements in `a` and `b` to single precision.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.fp32[i] = b.fp64[i];
}
for (; i < 4; i++) {
  dst.fp32[i] = a.fp64[i - 2];
}
for (; i < 6; i++) {
  dst.fp32[i] = b.fp64[i - 2];
}
for (; i < 8; i++) {
  dst.fp32[i] = a.fp64[i - 4];
}

// Expands to:

if (0) {
  dst.fp32[0] = b.fp64[0];
  dst.fp32[1] = b.fp64[1];
  dst.fp32[2] = a.fp64[0];
  dst.fp32[3] = a.fp64[1];
  dst.fp32[4] = b.fp64[2];
  dst.fp32[5] = b.fp64[3];
  dst.fp32[6] = a.fp64[2];
  dst.fp32[7] = a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256 __lasx_xvfcvth_s_h (__m256i a)`

**汇编指令**: `xvfcvth.s.h xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfcvth_s_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvfcvth.s.h xr, xr
CPU Flags: LASX
```

#### Description

Convert half precision floating point elements in higher half of `a` to single precision.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp16[i + 4];
}
for (; i < 8; i++) {
  dst.fp32[i] = a.fp16[i + 8];
}

// Expands to:

if (0) {
  dst.fp32[0] = a.fp16[4];
  dst.fp32[1] = a.fp16[5];
  dst.fp32[2] = a.fp16[6];
  dst.fp32[3] = a.fp16[7];
  dst.fp32[4] = a.fp16[12];
  dst.fp32[5] = a.fp16[13];
  dst.fp32[6] = a.fp16[14];
  dst.fp32[7] = a.fp16[15];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256 __lasx_xvfcvtl_s_h (__m256i a)`

**汇编指令**: `xvfcvtl.s.h xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfcvtl_s_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvfcvtl.s.h xr, xr
CPU Flags: LASX
```

#### Description

Convert half precision floating point elements in lower half of `a` to single precision.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.fp32[i] = a.fp16[i];
}
for (; i < 8; i++) {
  dst.fp32[i] = a.fp16[i + 4];
}

// Expands to:

if (0) {
  dst.fp32[0] = a.fp16[0];
  dst.fp32[1] = a.fp16[1];
  dst.fp32[2] = a.fp16[2];
  dst.fp32[3] = a.fp16[3];
  dst.fp32[4] = a.fp16[8];
  dst.fp32[5] = a.fp16[9];
  dst.fp32[6] = a.fp16[10];
  dst.fp32[7] = a.fp16[11];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256 __lasx_xvffint_s_l (__m256i a, __m256i b)`

**汇编指令**: `xvffint.s.l xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvffint_s_l (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvffint.s.l xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert 64-bit integer elements in `a` and `b` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] =
      (i < 4) ? (f32)(s32)a.dword[i]
              : (f32)(s32)b.dword[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp32[0] = (f32)((s32)a.dword[0]);
  dst.fp32[1] = (f32)((s32)a.dword[1]);
  dst.fp32[2] = (f32)((s32)a.dword[2]);
  dst.fp32[3] = (f32)((s32)a.dword[3]);
  dst.fp32[4] = (f32)((s32)b.dword[4]);
  dst.fp32[5] = (f32)((s32)b.dword[5]);
  dst.fp32[6] = (f32)((s32)b.dword[6]);
  dst.fp32[7] = (f32)((s32)b.dword[7]);
}

// Expands to:

if (0) {
  dst.fp32[0] = (f32)((s32)a.dword[0]);
  dst.fp32[1] = (f32)((s32)a.dword[1]);
  dst.fp32[2] = (f32)((s32)a.dword[2]);
  dst.fp32[3] = (f32)((s32)a.dword[3]);
  dst.fp32[4] = (f32)((s32)b.dword[4]);
  dst.fp32[5] = (f32)((s32)b.dword[5]);
  dst.fp32[6] = (f32)((s32)b.dword[6]);
  dst.fp32[7] = (f32)((s32)b.dword[7]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256 __lasx_xvffint_s_w (__m256i a)`

**汇编指令**: `xvffint.s.w xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvffint_s_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvffint.s.w xr, xr
CPU Flags: LASX
```

#### Description

Convert signed 32-bit integer elements in `a` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (f32)(s32)a.word[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp32[0] = (f32)((s32)a.word[0]);
  dst.fp32[1] = (f32)((s32)a.word[1]);
  dst.fp32[2] = (f32)((s32)a.word[2]);
  dst.fp32[3] = (f32)((s32)a.word[3]);
  dst.fp32[4] = (f32)((s32)a.word[4]);
  dst.fp32[5] = (f32)((s32)a.word[5]);
  dst.fp32[6] = (f32)((s32)a.word[6]);
  dst.fp32[7] = (f32)((s32)a.word[7]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256 __lasx_xvffint_s_wu (__m256i a)`

**汇编指令**: `xvffint.s.wu xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvffint_s_wu (__m256i a)
#include <lasxintrin.h>
Instruction: xvffint.s.wu xr, xr
CPU Flags: LASX
```

#### Description

Convert unsigned 32-bit integer elements in `a` to single-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (f32)(u32)a.word[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp32[0] = (f32)((u32)a.word[0]);
  dst.fp32[1] = (f32)((u32)a.word[1]);
  dst.fp32[2] = (f32)((u32)a.word[2]);
  dst.fp32[3] = (f32)((u32)a.word[3]);
  dst.fp32[4] = (f32)((u32)a.word[4]);
  dst.fp32[5] = (f32)((u32)a.word[5]);
  dst.fp32[6] = (f32)((u32)a.word[6]);
  dst.fp32[7] = (f32)((u32)a.word[7]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256d __lasx_xvfcvth_d_s (__m256 a)`

**汇编指令**: `xvfcvth.d.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfcvth_d_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfcvth.d.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single precision floating point elements in higher half of `a` to double precision.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp32[i + 2];
}
for (; i < 4; i++) {
  dst.fp64[i] = a.fp32[i + 4];
}

// Expands to:

if (0) {
  dst.fp64[0] = a.fp32[2];
  dst.fp64[1] = a.fp32[3];
  dst.fp64[2] = a.fp32[6];
  dst.fp64[3] = a.fp32[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256d __lasx_xvfcvtl_d_s (__m256 a)`

**汇编指令**: `xvfcvtl.d.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfcvtl_d_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfcvtl.d.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single precision floating point elements in lower half of `a` to double precision.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.fp64[i] = a.fp32[i];
}
for (; i < 4; i++) {
  dst.fp64[i] = a.fp32[i + 2];
}

// Expands to:

if (0) {
  dst.fp64[0] = a.fp32[0];
  dst.fp64[1] = a.fp32[1];
  dst.fp64[2] = a.fp32[4];
  dst.fp64[3] = a.fp32[5];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256d __lasx_xvffint_d_l (__m256i a)`

**汇编指令**: `xvffint.d.l xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvffint_d_l (__m256i a)
#include <lasxintrin.h>
Instruction: xvffint.d.l xr, xr
CPU Flags: LASX
```

#### Description

Convert signed 64-bit integer elements in `a` to double-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (f64)(s64)a.dword[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((s64)a.dword[0]);
  dst.fp64[1] = (f64)((s64)a.dword[1]);
  dst.fp64[2] = (f64)((s64)a.dword[2]);
  dst.fp64[3] = (f64)((s64)a.dword[3]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256d __lasx_xvffint_d_lu (__m256i a)`

**汇编指令**: `xvffint.d.lu xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvffint_d_lu (__m256i a)
#include <lasxintrin.h>
Instruction: xvffint.d.lu xr, xr
CPU Flags: LASX
```

#### Description

Convert unsigned 64-bit integer elements in `a` to double-precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (f64)(u64)a.dword[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((u64)a.dword[0]);
  dst.fp64[1] = (f64)((u64)a.dword[1]);
  dst.fp64[2] = (f64)((u64)a.dword[2]);
  dst.fp64[3] = (f64)((u64)a.dword[3]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256d __lasx_xvffinth_d_w (__m256i a)`

**汇编指令**: `xvffinth.d.w xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvffinth_d_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvffinth.d.w xr, xr
CPU Flags: LASX
```

#### Description

Convert 32-bit integer elements in higher part of `a` to double precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((s32)a.word[2]);
  dst.fp64[1] = (f64)((s32)a.word[3]);
  dst.fp64[2] = (f64)((s32)a.word[6]);
  dst.fp64[3] = (f64)((s32)a.word[7]);
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((s32)a.word[2]);
  dst.fp64[1] = (f64)((s32)a.word[3]);
  dst.fp64[2] = (f64)((s32)a.word[6]);
  dst.fp64[3] = (f64)((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvffintl_d_w (__m256i a)`

**汇编指令**: `xvffintl.d.w xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvffintl_d_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvffintl.d.w xr, xr
CPU Flags: LASX
```

#### Description

Convert 32-bit integer elements in lower part of `a` to double precision floating point numbers.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.fp64[i] = (f64)(s32)a.word[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((s32)a.word[0]);
  dst.fp64[1] = (f64)((s32)a.word[1]);
  dst.fp64[2] = (f64)((s32)a.word[4]);
  dst.fp64[3] = (f64)((s32)a.word[5]);
}

// Expands to:

if (0) {
  dst.fp64[0] = (f64)((s32)a.word[0]);
  dst.fp64[1] = (f64)((s32)a.word[1]);
  dst.fp64[2] = (f64)((s32)a.word[4]);
  dst.fp64[3] = (f64)((s32)a.word[5]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvfcvt_h_s (__m256 a, __m256 b)`

**汇编指令**: `xvfcvt.h.s xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfcvt_h_s (__m256 a, __m256 b)
#include <lasxintrin.h>
Instruction: xvfcvt.h.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert single precision floating point elements in `a` and `b` to half precision.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.fp16[i] = b.fp32[i];
}
for (; i < 8; i++) {
  dst.fp16[i] = a.fp32[i - 4];
}
for (; i < 12; i++) {
  dst.fp16[i] = b.fp32[i - 4];
}
for (; i < 16; i++) {
  dst.fp16[i] = a.fp32[i - 8];
}

// Expands to:

if (0) {
  dst.fp16[0] = b.fp32[0];
  dst.fp16[1] = b.fp32[1];
  dst.fp16[2] = b.fp32[2];
  dst.fp16[3] = b.fp32[3];
  dst.fp16[4] = a.fp32[0];
  dst.fp16[5] = a.fp32[1];
  dst.fp16[6] = a.fp32[2];
  dst.fp16[7] = a.fp32[3];
  dst.fp16[8] = b.fp32[4];
  dst.fp16[9] = b.fp32[5];
  dst.fp16[10] = b.fp32[6];
  dst.fp16[11] = b.fp32[7];
  dst.fp16[12] = a.fp32[4];
  dst.fp16[13] = a.fp32[5];
  dst.fp16[14] = a.fp32[6];
  dst.fp16[15] = a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 1 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvftint_l_d (__m256d a)`

**汇编指令**: `xvftint.l.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftint_l_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftint.l.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp64[0];
  dst.dword[1] = (s64)a.fp64[1];
  dst.dword[2] = (s64)a.fp64[2];
  dst.dword[3] = (s64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftint_lu_d (__m256d a)`

**汇编指令**: `xvftint.lu.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftint_lu_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftint.lu.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to unsigned 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (u64)a.fp64[0];
  dst.dword[1] = (u64)a.fp64[1];
  dst.dword[2] = (u64)a.fp64[2];
  dst.dword[3] = (u64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftint_w_d (__m256d a, __m256d b)`

**汇编指令**: `xvftint.w.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftint_w_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvftint.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6)
                    ? (s32)b.fp64[i - 2]
                    : (s32)a.fp64[i - 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
  dst.word[4] = (s32)b.fp64[2];
  dst.word[5] = (s32)b.fp64[3];
  dst.word[6] = (s32)a.fp64[2];
  dst.word[7] = (s32)a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftint_w_s (__m256 a)`

**汇编指令**: `xvftint.w.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftint_w_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftint.w.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)a.fp32[0];
  dst.word[1] = (s32)a.fp32[1];
  dst.word[2] = (s32)a.fp32[2];
  dst.word[3] = (s32)a.fp32[3];
  dst.word[4] = (s32)a.fp32[4];
  dst.word[5] = (s32)a.fp32[5];
  dst.word[6] = (s32)a.fp32[6];
  dst.word[7] = (s32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftint_wu_s (__m256 a)`

**汇编指令**: `xvftint.wu.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftint_wu_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftint.wu.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to unsigned 32-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (u32)a.fp32[0];
  dst.word[1] = (u32)a.fp32[1];
  dst.word[2] = (u32)a.fp32[2];
  dst.word[3] = (u32)a.fp32[3];
  dst.word[4] = (u32)a.fp32[4];
  dst.word[5] = (u32)a.fp32[5];
  dst.word[6] = (u32)a.fp32[6];
  dst.word[7] = (u32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftinth_l_s (__m256 a)`

**汇编指令**: `xvftinth.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftinth_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftinth.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[2];
  dst.dword[1] = (s64)a.fp32[3];
  dst.dword[2] = (s64)a.fp32[6];
  dst.dword[3] = (s64)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintl_l_s (__m256 a)`

**汇编指令**: `xvftintl.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintl_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintl.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, using current rounding mode specified in `fscr`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[0];
  dst.dword[1] = (s64)a.fp32[1];
  dst.dword[2] = (s64)a.fp32[4];
  dst.dword[3] = (s64)a.fp32[5];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrm_l_d (__m256d a)`

**汇编指令**: `xvftintrm.l.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrm_l_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftintrm.l.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp64[0];
  dst.dword[1] = (s64)a.fp64[1];
  dst.dword[2] = (s64)a.fp64[2];
  dst.dword[3] = (s64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrm_w_d (__m256d a, __m256d b)`

**汇编指令**: `xvftintrm.w.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrm_w_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvftintrm.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6)
                    ? (s32)b.fp64[i - 2]
                    : (s32)a.fp64[i - 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
  dst.word[4] = (s32)b.fp64[2];
  dst.word[5] = (s32)b.fp64[3];
  dst.word[6] = (s32)a.fp64[2];
  dst.word[7] = (s32)a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrm_w_s (__m256 a)`

**汇编指令**: `xvftintrm.w.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrm_w_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrm.w.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)a.fp32[0];
  dst.word[1] = (s32)a.fp32[1];
  dst.word[2] = (s32)a.fp32[2];
  dst.word[3] = (s32)a.fp32[3];
  dst.word[4] = (s32)a.fp32[4];
  dst.word[5] = (s32)a.fp32[5];
  dst.word[6] = (s32)a.fp32[6];
  dst.word[7] = (s32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrmh_l_s (__m256 a)`

**汇编指令**: `xvftintrmh.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrmh_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrmh.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[2];
  dst.dword[1] = (s64)a.fp32[3];
  dst.dword[2] = (s64)a.fp32[6];
  dst.dword[3] = (s64)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrml_l_s (__m256 a)`

**汇编指令**: `xvftintrml.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrml_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrml.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards negative infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[0];
  dst.dword[1] = (s64)a.fp32[1];
  dst.dword[2] = (s64)a.fp32[4];
  dst.dword[3] = (s64)a.fp32[5];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrne_l_d (__m256d a)`

**汇编指令**: `xvftintrne.l.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrne_l_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftintrne.l.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp64[0];
  dst.dword[1] = (s64)a.fp64[1];
  dst.dword[2] = (s64)a.fp64[2];
  dst.dword[3] = (s64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrne_w_d (__m256d a, __m256d b)`

**汇编指令**: `xvftintrne.w.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrne_w_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvftintrne.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6)
                    ? (s32)b.fp64[i - 2]
                    : (s32)a.fp64[i - 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
  dst.word[4] = (s32)b.fp64[2];
  dst.word[5] = (s32)b.fp64[3];
  dst.word[6] = (s32)a.fp64[2];
  dst.word[7] = (s32)a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrne_w_s (__m256 a)`

**汇编指令**: `xvftintrne.w.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrne_w_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrne.w.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)a.fp32[0];
  dst.word[1] = (s32)a.fp32[1];
  dst.word[2] = (s32)a.fp32[2];
  dst.word[3] = (s32)a.fp32[3];
  dst.word[4] = (s32)a.fp32[4];
  dst.word[5] = (s32)a.fp32[5];
  dst.word[6] = (s32)a.fp32[6];
  dst.word[7] = (s32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrneh_l_s (__m256 a)`

**汇编指令**: `xvftintrneh.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrneh_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrneh.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[2];
  dst.dword[1] = (s64)a.fp32[3];
  dst.dword[2] = (s64)a.fp32[6];
  dst.dword[3] = (s64)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrnel_l_s (__m256 a)`

**汇编指令**: `xvftintrnel.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrnel_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrnel.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards nearest even.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[0];
  dst.dword[1] = (s64)a.fp32[1];
  dst.dword[2] = (s64)a.fp32[4];
  dst.dword[3] = (s64)a.fp32[5];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrp_l_d (__m256d a)`

**汇编指令**: `xvftintrp.l.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrp_l_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftintrp.l.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp64[0];
  dst.dword[1] = (s64)a.fp64[1];
  dst.dword[2] = (s64)a.fp64[2];
  dst.dword[3] = (s64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrp_w_d (__m256d a, __m256d b)`

**汇编指令**: `xvftintrp.w.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrp_w_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvftintrp.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6)
                    ? (s32)b.fp64[i - 2]
                    : (s32)a.fp64[i - 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
  dst.word[4] = (s32)b.fp64[2];
  dst.word[5] = (s32)b.fp64[3];
  dst.word[6] = (s32)a.fp64[2];
  dst.word[7] = (s32)a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrp_w_s (__m256 a)`

**汇编指令**: `xvftintrp.w.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrp_w_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrp.w.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)a.fp32[0];
  dst.word[1] = (s32)a.fp32[1];
  dst.word[2] = (s32)a.fp32[2];
  dst.word[3] = (s32)a.fp32[3];
  dst.word[4] = (s32)a.fp32[4];
  dst.word[5] = (s32)a.fp32[5];
  dst.word[6] = (s32)a.fp32[6];
  dst.word[7] = (s32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrph_l_s (__m256 a)`

**汇编指令**: `xvftintrph.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrph_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrph.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[2];
  dst.dword[1] = (s64)a.fp32[3];
  dst.dword[2] = (s64)a.fp32[6];
  dst.dword[3] = (s64)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrpl_l_s (__m256 a)`

**汇编指令**: `xvftintrpl.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrpl_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrpl.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards positive infinity.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[0];
  dst.dword[1] = (s64)a.fp32[1];
  dst.dword[2] = (s64)a.fp32[4];
  dst.dword[3] = (s64)a.fp32[5];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrz_l_d (__m256d a)`

**汇编指令**: `xvftintrz.l.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrz_l_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftintrz.l.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp64[0];
  dst.dword[1] = (s64)a.fp64[1];
  dst.dword[2] = (s64)a.fp64[2];
  dst.dword[3] = (s64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrz_lu_d (__m256d a)`

**汇编指令**: `xvftintrz.lu.d xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrz_lu_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvftintrz.lu.d xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` to unsigned 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)a.fp64[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (u64)a.fp64[0];
  dst.dword[1] = (u64)a.fp64[1];
  dst.dword[2] = (u64)a.fp64[2];
  dst.dword[3] = (u64)a.fp64[3];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrz_w_d (__m256d a, __m256d b)`

**汇编指令**: `xvftintrz.w.d xr, xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrz_w_d (__m256d a, __m256d b)
#include <lasxintrin.h>
Instruction: xvftintrz.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2)
                    ? (s32)b.fp64[i]
                    : (s32)a.fp64[i - 2]; // rounding mode is not expressed in C
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6)
                    ? (s32)b.fp64[i - 2]
                    : (s32)a.fp64[i - 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)b.fp64[0];
  dst.word[1] = (s32)b.fp64[1];
  dst.word[2] = (s32)a.fp64[0];
  dst.word[3] = (s32)a.fp64[1];
  dst.word[4] = (s32)b.fp64[2];
  dst.word[5] = (s32)b.fp64[3];
  dst.word[6] = (s32)a.fp64[2];
  dst.word[7] = (s32)a.fp64[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrz_w_s (__m256 a)`

**汇编指令**: `xvftintrz.w.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrz_w_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrz.w.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (s32)a.fp32[0];
  dst.word[1] = (s32)a.fp32[1];
  dst.word[2] = (s32)a.fp32[2];
  dst.word[3] = (s32)a.fp32[3];
  dst.word[4] = (s32)a.fp32[4];
  dst.word[5] = (s32)a.fp32[5];
  dst.word[6] = (s32)a.fp32[6];
  dst.word[7] = (s32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrz_wu_s (__m256 a)`

**汇编指令**: `xvftintrz.wu.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrz_wu_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrz.wu.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in `a` to unsigned 32-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)a.fp32[i]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.word[0] = (u32)a.fp32[0];
  dst.word[1] = (u32)a.fp32[1];
  dst.word[2] = (u32)a.fp32[2];
  dst.word[3] = (u32)a.fp32[3];
  dst.word[4] = (u32)a.fp32[4];
  dst.word[5] = (u32)a.fp32[5];
  dst.word[6] = (u32)a.fp32[6];
  dst.word[7] = (u32)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 4 |
| 3C6000 | LA664 | 4 | 4 |

---

### `__m256i __lasx_xvftintrzh_l_s (__m256 a)`

**汇编指令**: `xvftintrzh.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrzh_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrzh.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 4]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[2];
  dst.dword[1] = (s64)a.fp32[3];
  dst.dword[2] = (s64)a.fp32[6];
  dst.dword[3] = (s64)a.fp32[7];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256i __lasx_xvftintrzl_l_s (__m256 a)`

**汇编指令**: `xvftintrzl.l.s xr, xr`  
**分类**: `Floating Point Conversion`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvftintrzl_l_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvftintrzl.l.s xr, xr
CPU Flags: LASX
```

#### Description

Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards zero.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)a.fp32[i]; // rounding mode is not expressed in C
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)a.fp32[i + 2]; // rounding mode is not expressed in C
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)a.fp32[0];
  dst.dword[1] = (s64)a.fp32[1];
  dst.dword[2] = (s64)a.fp32[4];
  dst.dword[3] = (s64)a.fp32[5];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 1 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

## Floating Point Misc

### `__m256 __lasx_xvfrint_s (__m256 a)`

**汇编指令**: `xvfrint.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrint_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrint.s xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256 __lasx_xvfrintrm_s (__m256 a)`

**汇编指令**: `xvfrintrm.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrintrm_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrintrm.s xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256 __lasx_xvfrintrne_s (__m256 a)`

**汇编指令**: `xvfrintrne.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrintrne_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrintrne.s xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256 __lasx_xvfrintrp_s (__m256 a)`

**汇编指令**: `xvfrintrp.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrintrp_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrintrp.s xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256 __lasx_xvfrintrz_s (__m256 a)`

**汇编指令**: `xvfrintrz.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfrintrz_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfrintrz.s xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = (fp32)(s32)a.fp32[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfrint_d (__m256d a)`

**汇编指令**: `xvfrint.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrint_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrint.d xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfrintrm_d (__m256d a)`

**汇编指令**: `xvfrintrm.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrintrm_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrintrm.d xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfrintrne_d (__m256d a)`

**汇编指令**: `xvfrintrne.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrintrne_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrintrne.d xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfrintrp_d (__m256d a)`

**汇编指令**: `xvfrintrp.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrintrp_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrintrp.d xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfrintrz_d (__m256d a)`

**汇编指令**: `xvfrintrz.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfrintrz_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfrintrz.d xr, xr
CPU Flags: LASX
```

#### Description

Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (fp64)(s64)a.fp64[i]; // rounding mode is not expressed in C
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvfclass_d (__m256d a)`

**汇编指令**: `xvfclass.d xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfclass_d (__m256d a)
#include <lasxintrin.h>
Instruction: xvfclass.d xr, xr
CPU Flags: LASX
```

#### Description

Classifiy each double precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = fp_classify(a.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvfclass_s (__m256 a)`

**汇编指令**: `xvfclass.s xr, xr`  
**分类**: `Floating Point Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfclass_s (__m256 a)
#include <lasxintrin.h>
Instruction: xvfclass.s xr, xr
CPU Flags: LASX
```

#### Description

Classifiy each single precision floating point elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.word[i] = fp_classify(a.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

## Fused Multiply-Add

### `__m256 __lasx_xvfmadd_s (__m256 a, __m256 b, __m256 c)`

**汇编指令**: `xvfmadd.s xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmadd_s (__m256 a, __m256 b, __m256 c)
#include <lasxintrin.h>
Instruction: xvfmadd.s xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256 __lasx_xvfmsub_s (__m256 a, __m256 b, __m256 c)`

**汇编指令**: `xvfmsub.s xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfmsub_s (__m256 a, __m256 b, __m256 c)
#include <lasxintrin.h>
Instruction: xvfmsub.s xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256 __lasx_xvfnmadd_s (__m256 a, __m256 b, __m256 c)`

**汇编指令**: `xvfnmadd.s xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfnmadd_s (__m256 a, __m256 b, __m256 c)
#include <lasxintrin.h>
Instruction: xvfnmadd.s xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256 __lasx_xvfnmsub_s (__m256 a, __m256 b, __m256 c)`

**汇编指令**: `xvfnmsub.s xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfnmsub_s (__m256 a, __m256 b, __m256 c)
#include <lasxintrin.h>
Instruction: xvfnmsub.s xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvfmadd_d (__m256d a, __m256d b, __m256d c)`

**汇编指令**: `xvfmadd.d xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmadd_d (__m256d a, __m256d b, __m256d c)
#include <lasxintrin.h>
Instruction: xvfmadd.d xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvfmsub_d (__m256d a, __m256d b, __m256d c)`

**汇编指令**: `xvfmsub.d xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfmsub_d (__m256d a, __m256d b, __m256d c)
#include <lasxintrin.h>
Instruction: xvfmsub.d xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i];
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvfnmadd_d (__m256d a, __m256d b, __m256d c)`

**汇编指令**: `xvfnmadd.d xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfnmadd_d (__m256d a, __m256d b, __m256d c)
#include <lasxintrin.h>
Instruction: xvfnmadd.d xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

### `__m256d __lasx_xvfnmsub_d (__m256d a, __m256d b, __m256d c)`

**汇编指令**: `xvfnmsub.d xr, xr, xr, xr`  
**分类**: `Fused Multiply-Add`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfnmsub_d (__m256d a, __m256d b, __m256d c)
#include <lasxintrin.h>
Instruction: xvfnmsub.d xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]);
}
```

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 5 | 2 |
| 3A6000 | LA664 | 5 | 2 |
| 3C6000 | LA664 | 5 | 2 |

---

## Integer Comparison

### `__m256i __lasx_xvseq_b (__m256i a, __m256i b)`

**汇编指令**: `xvseq.b xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseq_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvseq.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the 8-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (a.byte[i] == b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseq_d (__m256i a, __m256i b)`

**汇编指令**: `xvseq.d xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseq_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvseq.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the 64-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (a.dword[i] == b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseq_h (__m256i a, __m256i b)`

**汇编指令**: `xvseq.h xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseq_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvseq.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the 16-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (a.half[i] == b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseq_w (__m256i a, __m256i b)`

**汇编指令**: `xvseq.w xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseq_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvseq.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the 32-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (a.word[i] == b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseqi_b (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvseqi.b xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseqi_b (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvseqi.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the 8-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] == imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseqi_d (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvseqi.d xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseqi_d (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvseqi.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the 64-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] == imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseqi_h (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvseqi.h xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseqi_h (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvseqi.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the 16-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] == imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvseqi_w (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvseqi.w xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvseqi_w (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvseqi.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the 32-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] == imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_b (__m256i a, __m256i b)`

**汇编指令**: `xvsle.b xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] <= (s8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_bu (__m256i a, __m256i b)`

**汇编指令**: `xvsle.bu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] <= (u8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_d (__m256i a, __m256i b)`

**汇编指令**: `xvsle.d xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] <= (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvsle_du (__m256i a, __m256i b)`

**汇编指令**: `xvsle.du xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] <= (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvsle_h (__m256i a, __m256i b)`

**汇编指令**: `xvsle.h xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] <= (s16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_hu (__m256i a, __m256i b)`

**汇编指令**: `xvsle.hu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] <= (u16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_w (__m256i a, __m256i b)`

**汇编指令**: `xvsle.w xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] <= (s32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsle_wu (__m256i a, __m256i b)`

**汇编指令**: `xvsle.wu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsle_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsle.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] <= (u32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_b (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslei.b xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_b (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslei.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] <= imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslei.bu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslei.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] <= imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_d (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslei.d xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_d (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslei.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] <= imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslei_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslei.du xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslei.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] <= imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslei_h (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslei.h xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_h (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslei.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] <= imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslei.hu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslei.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] <= imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_w (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslei.w xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_w (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslei.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] <= imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslei_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslei.wu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslei_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslei.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] <= imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_b (__m256i a, __m256i b)`

**汇编指令**: `xvslt.b xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_bu (__m256i a, __m256i b)`

**汇编指令**: `xvslt.bu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_d (__m256i a, __m256i b)`

**汇编指令**: `xvslt.d xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslt_du (__m256i a, __m256i b)`

**汇编指令**: `xvslt.du xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslt_h (__m256i a, __m256i b)`

**汇编指令**: `xvslt.h xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_hu (__m256i a, __m256i b)`

**汇编指令**: `xvslt.hu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_w (__m256i a, __m256i b)`

**汇编指令**: `xvslt.w xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslt_wu (__m256i a, __m256i b)`

**汇编指令**: `xvslt.wu xr, xr, xr`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslt_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvslt.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_b (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslti.b xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_b (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslti.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] < imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslti.bu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslti.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] < imm) ? 0xFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_d (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslti.d xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_d (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslti.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] < imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslti_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslti.du xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslti.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] < imm) ? 0xFFFFFFFFFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvslti_h (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslti.h xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_h (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslti.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] < imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslti.hu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslti.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] < imm) ? 0xFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_w (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvslti.w xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_w (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvslti.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] < imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslti_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslti.wu xr, xr, imm`  
**分类**: `Integer Comparison`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslti_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslti.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] < imm) ? 0xFFFFFFFF : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

## Integer Computation

### `__m256i __lasx_xvabsd_b (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] > (s8)b.byte[i]) ? (a.byte[i] - b.byte[i])
                                                : (b.byte[i] - a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_bu (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] > (u8)b.byte[i]) ? (a.byte[i] - b.byte[i])
                                                : (b.byte[i] - a.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_d (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] > (s64)b.dword[i])
                     ? (a.dword[i] - b.dword[i])
                     : (b.dword[i] - a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_du (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] > (u64)b.dword[i])
                     ? (a.dword[i] - b.dword[i])
                     : (b.dword[i] - a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_h (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] > (s16)b.half[i]) ? (a.half[i] - b.half[i])
                                                  : (b.half[i] - a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_hu (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] > (u16)b.half[i]) ? (a.half[i] - b.half[i])
                                                  : (b.half[i] - a.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_w (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] > (s32)b.word[i]) ? (a.word[i] - b.word[i])
                                                  : (b.word[i] - a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvabsd_wu (__m256i a, __m256i b)`

**汇编指令**: `xvabsd.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvabsd_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvabsd.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute absolute difference of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] > (u32)b.word[i]) ? (a.word[i] - b.word[i])
                                                  : (b.word[i] - a.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvadd_b (__m256i a, __m256i b)`

**汇编指令**: `xvadd.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadd_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadd.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] + b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvadd_d (__m256i a, __m256i b)`

**汇编指令**: `xvadd.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadd_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadd.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] + b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvadd_h (__m256i a, __m256i b)`

**汇编指令**: `xvadd.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadd_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadd.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] + b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvadd_q (__m256i a, __m256i b)`

**汇编指令**: `xvadd.q xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadd_q (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadd.q xr, xr, xr
CPU Flags: LASX
```

#### Description

Add 128-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = a.qword[i] + b.qword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvadd_w (__m256i a, __m256i b)`

**汇编指令**: `xvadd.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadd_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadd.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] + b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvadda_b (__m256i a, __m256i b)`

**汇编指令**: `xvadda.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadda_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadda.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add absolute of 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = abs((s8)a.byte[i]) + abs((s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvadda_d (__m256i a, __m256i b)`

**汇编指令**: `xvadda.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadda_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadda.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add absolute of 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = abs((s64)a.dword[i]) + abs((s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvadda_h (__m256i a, __m256i b)`

**汇编指令**: `xvadda.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadda_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadda.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add absolute of 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = abs((s16)a.half[i]) + abs((s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvadda_w (__m256i a, __m256i b)`

**汇编指令**: `xvadda.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvadda_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvadda.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add absolute of 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = abs((s32)a.word[i]) + abs((s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddi_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvaddi.bu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddi_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvaddi.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Add 8-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvaddi_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvaddi.du xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddi_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvaddi.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Add 64-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvaddi_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvaddi.hu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddi_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvaddi.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Add 16-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvaddi_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvaddi.wu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddi_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvaddi.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Add 32-bit elements in `a` and `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] + imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvaddwev_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) + ((s64)((s32)b.word[2]));
  dst.dword[2] = ((s64)((s32)a.word[4])) + ((s64)((s32)b.word[4]));
  dst.dword[3] = ((s64)((s32)a.word[6])) + ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) + ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) + ((u64)((u32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[4])) + ((u64)((u32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[6])) + ((u64)((u32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_d_wu_w (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_d_wu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) + ((s64)((s32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[4])) + ((s64)((s32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[6])) + ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) + ((s16)((s8)b.byte[14]));
  dst.half[8] = ((s16)((s8)a.byte[16])) + ((s16)((s8)b.byte[16]));
  dst.half[9] = ((s16)((s8)a.byte[18])) + ((s16)((s8)b.byte[18]));
  dst.half[10] = ((s16)((s8)a.byte[20])) + ((s16)((s8)b.byte[20]));
  dst.half[11] = ((s16)((s8)a.byte[22])) + ((s16)((s8)b.byte[22]));
  dst.half[12] = ((s16)((s8)a.byte[24])) + ((s16)((s8)b.byte[24]));
  dst.half[13] = ((s16)((s8)a.byte[26])) + ((s16)((s8)b.byte[26]));
  dst.half[14] = ((s16)((s8)a.byte[28])) + ((s16)((s8)b.byte[28]));
  dst.half[15] = ((s16)((s8)a.byte[30])) + ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) + ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) + ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) + ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) + ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) + ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) + ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) + ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) + ((u16)((u8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[16])) + ((u16)((u8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[18])) + ((u16)((u8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[20])) + ((u16)((u8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[22])) + ((u16)((u8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[24])) + ((u16)((u8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[26])) + ((u16)((u8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[28])) + ((u16)((u8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[30])) + ((u16)((u8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_h_bu_b (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_h_bu_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) + ((s16)((s8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[16])) + ((s16)((s8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[18])) + ((s16)((s8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[20])) + ((s16)((s8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[22])) + ((s16)((s8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[24])) + ((s16)((s8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[26])) + ((s16)((s8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[28])) + ((s16)((s8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[30])) + ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) + ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((s128)((s64)a.dword[2])) + ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwev_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) + ((u128)((u64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[2])) + ((u128)((u64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwev_q_du_d (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_q_du_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) + ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[2])) + ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwev_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) + ((s32)((s16)b.half[6]));
  dst.word[4] = ((s32)((s16)a.half[8])) + ((s32)((s16)b.half[8]));
  dst.word[5] = ((s32)((s16)a.half[10])) + ((s32)((s16)b.half[10]));
  dst.word[6] = ((s32)((s16)a.half[12])) + ((s32)((s16)b.half[12]));
  dst.word[7] = ((s32)((s16)a.half[14])) + ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) + ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) + ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) + ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) + ((u32)((u16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[8])) + ((u32)((u16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[10])) + ((u32)((u16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[12])) + ((u32)((u16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[14])) + ((u32)((u16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwev_w_hu_h (__m256i a, __m256i b)`

**汇编指令**: `xvaddwev.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwev_w_hu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwev.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) + ((s32)((s16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[8])) + ((s32)((s16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[10])) + ((s32)((s16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[12])) + ((s32)((s16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[14])) + ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) + ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) + ((s64)((s32)b.word[3]));
  dst.dword[2] = ((s64)((s32)a.word[5])) + ((s64)((s32)b.word[5]));
  dst.dword[3] = ((s64)((s32)a.word[7])) + ((s64)((s32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((u64)((u32)b.word[3]));
  dst.dword[2] = ((u64)((u32)a.word[5])) + ((u64)((u32)b.word[5]));
  dst.dword[3] = ((u64)((u32)a.word[7])) + ((u64)((u32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_d_wu_w (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_d_wu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((s64)((s32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((s64)((s32)b.word[3]));
  dst.dword[2] = ((u64)((u32)a.word[5])) + ((s64)((s32)b.word[5]));
  dst.dword[3] = ((u64)((u32)a.word[7])) + ((s64)((s32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) + ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) + ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) + ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) + ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) + ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) + ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) + ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) + ((s16)((s8)b.byte[15]));
  dst.half[8] = ((s16)((s8)a.byte[17])) + ((s16)((s8)b.byte[17]));
  dst.half[9] = ((s16)((s8)a.byte[19])) + ((s16)((s8)b.byte[19]));
  dst.half[10] = ((s16)((s8)a.byte[21])) + ((s16)((s8)b.byte[21]));
  dst.half[11] = ((s16)((s8)a.byte[23])) + ((s16)((s8)b.byte[23]));
  dst.half[12] = ((s16)((s8)a.byte[25])) + ((s16)((s8)b.byte[25]));
  dst.half[13] = ((s16)((s8)a.byte[27])) + ((s16)((s8)b.byte[27]));
  dst.half[14] = ((s16)((s8)a.byte[29])) + ((s16)((s8)b.byte[29]));
  dst.half[15] = ((s16)((s8)a.byte[31])) + ((s16)((s8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((u16)((u8)b.byte[15]));
  dst.half[8] = ((u16)((u8)a.byte[17])) + ((u16)((u8)b.byte[17]));
  dst.half[9] = ((u16)((u8)a.byte[19])) + ((u16)((u8)b.byte[19]));
  dst.half[10] = ((u16)((u8)a.byte[21])) + ((u16)((u8)b.byte[21]));
  dst.half[11] = ((u16)((u8)a.byte[23])) + ((u16)((u8)b.byte[23]));
  dst.half[12] = ((u16)((u8)a.byte[25])) + ((u16)((u8)b.byte[25]));
  dst.half[13] = ((u16)((u8)a.byte[27])) + ((u16)((u8)b.byte[27]));
  dst.half[14] = ((u16)((u8)a.byte[29])) + ((u16)((u8)b.byte[29]));
  dst.half[15] = ((u16)((u8)a.byte[31])) + ((u16)((u8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_h_bu_b (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_h_bu_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((s16)((s8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((s16)((s8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((s16)((s8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((s16)((s8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((s16)((s8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((s16)((s8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((s16)((s8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((s16)((s8)b.byte[15]));
  dst.half[8] = ((u16)((u8)a.byte[17])) + ((s16)((s8)b.byte[17]));
  dst.half[9] = ((u16)((u8)a.byte[19])) + ((s16)((s8)b.byte[19]));
  dst.half[10] = ((u16)((u8)a.byte[21])) + ((s16)((s8)b.byte[21]));
  dst.half[11] = ((u16)((u8)a.byte[23])) + ((s16)((s8)b.byte[23]));
  dst.half[12] = ((u16)((u8)a.byte[25])) + ((s16)((s8)b.byte[25]));
  dst.half[13] = ((u16)((u8)a.byte[27])) + ((s16)((s8)b.byte[27]));
  dst.half[14] = ((u16)((u8)a.byte[29])) + ((s16)((s8)b.byte[29]));
  dst.half[15] = ((u16)((u8)a.byte[31])) + ((s16)((s8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) + ((s128)((s64)b.dword[1]));
  dst.qword[1] = ((s128)((s64)a.dword[3])) + ((s128)((s64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwod_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((u128)((u64)b.dword[1]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) + ((u128)((u64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwod_q_du_d (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_q_du_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((s128)((s64)b.dword[1]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) + ((s128)((s64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvaddwod_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) + ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) + ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) + ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) + ((s32)((s16)b.half[7]));
  dst.word[4] = ((s32)((s16)a.half[9])) + ((s32)((s16)b.half[9]));
  dst.word[5] = ((s32)((s16)a.half[11])) + ((s32)((s16)b.half[11]));
  dst.word[6] = ((s32)((s16)a.half[13])) + ((s32)((s16)b.half[13]));
  dst.word[7] = ((s32)((s16)a.half[15])) + ((s32)((s16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((u32)((u16)b.half[7]));
  dst.word[4] = ((u32)((u16)a.half[9])) + ((u32)((u16)b.half[9]));
  dst.word[5] = ((u32)((u16)a.half[11])) + ((u32)((u16)b.half[11]));
  dst.word[6] = ((u32)((u16)a.half[13])) + ((u32)((u16)b.half[13]));
  dst.word[7] = ((u32)((u16)a.half[15])) + ((u32)((u16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvaddwod_w_hu_h (__m256i a, __m256i b)`

**汇编指令**: `xvaddwod.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvaddwod_w_hu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvaddwod.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((s32)((s16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((s32)((s16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((s32)((s16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((s32)((s16)b.half[7]));
  dst.word[4] = ((u32)((u16)a.half[9])) + ((s32)((s16)b.half[9]));
  dst.word[5] = ((u32)((u16)a.half[11])) + ((s32)((s16)b.half[11]));
  dst.word[6] = ((u32)((u16)a.half[13])) + ((s32)((s16)b.half[13]));
  dst.word[7] = ((u32)((u16)a.half[15])) + ((s32)((s16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvavg_b (__m256i a, __m256i b)`

**汇编指令**: `xvavg.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) +
                ((a.byte[i] & b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavg_bu (__m256i a, __m256i b)`

**汇编指令**: `xvavg.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) +
                ((a.byte[i] & b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavg_d (__m256i a, __m256i b)`

**汇编指令**: `xvavg.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
                 ((a.dword[i] & b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvavg_du (__m256i a, __m256i b)`

**汇编指令**: `xvavg.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
                 ((a.dword[i] & b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvavg_h (__m256i a, __m256i b)`

**汇编指令**: `xvavg.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
                ((a.half[i] & b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavg_hu (__m256i a, __m256i b)`

**汇编指令**: `xvavg.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
                ((a.half[i] & b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavg_w (__m256i a, __m256i b)`

**汇编指令**: `xvavg.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
                ((a.word[i] & b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavg_wu (__m256i a, __m256i b)`

**汇编指令**: `xvavg.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavg_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavg.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
                ((a.word[i] & b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_b (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) +
                ((a.byte[i] | b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_bu (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) +
                ((a.byte[i] | b.byte[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_d (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
                 ((a.dword[i] | b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvavgr_du (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
                 ((a.dword[i] | b.dword[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvavgr_h (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
                ((a.half[i] | b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_hu (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
                ((a.half[i] | b.half[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_w (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
                ((a.word[i] | b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvavgr_wu (__m256i a, __m256i b)`

**汇编指令**: `xvavgr.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvavgr_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvavgr.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
                ((a.word[i] | b.word[i]) & 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvdiv_b (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide signed 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] / (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 32, 36 | 0.05(1/20.5) |
| 3A6000 | LA664 | 29, 32 | 0.06(1/15.5) |
| 3C6000 | LA664 | 55, 57 | 0.04(1/27.5) |

---

### `__m256i __lasx_xvdiv_bu (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide unsigned 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] / (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 36 | 0.05(1/20.5) |
| 3A6000 | LA664 | 29, 33 | 0.06(1/16.5) |
| 3C6000 | LA664 | 29, 36 | 0.07(1/13.5) |

---

### `__m256i __lasx_xvdiv_d (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide signed 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] / (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 18.5 | 0.11(1/9) |
| 3A6000 | LA664 | 8 | 0.25(1/4) |
| 3C6000 | LA664 | 18.5, 19 | 0.12(1/8.5) |

---

### `__m256i __lasx_xvdiv_du (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide unsigned 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] / (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 18.5 | 0.11(1/9) |
| 3A6000 | LA664 | 8 | 0.25(1/4) |
| 3C6000 | LA664 | 8, 18.5 | 0.33(1/3) |

---

### `__m256i __lasx_xvdiv_h (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide signed 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] / (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 21.5, 22 | 0.08(1/13) |
| 3A6000 | LA664 | 17 | 0.12(1/8.5) |
| 3C6000 | LA664 | 34, 40 | 0.05(1/19) |

---

### `__m256i __lasx_xvdiv_hu (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide unsigned 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] / (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21.5 | 0.07(1/15) |
| 3A6000 | LA664 | 17, 22 | 0.11(1/9) |
| 3C6000 | LA664 | 17, 21.5 | 0.13(1/7.5) |

---

### `__m256i __lasx_xvdiv_w (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide signed 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] / (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 17.5 | 0.09(1/11.5) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 23.5, 30 | 0.13(1/7.5) |

---

### `__m256i __lasx_xvdiv_wu (__m256i a, __m256i b)`

**汇编指令**: `xvdiv.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvdiv_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvdiv.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Divide unsigned 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] / (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 17.5 | 0.07(1/15) |
| 3A6000 | LA664 | 11 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11, 17.5 | 0.22(1/4.5) |

---

### `__m256i __lasx_xvhaddw_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 32-bit elements in `a` to even-positioned signed 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) + ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[3])) + ((s64)((s32)b.word[2]));
  dst.dword[2] = ((s64)((s32)a.word[5])) + ((s64)((s32)b.word[4]));
  dst.dword[3] = ((s64)((s32)a.word[7])) + ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhaddw_du_wu (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.du.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_du_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.du.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 32-bit elements in `a` to even-positioned unsigned 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) + ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[3])) + ((u64)((u32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[5])) + ((u64)((u32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[7])) + ((u64)((u32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhaddw_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 8-bit elements in `a` to even-positioned signed 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) + ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[3])) + ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[5])) + ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[7])) + ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[9])) + ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[11])) + ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[13])) + ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[15])) + ((s16)((s8)b.byte[14]));
  dst.half[8] = ((s16)((s8)a.byte[17])) + ((s16)((s8)b.byte[16]));
  dst.half[9] = ((s16)((s8)a.byte[19])) + ((s16)((s8)b.byte[18]));
  dst.half[10] = ((s16)((s8)a.byte[21])) + ((s16)((s8)b.byte[20]));
  dst.half[11] = ((s16)((s8)a.byte[23])) + ((s16)((s8)b.byte[22]));
  dst.half[12] = ((s16)((s8)a.byte[25])) + ((s16)((s8)b.byte[24]));
  dst.half[13] = ((s16)((s8)a.byte[27])) + ((s16)((s8)b.byte[26]));
  dst.half[14] = ((s16)((s8)a.byte[29])) + ((s16)((s8)b.byte[28]));
  dst.half[15] = ((s16)((s8)a.byte[31])) + ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhaddw_hu_bu (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.hu.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_hu_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.hu.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 8-bit elements in `a` to even-positioned unsigned 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) + ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[3])) + ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[5])) + ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[7])) + ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[9])) + ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[11])) + ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[13])) + ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[15])) + ((u16)((u8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[17])) + ((u16)((u8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[19])) + ((u16)((u8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[21])) + ((u16)((u8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[23])) + ((u16)((u8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[25])) + ((u16)((u8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[27])) + ((u16)((u8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[29])) + ((u16)((u8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[31])) + ((u16)((u8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhaddw_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 64-bit elements in `a` to even-positioned signed 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) + ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((s128)((s64)a.dword[3])) + ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvhaddw_qu_du (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.qu.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_qu_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.qu.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 64-bit elements in `a` to even-positioned unsigned 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) + ((u128)((u64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) + ((u128)((u64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvhaddw_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned signed 16-bit elements in `a` to even-positioned signed 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) + ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[3])) + ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[5])) + ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[7])) + ((s32)((s16)b.half[6]));
  dst.word[4] = ((s32)((s16)a.half[9])) + ((s32)((s16)b.half[8]));
  dst.word[5] = ((s32)((s16)a.half[11])) + ((s32)((s16)b.half[10]));
  dst.word[6] = ((s32)((s16)a.half[13])) + ((s32)((s16)b.half[12]));
  dst.word[7] = ((s32)((s16)a.half[15])) + ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhaddw_wu_hu (__m256i a, __m256i b)`

**汇编指令**: `xvhaddw.wu.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhaddw_wu_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhaddw.wu.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Add odd-positioned unsigned 16-bit elements in `a` to even-positioned unsigned 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) + ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[3])) + ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[5])) + ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[7])) + ((u32)((u16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[9])) + ((u32)((u16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[11])) + ((u32)((u16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[13])) + ((u32)((u16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[15])) + ((u32)((u16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 32-bit elements in `a` by even-positioned signed 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) - ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[3])) - ((s64)((s32)b.word[2]));
  dst.dword[2] = ((s64)((s32)a.word[5])) - ((s64)((s32)b.word[4]));
  dst.dword[3] = ((s64)((s32)a.word[7])) - ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_du_wu (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.du.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_du_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.du.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 32-bit elements in `a` by even-positioned unsigned 32-bit elements in `b` to get 64-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) - ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[3])) - ((u64)((u32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[5])) - ((u64)((u32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[7])) - ((u64)((u32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 8-bit elements in `a` by even-positioned signed 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) - ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[3])) - ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[5])) - ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[7])) - ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[9])) - ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[11])) - ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[13])) - ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[15])) - ((s16)((s8)b.byte[14]));
  dst.half[8] = ((s16)((s8)a.byte[17])) - ((s16)((s8)b.byte[16]));
  dst.half[9] = ((s16)((s8)a.byte[19])) - ((s16)((s8)b.byte[18]));
  dst.half[10] = ((s16)((s8)a.byte[21])) - ((s16)((s8)b.byte[20]));
  dst.half[11] = ((s16)((s8)a.byte[23])) - ((s16)((s8)b.byte[22]));
  dst.half[12] = ((s16)((s8)a.byte[25])) - ((s16)((s8)b.byte[24]));
  dst.half[13] = ((s16)((s8)a.byte[27])) - ((s16)((s8)b.byte[26]));
  dst.half[14] = ((s16)((s8)a.byte[29])) - ((s16)((s8)b.byte[28]));
  dst.half[15] = ((s16)((s8)a.byte[31])) - ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_hu_bu (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.hu.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_hu_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.hu.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 8-bit elements in `a` by even-positioned unsigned 8-bit elements in `b` to get 16-bit result.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) - ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[3])) - ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[5])) - ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[7])) - ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[9])) - ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[11])) - ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[13])) - ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[15])) - ((u16)((u8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[17])) - ((u16)((u8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[19])) - ((u16)((u8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[21])) - ((u16)((u8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[23])) - ((u16)((u8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[25])) - ((u16)((u8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[27])) - ((u16)((u8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[29])) - ((u16)((u8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[31])) - ((u16)((u8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 64-bit elements in `a` by even-positioned signed 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) - ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((s128)((s64)a.dword[3])) - ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvhsubw_qu_du (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.qu.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_qu_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.qu.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 64-bit elements in `a` by even-positioned unsigned 64-bit elements in `b` to get 128-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) - ((u128)((u64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) - ((u128)((u64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvhsubw_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 16-bit elements in `a` by even-positioned signed 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) - ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[3])) - ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[5])) - ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[7])) - ((s32)((s16)b.half[6]));
  dst.word[4] = ((s32)((s16)a.half[9])) - ((s32)((s16)b.half[8]));
  dst.word[5] = ((s32)((s16)a.half[11])) - ((s32)((s16)b.half[10]));
  dst.word[6] = ((s32)((s16)a.half[13])) - ((s32)((s16)b.half[12]));
  dst.word[7] = ((s32)((s16)a.half[15])) - ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvhsubw_wu_hu (__m256i a, __m256i b)`

**汇编指令**: `xvhsubw.wu.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhsubw_wu_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvhsubw.wu.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 16-bit elements in `a` by even-positioned unsigned 16-bit elements in `b` to get 32-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) - ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[3])) - ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[5])) - ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[7])) - ((u32)((u16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[9])) - ((u32)((u16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[11])) - ((u32)((u16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[13])) - ((u32)((u16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[15])) - ((u32)((u16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvmadd_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmadd.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmadd_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmadd.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 8-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = b.byte[i] * c.byte[i] + a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmadd_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmadd.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmadd_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmadd.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 64-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = b.dword[i] * c.dword[i] + a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmadd_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmadd.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmadd_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmadd.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 16-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = b.half[i] * c.half[i] + a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmadd_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmadd.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmadd_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmadd.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 32-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = b.word[i] * c.word[i] + a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_d_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_d_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] =
      (s64)(s32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((s64)((s32)b.word[0])) * ((s64)((s32)c.word[0]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((s64)((s32)b.word[2])) * ((s64)((s32)c.word[2]))) + ((s64)a.dword[1]);
  dst.dword[2] =
      (((s64)((s32)b.word[4])) * ((s64)((s32)c.word[4]))) + ((s64)a.dword[2]);
  dst.dword[3] =
      (((s64)((s32)b.word[6])) * ((s64)((s32)c.word[6]))) + ((s64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_d_wu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_d_wu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] =
      (u64)(u32)b.word[2 * i] * (u64)(u32)c.word[2 * i] + (u64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[0])) * ((u64)((u32)c.word[0]))) + ((u64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[2])) * ((u64)((u32)c.word[2]))) + ((u64)a.dword[1]);
  dst.dword[2] =
      (((u64)((u32)b.word[4])) * ((u64)((u32)c.word[4]))) + ((u64)a.dword[2]);
  dst.dword[3] =
      (((u64)((u32)b.word[6])) * ((u64)((u32)c.word[6]))) + ((u64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_d_wu_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_d_wu_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] =
      (u64)(u32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[0])) * ((s64)((s32)c.word[0]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[2])) * ((s64)((s32)c.word[2]))) + ((s64)a.dword[1]);
  dst.dword[2] =
      (((u64)((u32)b.word[4])) * ((s64)((s32)c.word[4]))) + ((s64)a.dword[2]);
  dst.dword[3] =
      (((u64)((u32)b.word[6])) * ((s64)((s32)c.word[6]))) + ((s64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_h_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_h_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (s16)(s8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((s16)((s8)b.byte[0])) * ((s16)((s8)c.byte[0]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((s16)((s8)b.byte[2])) * ((s16)((s8)c.byte[2]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((s16)((s8)b.byte[4])) * ((s16)((s8)c.byte[4]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((s16)((s8)b.byte[6])) * ((s16)((s8)c.byte[6]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((s16)((s8)b.byte[8])) * ((s16)((s8)c.byte[8]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((s16)((s8)b.byte[10])) * ((s16)((s8)c.byte[10]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((s16)((s8)b.byte[12])) * ((s16)((s8)c.byte[12]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((s16)((s8)b.byte[14])) * ((s16)((s8)c.byte[14]))) + ((s16)a.half[7]);
  dst.half[8] =
      (((s16)((s8)b.byte[16])) * ((s16)((s8)c.byte[16]))) + ((s16)a.half[8]);
  dst.half[9] =
      (((s16)((s8)b.byte[18])) * ((s16)((s8)c.byte[18]))) + ((s16)a.half[9]);
  dst.half[10] =
      (((s16)((s8)b.byte[20])) * ((s16)((s8)c.byte[20]))) + ((s16)a.half[10]);
  dst.half[11] =
      (((s16)((s8)b.byte[22])) * ((s16)((s8)c.byte[22]))) + ((s16)a.half[11]);
  dst.half[12] =
      (((s16)((s8)b.byte[24])) * ((s16)((s8)c.byte[24]))) + ((s16)a.half[12]);
  dst.half[13] =
      (((s16)((s8)b.byte[26])) * ((s16)((s8)c.byte[26]))) + ((s16)a.half[13]);
  dst.half[14] =
      (((s16)((s8)b.byte[28])) * ((s16)((s8)c.byte[28]))) + ((s16)a.half[14]);
  dst.half[15] =
      (((s16)((s8)b.byte[30])) * ((s16)((s8)c.byte[30]))) + ((s16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_h_bu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_h_bu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i] * (u16)(u8)c.byte[2 * i] + (u16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[0])) * ((u16)((u8)c.byte[0]))) + ((u16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[2])) * ((u16)((u8)c.byte[2]))) + ((u16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[4])) * ((u16)((u8)c.byte[4]))) + ((u16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[6])) * ((u16)((u8)c.byte[6]))) + ((u16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[8])) * ((u16)((u8)c.byte[8]))) + ((u16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[10])) * ((u16)((u8)c.byte[10]))) + ((u16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[12])) * ((u16)((u8)c.byte[12]))) + ((u16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[14])) * ((u16)((u8)c.byte[14]))) + ((u16)a.half[7]);
  dst.half[8] =
      (((u16)((u8)b.byte[16])) * ((u16)((u8)c.byte[16]))) + ((u16)a.half[8]);
  dst.half[9] =
      (((u16)((u8)b.byte[18])) * ((u16)((u8)c.byte[18]))) + ((u16)a.half[9]);
  dst.half[10] =
      (((u16)((u8)b.byte[20])) * ((u16)((u8)c.byte[20]))) + ((u16)a.half[10]);
  dst.half[11] =
      (((u16)((u8)b.byte[22])) * ((u16)((u8)c.byte[22]))) + ((u16)a.half[11]);
  dst.half[12] =
      (((u16)((u8)b.byte[24])) * ((u16)((u8)c.byte[24]))) + ((u16)a.half[12]);
  dst.half[13] =
      (((u16)((u8)b.byte[26])) * ((u16)((u8)c.byte[26]))) + ((u16)a.half[13]);
  dst.half[14] =
      (((u16)((u8)b.byte[28])) * ((u16)((u8)c.byte[28]))) + ((u16)a.half[14]);
  dst.half[15] =
      (((u16)((u8)b.byte[30])) * ((u16)((u8)c.byte[30]))) + ((u16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_h_bu_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_h_bu_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[0])) * ((s16)((s8)c.byte[0]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[2])) * ((s16)((s8)c.byte[2]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[4])) * ((s16)((s8)c.byte[4]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[6])) * ((s16)((s8)c.byte[6]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[8])) * ((s16)((s8)c.byte[8]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[10])) * ((s16)((s8)c.byte[10]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[12])) * ((s16)((s8)c.byte[12]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[14])) * ((s16)((s8)c.byte[14]))) + ((s16)a.half[7]);
  dst.half[8] =
      (((u16)((u8)b.byte[16])) * ((s16)((s8)c.byte[16]))) + ((s16)a.half[8]);
  dst.half[9] =
      (((u16)((u8)b.byte[18])) * ((s16)((s8)c.byte[18]))) + ((s16)a.half[9]);
  dst.half[10] =
      (((u16)((u8)b.byte[20])) * ((s16)((s8)c.byte[20]))) + ((s16)a.half[10]);
  dst.half[11] =
      (((u16)((u8)b.byte[22])) * ((s16)((s8)c.byte[22]))) + ((s16)a.half[11]);
  dst.half[12] =
      (((u16)((u8)b.byte[24])) * ((s16)((s8)c.byte[24]))) + ((s16)a.half[12]);
  dst.half[13] =
      (((u16)((u8)b.byte[26])) * ((s16)((s8)c.byte[26]))) + ((s16)a.half[13]);
  dst.half[14] =
      (((u16)((u8)b.byte[28])) * ((s16)((s8)c.byte[28]))) + ((s16)a.half[14]);
  dst.half[15] =
      (((u16)((u8)b.byte[30])) * ((s16)((s8)c.byte[30]))) + ((s16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_q_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_q_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] =
      (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((s128)((s64)b.dword[0])) * ((s128)((s64)c.dword[0]))) +
                 ((s128)a.qword[0]);
  dst.qword[1] = (((s128)((s64)b.dword[2])) * ((s128)((s64)c.dword[2]))) +
                 ((s128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwev_q_du (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_q_du (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] =
      (u128)(u64)b.dword[2 * i] * (u128)(u64)c.dword[2 * i] + (u128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[0])) * ((u128)((u64)c.dword[0]))) +
                 ((u128)a.qword[0]);
  dst.qword[1] = (((u128)((u64)b.dword[2])) * ((u128)((u64)c.dword[2]))) +
                 ((u128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwev_q_du_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_q_du_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] =
      (u128)(u64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[0])) * ((s128)((s64)c.dword[0]))) +
                 ((s128)a.qword[0]);
  dst.qword[1] = (((u128)((u64)b.dword[2])) * ((s128)((s64)c.dword[2]))) +
                 ((s128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwev_w_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_w_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] =
      (s32)(s16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((s32)((s16)b.half[0])) * ((s32)((s16)c.half[0]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((s32)((s16)b.half[2])) * ((s32)((s16)c.half[2]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((s32)((s16)b.half[4])) * ((s32)((s16)c.half[4]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((s32)((s16)b.half[6])) * ((s32)((s16)c.half[6]))) + ((s32)a.word[3]);
  dst.word[4] =
      (((s32)((s16)b.half[8])) * ((s32)((s16)c.half[8]))) + ((s32)a.word[4]);
  dst.word[5] =
      (((s32)((s16)b.half[10])) * ((s32)((s16)c.half[10]))) + ((s32)a.word[5]);
  dst.word[6] =
      (((s32)((s16)b.half[12])) * ((s32)((s16)c.half[12]))) + ((s32)a.word[6]);
  dst.word[7] =
      (((s32)((s16)b.half[14])) * ((s32)((s16)c.half[14]))) + ((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_w_hu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_w_hu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] =
      (u32)(u16)b.half[2 * i] * (u32)(u16)c.half[2 * i] + (u32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[0])) * ((u32)((u16)c.half[0]))) + ((u32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[2])) * ((u32)((u16)c.half[2]))) + ((u32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[4])) * ((u32)((u16)c.half[4]))) + ((u32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[6])) * ((u32)((u16)c.half[6]))) + ((u32)a.word[3]);
  dst.word[4] =
      (((u32)((u16)b.half[8])) * ((u32)((u16)c.half[8]))) + ((u32)a.word[4]);
  dst.word[5] =
      (((u32)((u16)b.half[10])) * ((u32)((u16)c.half[10]))) + ((u32)a.word[5]);
  dst.word[6] =
      (((u32)((u16)b.half[12])) * ((u32)((u16)c.half[12]))) + ((u32)a.word[6]);
  dst.word[7] =
      (((u32)((u16)b.half[14])) * ((u32)((u16)c.half[14]))) + ((u32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwev_w_hu_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwev.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwev_w_hu_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] =
      (u32)(u16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[0])) * ((s32)((s16)c.half[0]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[2])) * ((s32)((s16)c.half[2]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[4])) * ((s32)((s16)c.half[4]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[6])) * ((s32)((s16)c.half[6]))) + ((s32)a.word[3]);
  dst.word[4] =
      (((u32)((u16)b.half[8])) * ((s32)((s16)c.half[8]))) + ((s32)a.word[4]);
  dst.word[5] =
      (((u32)((u16)b.half[10])) * ((s32)((s16)c.half[10]))) + ((s32)a.word[5]);
  dst.word[6] =
      (((u32)((u16)b.half[12])) * ((s32)((s16)c.half[12]))) + ((s32)a.word[6]);
  dst.word[7] =
      (((u32)((u16)b.half[14])) * ((s32)((s16)c.half[14]))) + ((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_d_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_d_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
                 (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((s64)((s32)b.word[1])) * ((s64)((s32)c.word[1]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((s64)((s32)b.word[3])) * ((s64)((s32)c.word[3]))) + ((s64)a.dword[1]);
  dst.dword[2] =
      (((s64)((s32)b.word[5])) * ((s64)((s32)c.word[5]))) + ((s64)a.dword[2]);
  dst.dword[3] =
      (((s64)((s32)b.word[7])) * ((s64)((s32)c.word[7]))) + ((s64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_d_wu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_d_wu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (u64)(u32)c.word[2 * i + 1] +
                 (u64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[1])) * ((u64)((u32)c.word[1]))) + ((u64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[3])) * ((u64)((u32)c.word[3]))) + ((u64)a.dword[1]);
  dst.dword[2] =
      (((u64)((u32)b.word[5])) * ((u64)((u32)c.word[5]))) + ((u64)a.dword[2]);
  dst.dword[3] =
      (((u64)((u32)b.word[7])) * ((u64)((u32)c.word[7]))) + ((u64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_d_wu_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_d_wu_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
                 (s64)a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] =
      (((u64)((u32)b.word[1])) * ((s64)((s32)c.word[1]))) + ((s64)a.dword[0]);
  dst.dword[1] =
      (((u64)((u32)b.word[3])) * ((s64)((s32)c.word[3]))) + ((s64)a.dword[1]);
  dst.dword[2] =
      (((u64)((u32)b.word[5])) * ((s64)((s32)c.word[5]))) + ((s64)a.dword[2]);
  dst.dword[3] =
      (((u64)((u32)b.word[7])) * ((s64)((s32)c.word[7]))) + ((s64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_h_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_h_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (s16)(s8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((s16)((s8)b.byte[1])) * ((s16)((s8)c.byte[1]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((s16)((s8)b.byte[3])) * ((s16)((s8)c.byte[3]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((s16)((s8)b.byte[5])) * ((s16)((s8)c.byte[5]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((s16)((s8)b.byte[7])) * ((s16)((s8)c.byte[7]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((s16)((s8)b.byte[9])) * ((s16)((s8)c.byte[9]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((s16)((s8)b.byte[11])) * ((s16)((s8)c.byte[11]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((s16)((s8)b.byte[13])) * ((s16)((s8)c.byte[13]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((s16)((s8)b.byte[15])) * ((s16)((s8)c.byte[15]))) + ((s16)a.half[7]);
  dst.half[8] =
      (((s16)((s8)b.byte[17])) * ((s16)((s8)c.byte[17]))) + ((s16)a.half[8]);
  dst.half[9] =
      (((s16)((s8)b.byte[19])) * ((s16)((s8)c.byte[19]))) + ((s16)a.half[9]);
  dst.half[10] =
      (((s16)((s8)b.byte[21])) * ((s16)((s8)c.byte[21]))) + ((s16)a.half[10]);
  dst.half[11] =
      (((s16)((s8)b.byte[23])) * ((s16)((s8)c.byte[23]))) + ((s16)a.half[11]);
  dst.half[12] =
      (((s16)((s8)b.byte[25])) * ((s16)((s8)c.byte[25]))) + ((s16)a.half[12]);
  dst.half[13] =
      (((s16)((s8)b.byte[27])) * ((s16)((s8)c.byte[27]))) + ((s16)a.half[13]);
  dst.half[14] =
      (((s16)((s8)b.byte[29])) * ((s16)((s8)c.byte[29]))) + ((s16)a.half[14]);
  dst.half[15] =
      (((s16)((s8)b.byte[31])) * ((s16)((s8)c.byte[31]))) + ((s16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_h_bu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_h_bu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i + 1] * (u16)(u8)c.byte[2 * i + 1] + (u16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[1])) * ((u16)((u8)c.byte[1]))) + ((u16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[3])) * ((u16)((u8)c.byte[3]))) + ((u16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[5])) * ((u16)((u8)c.byte[5]))) + ((u16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[7])) * ((u16)((u8)c.byte[7]))) + ((u16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[9])) * ((u16)((u8)c.byte[9]))) + ((u16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[11])) * ((u16)((u8)c.byte[11]))) + ((u16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[13])) * ((u16)((u8)c.byte[13]))) + ((u16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[15])) * ((u16)((u8)c.byte[15]))) + ((u16)a.half[7]);
  dst.half[8] =
      (((u16)((u8)b.byte[17])) * ((u16)((u8)c.byte[17]))) + ((u16)a.half[8]);
  dst.half[9] =
      (((u16)((u8)b.byte[19])) * ((u16)((u8)c.byte[19]))) + ((u16)a.half[9]);
  dst.half[10] =
      (((u16)((u8)b.byte[21])) * ((u16)((u8)c.byte[21]))) + ((u16)a.half[10]);
  dst.half[11] =
      (((u16)((u8)b.byte[23])) * ((u16)((u8)c.byte[23]))) + ((u16)a.half[11]);
  dst.half[12] =
      (((u16)((u8)b.byte[25])) * ((u16)((u8)c.byte[25]))) + ((u16)a.half[12]);
  dst.half[13] =
      (((u16)((u8)b.byte[27])) * ((u16)((u8)c.byte[27]))) + ((u16)a.half[13]);
  dst.half[14] =
      (((u16)((u8)b.byte[29])) * ((u16)((u8)c.byte[29]))) + ((u16)a.half[14]);
  dst.half[15] =
      (((u16)((u8)b.byte[31])) * ((u16)((u8)c.byte[31]))) + ((u16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_h_bu_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_h_bu_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (u16)(u8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] =
      (((u16)((u8)b.byte[1])) * ((s16)((s8)c.byte[1]))) + ((s16)a.half[0]);
  dst.half[1] =
      (((u16)((u8)b.byte[3])) * ((s16)((s8)c.byte[3]))) + ((s16)a.half[1]);
  dst.half[2] =
      (((u16)((u8)b.byte[5])) * ((s16)((s8)c.byte[5]))) + ((s16)a.half[2]);
  dst.half[3] =
      (((u16)((u8)b.byte[7])) * ((s16)((s8)c.byte[7]))) + ((s16)a.half[3]);
  dst.half[4] =
      (((u16)((u8)b.byte[9])) * ((s16)((s8)c.byte[9]))) + ((s16)a.half[4]);
  dst.half[5] =
      (((u16)((u8)b.byte[11])) * ((s16)((s8)c.byte[11]))) + ((s16)a.half[5]);
  dst.half[6] =
      (((u16)((u8)b.byte[13])) * ((s16)((s8)c.byte[13]))) + ((s16)a.half[6]);
  dst.half[7] =
      (((u16)((u8)b.byte[15])) * ((s16)((s8)c.byte[15]))) + ((s16)a.half[7]);
  dst.half[8] =
      (((u16)((u8)b.byte[17])) * ((s16)((s8)c.byte[17]))) + ((s16)a.half[8]);
  dst.half[9] =
      (((u16)((u8)b.byte[19])) * ((s16)((s8)c.byte[19]))) + ((s16)a.half[9]);
  dst.half[10] =
      (((u16)((u8)b.byte[21])) * ((s16)((s8)c.byte[21]))) + ((s16)a.half[10]);
  dst.half[11] =
      (((u16)((u8)b.byte[23])) * ((s16)((s8)c.byte[23]))) + ((s16)a.half[11]);
  dst.half[12] =
      (((u16)((u8)b.byte[25])) * ((s16)((s8)c.byte[25]))) + ((s16)a.half[12]);
  dst.half[13] =
      (((u16)((u8)b.byte[27])) * ((s16)((s8)c.byte[27]))) + ((s16)a.half[13]);
  dst.half[14] =
      (((u16)((u8)b.byte[29])) * ((s16)((s8)c.byte[29]))) + ((s16)a.half[14]);
  dst.half[15] =
      (((u16)((u8)b.byte[31])) * ((s16)((s8)c.byte[31]))) + ((s16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_q_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_q_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
                 (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((s128)((s64)b.dword[1])) * ((s128)((s64)c.dword[1]))) +
                 ((s128)a.qword[0]);
  dst.qword[1] = (((s128)((s64)b.dword[3])) * ((s128)((s64)c.dword[3]))) +
                 ((s128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwod_q_du (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_q_du (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (u128)(u64)c.dword[2 * i + 1] +
                 (u128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[1])) * ((u128)((u64)c.dword[1]))) +
                 ((u128)a.qword[0]);
  dst.qword[1] = (((u128)((u64)b.dword[3])) * ((u128)((u64)c.dword[3]))) +
                 ((u128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwod_q_du_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_q_du_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
                 (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((u128)((u64)b.dword[1])) * ((s128)((s64)c.dword[1]))) +
                 ((s128)a.qword[0]);
  dst.qword[1] = (((u128)((u64)b.dword[3])) * ((s128)((s64)c.dword[3]))) +
                 ((s128)a.qword[1]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 1.14 |
| 3A6000 | LA664 | 7 | 1.14 |
| 3C6000 | LA664 | 7 | 1.14 |

---

### `__m256i __lasx_xvmaddwod_w_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_w_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
                (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((s32)((s16)b.half[1])) * ((s32)((s16)c.half[1]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((s32)((s16)b.half[3])) * ((s32)((s16)c.half[3]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((s32)((s16)b.half[5])) * ((s32)((s16)c.half[5]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((s32)((s16)b.half[7])) * ((s32)((s16)c.half[7]))) + ((s32)a.word[3]);
  dst.word[4] =
      (((s32)((s16)b.half[9])) * ((s32)((s16)c.half[9]))) + ((s32)a.word[4]);
  dst.word[5] =
      (((s32)((s16)b.half[11])) * ((s32)((s16)c.half[11]))) + ((s32)a.word[5]);
  dst.word[6] =
      (((s32)((s16)b.half[13])) * ((s32)((s16)c.half[13]))) + ((s32)a.word[6]);
  dst.word[7] =
      (((s32)((s16)b.half[15])) * ((s32)((s16)c.half[15]))) + ((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_w_hu (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_w_hu (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (u32)(u16)c.half[2 * i + 1] +
                (u32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[1])) * ((u32)((u16)c.half[1]))) + ((u32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[3])) * ((u32)((u16)c.half[3]))) + ((u32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[5])) * ((u32)((u16)c.half[5]))) + ((u32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[7])) * ((u32)((u16)c.half[7]))) + ((u32)a.word[3]);
  dst.word[4] =
      (((u32)((u16)b.half[9])) * ((u32)((u16)c.half[9]))) + ((u32)a.word[4]);
  dst.word[5] =
      (((u32)((u16)b.half[11])) * ((u32)((u16)c.half[11]))) + ((u32)a.word[5]);
  dst.word[6] =
      (((u32)((u16)b.half[13])) * ((u32)((u16)c.half[13]))) + ((u32)a.word[6]);
  dst.word[7] =
      (((u32)((u16)b.half[15])) * ((u32)((u16)c.half[15]))) + ((u32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmaddwod_w_hu_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmaddwod.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaddwod_w_hu_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwod.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
                (s32)a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] =
      (((u32)((u16)b.half[1])) * ((s32)((s16)c.half[1]))) + ((s32)a.word[0]);
  dst.word[1] =
      (((u32)((u16)b.half[3])) * ((s32)((s16)c.half[3]))) + ((s32)a.word[1]);
  dst.word[2] =
      (((u32)((u16)b.half[5])) * ((s32)((s16)c.half[5]))) + ((s32)a.word[2]);
  dst.word[3] =
      (((u32)((u16)b.half[7])) * ((s32)((s16)c.half[7]))) + ((s32)a.word[3]);
  dst.word[4] =
      (((u32)((u16)b.half[9])) * ((s32)((s16)c.half[9]))) + ((s32)a.word[4]);
  dst.word[5] =
      (((u32)((u16)b.half[11])) * ((s32)((s16)c.half[11]))) + ((s32)a.word[5]);
  dst.word[6] =
      (((u32)((u16)b.half[13])) * ((s32)((s16)c.half[13]))) + ((s32)a.word[6]);
  dst.word[7] =
      (((u32)((u16)b.half[15])) * ((s32)((s16)c.half[15]))) + ((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmax_b (__m256i a, __m256i b)`

**汇编指令**: `xvmax.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = max((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmax_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmax.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = max((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmax_d (__m256i a, __m256i b)`

**汇编指令**: `xvmax.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = max((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmax_du (__m256i a, __m256i b)`

**汇编指令**: `xvmax.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = max((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmax_h (__m256i a, __m256i b)`

**汇编指令**: `xvmax.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = max((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmax_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmax.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = max((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmax_w (__m256i a, __m256i b)`

**汇编指令**: `xvmax.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = max((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmax_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmax.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmax_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmax.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = max((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_b (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmaxi.b xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_b (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = max((s8)a.byte[i], (s8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmaxi.bu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = max((u8)a.byte[i], (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_d (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmaxi.d xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_d (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = max((s64)a.dword[i], (s64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmaxi_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmaxi.du xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = max((u64)a.dword[i], (u64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmaxi_h (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmaxi.h xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_h (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = max((s16)a.half[i], (s16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmaxi.hu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = max((u16)a.half[i], (u16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_w (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmaxi.w xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_w (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for signed 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = max((s32)a.word[i], (s32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmaxi_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmaxi.wu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmaxi_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmaxi.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise maximum for unsigned 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = max((u32)a.word[i], (u32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_b (__m256i a, __m256i b)`

**汇编指令**: `xvmin.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = min((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmin.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 8-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = min((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_d (__m256i a, __m256i b)`

**汇编指令**: `xvmin.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = min((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmin_du (__m256i a, __m256i b)`

**汇编指令**: `xvmin.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 64-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = min((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmin_h (__m256i a, __m256i b)`

**汇编指令**: `xvmin.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = min((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmin.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 16-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = min((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_w (__m256i a, __m256i b)`

**汇编指令**: `xvmin.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = min((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmin_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmin.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmin_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmin.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 32-bit elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = min((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_b (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmini.b xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_b (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmini.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = min((s8)a.byte[i], (s8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmini.bu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmini.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 8-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = min((u8)a.byte[i], (u8)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_d (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmini.d xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_d (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmini.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = min((s64)a.dword[i], (s64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmini_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmini.du xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmini.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 64-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = min((u64)a.dword[i], (u64)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 4 |
| 3C6000 | LA664 | 2 | 4 |

---

### `__m256i __lasx_xvmini_h (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmini.h xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_h (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmini.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = min((s16)a.half[i], (s16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmini.hu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmini.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 16-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = min((u16)a.half[i], (u16)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_w (__m256i a, imm_n16_15 imm)`

**汇编指令**: `xvmini.w xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_w (__m256i a, imm_n16_15 imm)
#include <lasxintrin.h>
Instruction: xvmini.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for signed 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = min((s32)a.word[i], (s32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmini_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvmini.wu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmini_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvmini.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute elementwise minimum for unsigned 32-bit elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = min((u32)a.word[i], (u32)imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmod_b (__m256i a, __m256i b)`

**汇编指令**: `xvmod.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual signed 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] % (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 33 | 0.05(1/21.5) |
| 3A6000 | LA664 | 29, 41 | 0.06(1/15.5) |
| 3C6000 | LA664 | 29 | 0.07(1/13.5) |

---

### `__m256i __lasx_xvmod_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmod.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual unsigned 8-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] % (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 29, 37 | 0.05(1/22) |
| 3A6000 | LA664 | 29, 37 | 0.06(1/17.5) |
| 3C6000 | LA664 | 29 | 0.07(1/13.5) |

---

### `__m256i __lasx_xvmod_d (__m256i a, __m256i b)`

**汇编指令**: `xvmod.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual signed 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] % (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 10 | 0.11(1/9.5) |
| 3A6000 | LA664 | 8, 10 | 0.25(1/4) |
| 3C6000 | LA664 | 8 | 0.33(1/3) |

---

### `__m256i __lasx_xvmod_du (__m256i a, __m256i b)`

**汇编指令**: `xvmod.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual unsigned 64-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] % (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 8, 10 | 0.11(1/9.5) |
| 3A6000 | LA664 | 8, 10 | 0.25(1/4) |
| 3C6000 | LA664 | 8 | 0.33(1/3) |

---

### `__m256i __lasx_xvmod_h (__m256i a, __m256i b)`

**汇编指令**: `xvmod.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual signed 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] % (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 21 | 0.07(1/13.5) |
| 3A6000 | LA664 | 17, 21 | 0.12(1/8.5) |
| 3C6000 | LA664 | 17 | 0.13(1/7.5) |

---

### `__m256i __lasx_xvmod_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmod.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual unsigned 16-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] % (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 17, 23 | 0.06(1/16) |
| 3A6000 | LA664 | 17, 25 | 0.11(1/9.5) |
| 3C6000 | LA664 | 17 | 0.13(1/7.5) |

---

### `__m256i __lasx_xvmod_w (__m256i a, __m256i b)`

**汇编指令**: `xvmod.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual signed 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] % (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 15 | 0.07(1/13.5) |
| 3A6000 | LA664 | 11, 13 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |

---

### `__m256i __lasx_xvmod_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmod.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmod_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmod.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Modulo residual unsigned 32-bit elements in `a` by elements in `b`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] % (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 11, 15 | 0.06(1/16) |
| 3A6000 | LA664 | 11, 13 | 0.18(1/5.5) |
| 3C6000 | LA664 | 11 | 0.22(1/4.5) |

---

### `__m256i __lasx_xvmsub_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmsub.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmsub_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmsub.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 8-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = -b.byte[i] * c.byte[i] + a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmsub_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmsub.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmsub_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmsub.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 64-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = -b.dword[i] * c.dword[i] + a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmsub_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmsub.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmsub_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmsub.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 16-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = -b.half[i] * c.half[i] + a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmsub_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvmsub.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmsub_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmsub.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 32-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = -b.word[i] * c.word[i] + a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_b (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply signed 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (((s16)(s8)a.byte[i] * (s16)(s8)b.byte[i])) >> 8;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply unsigned 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (((u16)(u8)a.byte[i] * (u16)(u8)b.byte[i])) >> 8;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_d (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply signed 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (((s128)(s64)a.dword[i] * (s128)(s64)b.dword[i])) >> 64;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_du (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply unsigned 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (((u128)(u64)a.dword[i] * (u128)(u64)b.dword[i])) >> 64;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_h (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply signed 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (((s32)(s16)a.half[i] * (s32)(s16)b.half[i])) >> 16;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply unsigned 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (((u32)(u16)a.half[i] * (u32)(u16)b.half[i])) >> 16;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_w (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply signed 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (((s64)(s32)a.word[i] * (s64)(s32)b.word[i])) >> 32;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmuh_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmuh.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmuh_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmuh.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply unsigned 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (((u64)(u32)a.word[i] * (u64)(u32)b.word[i])) >> 32;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmul_b (__m256i a, __m256i b)`

**汇编指令**: `xvmul.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmul_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmul.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] * b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmul_d (__m256i a, __m256i b)`

**汇编指令**: `xvmul.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmul_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmul.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] * b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmul_h (__m256i a, __m256i b)`

**汇编指令**: `xvmul.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmul_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmul.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] * b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmul_w (__m256i a, __m256i b)`

**汇编指令**: `xvmul.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmul_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmul.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] * b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) * ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) * ((s64)((s32)b.word[2]));
  dst.dword[2] = ((s64)((s32)a.word[4])) * ((s64)((s32)b.word[4]));
  dst.dword[3] = ((s64)((s32)a.word[6])) * ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] * (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) * ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) * ((u64)((u32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[4])) * ((u64)((u32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[6])) * ((u64)((u32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_d_wu_w (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_d_wu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) * ((s64)((s32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) * ((s64)((s32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[4])) * ((s64)((s32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[6])) * ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) * ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) * ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) * ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) * ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) * ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) * ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) * ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) * ((s16)((s8)b.byte[14]));
  dst.half[8] = ((s16)((s8)a.byte[16])) * ((s16)((s8)b.byte[16]));
  dst.half[9] = ((s16)((s8)a.byte[18])) * ((s16)((s8)b.byte[18]));
  dst.half[10] = ((s16)((s8)a.byte[20])) * ((s16)((s8)b.byte[20]));
  dst.half[11] = ((s16)((s8)a.byte[22])) * ((s16)((s8)b.byte[22]));
  dst.half[12] = ((s16)((s8)a.byte[24])) * ((s16)((s8)b.byte[24]));
  dst.half[13] = ((s16)((s8)a.byte[26])) * ((s16)((s8)b.byte[26]));
  dst.half[14] = ((s16)((s8)a.byte[28])) * ((s16)((s8)b.byte[28]));
  dst.half[15] = ((s16)((s8)a.byte[30])) * ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] * (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) * ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) * ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) * ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) * ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) * ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) * ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) * ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) * ((u16)((u8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[16])) * ((u16)((u8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[18])) * ((u16)((u8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[20])) * ((u16)((u8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[22])) * ((u16)((u8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[24])) * ((u16)((u8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[26])) * ((u16)((u8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[28])) * ((u16)((u8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[30])) * ((u16)((u8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_h_bu_b (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_h_bu_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) * ((s16)((s8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) * ((s16)((s8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) * ((s16)((s8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) * ((s16)((s8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) * ((s16)((s8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) * ((s16)((s8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) * ((s16)((s8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) * ((s16)((s8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[16])) * ((s16)((s8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[18])) * ((s16)((s8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[20])) * ((s16)((s8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[22])) * ((s16)((s8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[24])) * ((s16)((s8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[26])) * ((s16)((s8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[28])) * ((s16)((s8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[30])) * ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) * ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((s128)((s64)a.dword[2])) * ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwev_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) * ((u128)((u64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[2])) * ((u128)((u64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwev_q_du_d (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_q_du_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) * ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[2])) * ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwev_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) * ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) * ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) * ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) * ((s32)((s16)b.half[6]));
  dst.word[4] = ((s32)((s16)a.half[8])) * ((s32)((s16)b.half[8]));
  dst.word[5] = ((s32)((s16)a.half[10])) * ((s32)((s16)b.half[10]));
  dst.word[6] = ((s32)((s16)a.half[12])) * ((s32)((s16)b.half[12]));
  dst.word[7] = ((s32)((s16)a.half[14])) * ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] * (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) * ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) * ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) * ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) * ((u32)((u16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[8])) * ((u32)((u16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[10])) * ((u32)((u16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[12])) * ((u32)((u16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[14])) * ((u32)((u16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwev_w_hu_h (__m256i a, __m256i b)`

**汇编指令**: `xvmulwev.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwev_w_hu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwev.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) * ((s32)((s16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) * ((s32)((s16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) * ((s32)((s16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) * ((s32)((s16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[8])) * ((s32)((s16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[10])) * ((s32)((s16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[12])) * ((s32)((s16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[14])) * ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] * (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) * ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) * ((s64)((s32)b.word[3]));
  dst.dword[2] = ((s64)((s32)a.word[5])) * ((s64)((s32)b.word[5]));
  dst.dword[3] = ((s64)((s32)a.word[7])) * ((s64)((s32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] * (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) * ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) * ((u64)((u32)b.word[3]));
  dst.dword[2] = ((u64)((u32)a.word[5])) * ((u64)((u32)b.word[5]));
  dst.dword[3] = ((u64)((u32)a.word[7])) * ((u64)((u32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_d_wu_w (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.d.wu.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_d_wu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.d.wu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] * (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) * ((s64)((s32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) * ((s64)((s32)b.word[3]));
  dst.dword[2] = ((u64)((u32)a.word[5])) * ((s64)((s32)b.word[5]));
  dst.dword[3] = ((u64)((u32)a.word[7])) * ((s64)((s32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] * (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) * ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) * ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) * ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) * ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) * ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) * ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) * ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) * ((s16)((s8)b.byte[15]));
  dst.half[8] = ((s16)((s8)a.byte[17])) * ((s16)((s8)b.byte[17]));
  dst.half[9] = ((s16)((s8)a.byte[19])) * ((s16)((s8)b.byte[19]));
  dst.half[10] = ((s16)((s8)a.byte[21])) * ((s16)((s8)b.byte[21]));
  dst.half[11] = ((s16)((s8)a.byte[23])) * ((s16)((s8)b.byte[23]));
  dst.half[12] = ((s16)((s8)a.byte[25])) * ((s16)((s8)b.byte[25]));
  dst.half[13] = ((s16)((s8)a.byte[27])) * ((s16)((s8)b.byte[27]));
  dst.half[14] = ((s16)((s8)a.byte[29])) * ((s16)((s8)b.byte[29]));
  dst.half[15] = ((s16)((s8)a.byte[31])) * ((s16)((s8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] * (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) * ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) * ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) * ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) * ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) * ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) * ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) * ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) * ((u16)((u8)b.byte[15]));
  dst.half[8] = ((u16)((u8)a.byte[17])) * ((u16)((u8)b.byte[17]));
  dst.half[9] = ((u16)((u8)a.byte[19])) * ((u16)((u8)b.byte[19]));
  dst.half[10] = ((u16)((u8)a.byte[21])) * ((u16)((u8)b.byte[21]));
  dst.half[11] = ((u16)((u8)a.byte[23])) * ((u16)((u8)b.byte[23]));
  dst.half[12] = ((u16)((u8)a.byte[25])) * ((u16)((u8)b.byte[25]));
  dst.half[13] = ((u16)((u8)a.byte[27])) * ((u16)((u8)b.byte[27]));
  dst.half[14] = ((u16)((u8)a.byte[29])) * ((u16)((u8)b.byte[29]));
  dst.half[15] = ((u16)((u8)a.byte[31])) * ((u16)((u8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_h_bu_b (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.h.bu.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_h_bu_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.h.bu.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] * (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) * ((s16)((s8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) * ((s16)((s8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) * ((s16)((s8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) * ((s16)((s8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) * ((s16)((s8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) * ((s16)((s8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) * ((s16)((s8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) * ((s16)((s8)b.byte[15]));
  dst.half[8] = ((u16)((u8)a.byte[17])) * ((s16)((s8)b.byte[17]));
  dst.half[9] = ((u16)((u8)a.byte[19])) * ((s16)((s8)b.byte[19]));
  dst.half[10] = ((u16)((u8)a.byte[21])) * ((s16)((s8)b.byte[21]));
  dst.half[11] = ((u16)((u8)a.byte[23])) * ((s16)((s8)b.byte[23]));
  dst.half[12] = ((u16)((u8)a.byte[25])) * ((s16)((s8)b.byte[25]));
  dst.half[13] = ((u16)((u8)a.byte[27])) * ((s16)((s8)b.byte[27]));
  dst.half[14] = ((u16)((u8)a.byte[29])) * ((s16)((s8)b.byte[29]));
  dst.half[15] = ((u16)((u8)a.byte[31])) * ((s16)((s8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] * (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) * ((s128)((s64)b.dword[1]));
  dst.qword[1] = ((s128)((s64)a.dword[3])) * ((s128)((s64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwod_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] * (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) * ((u128)((u64)b.dword[1]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) * ((u128)((u64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwod_q_du_d (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.q.du.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_q_du_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.q.du.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] * (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) * ((s128)((s64)b.dword[1]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) * ((s128)((s64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 7 | 2 |
| 3A6000 | LA664 | 7 | 2 |
| 3C6000 | LA664 | 7 | 2 |

---

### `__m256i __lasx_xvmulwod_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] * (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) * ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) * ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) * ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) * ((s32)((s16)b.half[7]));
  dst.word[4] = ((s32)((s16)a.half[9])) * ((s32)((s16)b.half[9]));
  dst.word[5] = ((s32)((s16)a.half[11])) * ((s32)((s16)b.half[11]));
  dst.word[6] = ((s32)((s16)a.half[13])) * ((s32)((s16)b.half[13]));
  dst.word[7] = ((s32)((s16)a.half[15])) * ((s32)((s16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] * (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) * ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) * ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) * ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) * ((u32)((u16)b.half[7]));
  dst.word[4] = ((u32)((u16)a.half[9])) * ((u32)((u16)b.half[9]));
  dst.word[5] = ((u32)((u16)a.half[11])) * ((u32)((u16)b.half[11]));
  dst.word[6] = ((u32)((u16)a.half[13])) * ((u32)((u16)b.half[13]));
  dst.word[7] = ((u32)((u16)a.half[15])) * ((u32)((u16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvmulwod_w_hu_h (__m256i a, __m256i b)`

**汇编指令**: `xvmulwod.w.hu.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmulwod_w_hu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.w.hu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Multiply odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] * (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) * ((s32)((s16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) * ((s32)((s16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) * ((s32)((s16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) * ((s32)((s16)b.half[7]));
  dst.word[4] = ((u32)((u16)a.half[9])) * ((s32)((s16)b.half[9]));
  dst.word[5] = ((u32)((u16)a.half[11])) * ((s32)((s16)b.half[11]));
  dst.word[6] = ((u32)((u16)a.half[13])) * ((s32)((s16)b.half[13]));
  dst.word[7] = ((u32)((u16)a.half[15])) * ((s32)((s16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 2 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvneg_b (__m256i a)`

**汇编指令**: `xvneg.b xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvneg_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvneg.b xr, xr
CPU Flags: LASX
```

#### Description

Negate 8-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = -a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvneg_d (__m256i a)`

**汇编指令**: `xvneg.d xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvneg_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvneg.d xr, xr
CPU Flags: LASX
```

#### Description

Negate 64-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = -a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvneg_h (__m256i a)`

**汇编指令**: `xvneg.h xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvneg_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvneg.h xr, xr
CPU Flags: LASX
```

#### Description

Negate 16-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = -a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvneg_w (__m256i a)`

**汇编指令**: `xvneg.w xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvneg_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvneg.w xr, xr
CPU Flags: LASX
```

#### Description

Negate 32-bit elements in `a` and save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = -a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_b (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the signed 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_bu (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the unsigned 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (u8)sadd((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_d (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the signed 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_du (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the unsigned 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)sadd((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_h (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the signed 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_hu (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the unsigned 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)sadd((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_w (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the signed 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsadd_wu (__m256i a, __m256i b)`

**汇编指令**: `xvsadd.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsadd_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsadd.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating add the unsigned 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)sadd((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_b (__m256i a, __m256i b)`

**汇编指令**: `xvssub.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the signed 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (s8)ssub((s8)a.byte[i], (s8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_bu (__m256i a, __m256i b)`

**汇编指令**: `xvssub.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the unsigned 8-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (u8)ssub((u8)a.byte[i], (u8)b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_d (__m256i a, __m256i b)`

**汇编指令**: `xvssub.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the signed 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)ssub((s64)a.dword[i], (s64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_du (__m256i a, __m256i b)`

**汇编指令**: `xvssub.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the unsigned 64-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)ssub((u64)a.dword[i], (u64)b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_h (__m256i a, __m256i b)`

**汇编指令**: `xvssub.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the signed 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)ssub((s16)a.half[i], (s16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_hu (__m256i a, __m256i b)`

**汇编指令**: `xvssub.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the unsigned 16-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)ssub((u16)a.half[i], (u16)b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_w (__m256i a, __m256i b)`

**汇编指令**: `xvssub.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the signed 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)ssub((s32)a.word[i], (s32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvssub_wu (__m256i a, __m256i b)`

**汇编指令**: `xvssub.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssub_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssub.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Saturating subtract the unsigned 32-bit elements in `a` and `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)ssub((u32)a.word[i], (u32)b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsub_b (__m256i a, __m256i b)`

**汇编指令**: `xvsub.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsub_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsub.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract 8-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] - b.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsub_d (__m256i a, __m256i b)`

**汇编指令**: `xvsub.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsub_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsub.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract 64-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] - b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsub_h (__m256i a, __m256i b)`

**汇编指令**: `xvsub.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsub_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsub.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract 16-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] - b.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsub_q (__m256i a, __m256i b)`

**汇编指令**: `xvsub.q xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsub_q (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsub.q xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract 128-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = a.qword[i] - b.qword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsub_w (__m256i a, __m256i b)`

**汇编指令**: `xvsub.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsub_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsub.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract 32-bit elements in `a` and `b`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] - b.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsubi_bu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsubi.bu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubi_bu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsubi.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Subtract 8-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsubi_du (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsubi.du xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubi_du (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsubi.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Subtract 64-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsubi_hu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsubi.hu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubi_hu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsubi.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Subtract 16-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsubi_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsubi.wu xr, xr, imm`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubi_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsubi.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Subtract 32-bit elements in `a` by `imm`, save the result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] - imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsubwev_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i] - (s64)(s32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) - ((s64)((s32)b.word[0]));
  dst.dword[1] = ((s64)((s32)a.word[2])) - ((s64)((s32)b.word[2]));
  dst.dword[2] = ((s64)((s32)a.word[4])) - ((s64)((s32)b.word[4]));
  dst.dword[3] = ((s64)((s32)a.word[6])) - ((s64)((s32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwev_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i] - (u64)(u32)b.word[2 * i];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) - ((u64)((u32)b.word[0]));
  dst.dword[1] = ((u64)((u32)a.word[2])) - ((u64)((u32)b.word[2]));
  dst.dword[2] = ((u64)((u32)a.word[4])) - ((u64)((u32)b.word[4]));
  dst.dword[3] = ((u64)((u32)a.word[6])) - ((u64)((u32)b.word[6]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwev_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i] - (s16)(s8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) - ((s16)((s8)b.byte[0]));
  dst.half[1] = ((s16)((s8)a.byte[2])) - ((s16)((s8)b.byte[2]));
  dst.half[2] = ((s16)((s8)a.byte[4])) - ((s16)((s8)b.byte[4]));
  dst.half[3] = ((s16)((s8)a.byte[6])) - ((s16)((s8)b.byte[6]));
  dst.half[4] = ((s16)((s8)a.byte[8])) - ((s16)((s8)b.byte[8]));
  dst.half[5] = ((s16)((s8)a.byte[10])) - ((s16)((s8)b.byte[10]));
  dst.half[6] = ((s16)((s8)a.byte[12])) - ((s16)((s8)b.byte[12]));
  dst.half[7] = ((s16)((s8)a.byte[14])) - ((s16)((s8)b.byte[14]));
  dst.half[8] = ((s16)((s8)a.byte[16])) - ((s16)((s8)b.byte[16]));
  dst.half[9] = ((s16)((s8)a.byte[18])) - ((s16)((s8)b.byte[18]));
  dst.half[10] = ((s16)((s8)a.byte[20])) - ((s16)((s8)b.byte[20]));
  dst.half[11] = ((s16)((s8)a.byte[22])) - ((s16)((s8)b.byte[22]));
  dst.half[12] = ((s16)((s8)a.byte[24])) - ((s16)((s8)b.byte[24]));
  dst.half[13] = ((s16)((s8)a.byte[26])) - ((s16)((s8)b.byte[26]));
  dst.half[14] = ((s16)((s8)a.byte[28])) - ((s16)((s8)b.byte[28]));
  dst.half[15] = ((s16)((s8)a.byte[30])) - ((s16)((s8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwev_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i] - (u16)(u8)b.byte[2 * i];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) - ((u16)((u8)b.byte[0]));
  dst.half[1] = ((u16)((u8)a.byte[2])) - ((u16)((u8)b.byte[2]));
  dst.half[2] = ((u16)((u8)a.byte[4])) - ((u16)((u8)b.byte[4]));
  dst.half[3] = ((u16)((u8)a.byte[6])) - ((u16)((u8)b.byte[6]));
  dst.half[4] = ((u16)((u8)a.byte[8])) - ((u16)((u8)b.byte[8]));
  dst.half[5] = ((u16)((u8)a.byte[10])) - ((u16)((u8)b.byte[10]));
  dst.half[6] = ((u16)((u8)a.byte[12])) - ((u16)((u8)b.byte[12]));
  dst.half[7] = ((u16)((u8)a.byte[14])) - ((u16)((u8)b.byte[14]));
  dst.half[8] = ((u16)((u8)a.byte[16])) - ((u16)((u8)b.byte[16]));
  dst.half[9] = ((u16)((u8)a.byte[18])) - ((u16)((u8)b.byte[18]));
  dst.half[10] = ((u16)((u8)a.byte[20])) - ((u16)((u8)b.byte[20]));
  dst.half[11] = ((u16)((u8)a.byte[22])) - ((u16)((u8)b.byte[22]));
  dst.half[12] = ((u16)((u8)a.byte[24])) - ((u16)((u8)b.byte[24]));
  dst.half[13] = ((u16)((u8)a.byte[26])) - ((u16)((u8)b.byte[26]));
  dst.half[14] = ((u16)((u8)a.byte[28])) - ((u16)((u8)b.byte[28]));
  dst.half[15] = ((u16)((u8)a.byte[30])) - ((u16)((u8)b.byte[30]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwev_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i] - (s128)(s64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[0])) - ((s128)((s64)b.dword[0]));
  dst.qword[1] = ((s128)((s64)a.dword[2])) - ((s128)((s64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsubwev_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i] - (u128)(u64)b.dword[2 * i];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[0])) - ((u128)((u64)b.dword[0]));
  dst.qword[1] = ((u128)((u64)a.dword[2])) - ((u128)((u64)b.dword[2]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsubwev_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i] - (s32)(s16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) - ((s32)((s16)b.half[0]));
  dst.word[1] = ((s32)((s16)a.half[2])) - ((s32)((s16)b.half[2]));
  dst.word[2] = ((s32)((s16)a.half[4])) - ((s32)((s16)b.half[4]));
  dst.word[3] = ((s32)((s16)a.half[6])) - ((s32)((s16)b.half[6]));
  dst.word[4] = ((s32)((s16)a.half[8])) - ((s32)((s16)b.half[8]));
  dst.word[5] = ((s32)((s16)a.half[10])) - ((s32)((s16)b.half[10]));
  dst.word[6] = ((s32)((s16)a.half[12])) - ((s32)((s16)b.half[12]));
  dst.word[7] = ((s32)((s16)a.half[14])) - ((s32)((s16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwev_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwev.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwev_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwev.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i] - (u32)(u16)b.half[2 * i];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) - ((u32)((u16)b.half[0]));
  dst.word[1] = ((u32)((u16)a.half[2])) - ((u32)((u16)b.half[2]));
  dst.word[2] = ((u32)((u16)a.half[4])) - ((u32)((u16)b.half[4]));
  dst.word[3] = ((u32)((u16)a.half[6])) - ((u32)((u16)b.half[6]));
  dst.word[4] = ((u32)((u16)a.half[8])) - ((u32)((u16)b.half[8]));
  dst.word[5] = ((u32)((u16)a.half[10])) - ((u32)((u16)b.half[10]));
  dst.word[6] = ((u32)((u16)a.half[12])) - ((u32)((u16)b.half[12]));
  dst.word[7] = ((u32)((u16)a.half[14])) - ((u32)((u16)b.half[14]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_d_w (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.d.w xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.d.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) - ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) - ((s64)((s32)b.word[3]));
  dst.dword[2] = ((s64)((s32)a.word[5])) - ((s64)((s32)b.word[5]));
  dst.dword[3] = ((s64)((s32)a.word[7])) - ((s64)((s32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_d_wu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.d.wu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_d_wu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.d.wu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[1])) - ((u64)((u32)b.word[1]));
  dst.dword[1] = ((u64)((u32)a.word[3])) - ((u64)((u32)b.word[3]));
  dst.dword[2] = ((u64)((u32)a.word[5])) - ((u64)((u32)b.word[5]));
  dst.dword[3] = ((u64)((u32)a.word[7])) - ((u64)((u32)b.word[7]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_h_b (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.h.b xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_h_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.h.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[1])) - ((s16)((s8)b.byte[1]));
  dst.half[1] = ((s16)((s8)a.byte[3])) - ((s16)((s8)b.byte[3]));
  dst.half[2] = ((s16)((s8)a.byte[5])) - ((s16)((s8)b.byte[5]));
  dst.half[3] = ((s16)((s8)a.byte[7])) - ((s16)((s8)b.byte[7]));
  dst.half[4] = ((s16)((s8)a.byte[9])) - ((s16)((s8)b.byte[9]));
  dst.half[5] = ((s16)((s8)a.byte[11])) - ((s16)((s8)b.byte[11]));
  dst.half[6] = ((s16)((s8)a.byte[13])) - ((s16)((s8)b.byte[13]));
  dst.half[7] = ((s16)((s8)a.byte[15])) - ((s16)((s8)b.byte[15]));
  dst.half[8] = ((s16)((s8)a.byte[17])) - ((s16)((s8)b.byte[17]));
  dst.half[9] = ((s16)((s8)a.byte[19])) - ((s16)((s8)b.byte[19]));
  dst.half[10] = ((s16)((s8)a.byte[21])) - ((s16)((s8)b.byte[21]));
  dst.half[11] = ((s16)((s8)a.byte[23])) - ((s16)((s8)b.byte[23]));
  dst.half[12] = ((s16)((s8)a.byte[25])) - ((s16)((s8)b.byte[25]));
  dst.half[13] = ((s16)((s8)a.byte[27])) - ((s16)((s8)b.byte[27]));
  dst.half[14] = ((s16)((s8)a.byte[29])) - ((s16)((s8)b.byte[29]));
  dst.half[15] = ((s16)((s8)a.byte[31])) - ((s16)((s8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_h_bu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.h.bu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_h_bu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.h.bu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[1])) - ((u16)((u8)b.byte[1]));
  dst.half[1] = ((u16)((u8)a.byte[3])) - ((u16)((u8)b.byte[3]));
  dst.half[2] = ((u16)((u8)a.byte[5])) - ((u16)((u8)b.byte[5]));
  dst.half[3] = ((u16)((u8)a.byte[7])) - ((u16)((u8)b.byte[7]));
  dst.half[4] = ((u16)((u8)a.byte[9])) - ((u16)((u8)b.byte[9]));
  dst.half[5] = ((u16)((u8)a.byte[11])) - ((u16)((u8)b.byte[11]));
  dst.half[6] = ((u16)((u8)a.byte[13])) - ((u16)((u8)b.byte[13]));
  dst.half[7] = ((u16)((u8)a.byte[15])) - ((u16)((u8)b.byte[15]));
  dst.half[8] = ((u16)((u8)a.byte[17])) - ((u16)((u8)b.byte[17]));
  dst.half[9] = ((u16)((u8)a.byte[19])) - ((u16)((u8)b.byte[19]));
  dst.half[10] = ((u16)((u8)a.byte[21])) - ((u16)((u8)b.byte[21]));
  dst.half[11] = ((u16)((u8)a.byte[23])) - ((u16)((u8)b.byte[23]));
  dst.half[12] = ((u16)((u8)a.byte[25])) - ((u16)((u8)b.byte[25]));
  dst.half[13] = ((u16)((u8)a.byte[27])) - ((u16)((u8)b.byte[27]));
  dst.half[14] = ((u16)((u8)a.byte[29])) - ((u16)((u8)b.byte[29]));
  dst.half[15] = ((u16)((u8)a.byte[31])) - ((u16)((u8)b.byte[31]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_q_d (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.q.d xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_q_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.q.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((s128)((s64)a.dword[1])) - ((s128)((s64)b.dword[1]));
  dst.qword[1] = ((s128)((s64)a.dword[3])) - ((s128)((s64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsubwod_q_du (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.q.du xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_q_du (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.q.du xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = ((u128)((u64)a.dword[1])) - ((u128)((u64)b.dword[1]));
  dst.qword[1] = ((u128)((u64)a.dword[3])) - ((u128)((u64)b.dword[3]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsubwod_w_h (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.w.h xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_w_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.w.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[1])) - ((s32)((s16)b.half[1]));
  dst.word[1] = ((s32)((s16)a.half[3])) - ((s32)((s16)b.half[3]));
  dst.word[2] = ((s32)((s16)a.half[5])) - ((s32)((s16)b.half[5]));
  dst.word[3] = ((s32)((s16)a.half[7])) - ((s32)((s16)b.half[7]));
  dst.word[4] = ((s32)((s16)a.half[9])) - ((s32)((s16)b.half[9]));
  dst.word[5] = ((s32)((s16)a.half[11])) - ((s32)((s16)b.half[11]));
  dst.word[6] = ((s32)((s16)a.half[13])) - ((s32)((s16)b.half[13]));
  dst.word[7] = ((s32)((s16)a.half[15])) - ((s32)((s16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsubwod_w_hu (__m256i a, __m256i b)`

**汇编指令**: `xvsubwod.w.hu xr, xr, xr`  
**分类**: `Integer Computation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsubwod_w_hu (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsubwod.w.hu xr, xr, xr
CPU Flags: LASX
```

#### Description

Subtract odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[1])) - ((u32)((u16)b.half[1]));
  dst.word[1] = ((u32)((u16)a.half[3])) - ((u32)((u16)b.half[3]));
  dst.word[2] = ((u32)((u16)a.half[5])) - ((u32)((u16)b.half[5]));
  dst.word[3] = ((u32)((u16)a.half[7])) - ((u32)((u16)b.half[7]));
  dst.word[4] = ((u32)((u16)a.half[9])) - ((u32)((u16)b.half[9]));
  dst.word[5] = ((u32)((u16)a.half[11])) - ((u32)((u16)b.half[11]));
  dst.word[6] = ((u32)((u16)a.half[13])) - ((u32)((u16)b.half[13]));
  dst.word[7] = ((u32)((u16)a.half[15])) - ((u32)((u16)b.half[15]));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

## Logical

### `__m256i __lasx_xvand_v (__m256i a, __m256i b)`

**汇编指令**: `xvand.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvand_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvand.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise AND between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] & b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvandi_b (__m256i a, imm0_255 imm)`

**汇编指令**: `xvandi.b xr, xr, imm`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvandi_b (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvandi.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute bitwise AND between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] & imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvandn_v (__m256i a, __m256i b)`

**汇编指令**: `xvandn.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvandn_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvandn.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise ANDN between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = b.dword[i] & (~a.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvnor_v (__m256i a, __m256i b)`

**汇编指令**: `xvnor.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvnor_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvnor.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise NOR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ~(a.dword[i] | b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvnori_b (__m256i a, imm0_255 imm)`

**汇编指令**: `xvnori.b xr, xr, imm`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvnori_b (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvnori.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute bitwise NOR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ~(a.byte[i] | imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvor_v (__m256i a, __m256i b)`

**汇编指令**: `xvor.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvor_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvor.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise OR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] | b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvori_b (__m256i a, imm0_255 imm)`

**汇编指令**: `xvori.b xr, xr, imm`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvori_b (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvori.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute bitwise OR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] | imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvorn_v (__m256i a, __m256i b)`

**汇编指令**: `xvorn.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvorn_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvorn.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise ORN between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] | (~b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvxor_v (__m256i a, __m256i b)`

**汇编指令**: `xvxor.v xr, xr, xr`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvxor_v (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvxor.v xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute bitwise XOR between elements in `a` and `b`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] ^ b.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvxori_b (__m256i a, imm0_255 imm)`

**汇编指令**: `xvxori.b xr, xr, imm`  
**分类**: `Logical`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvxori_b (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvxori.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute bitwise XOR between elements in `a` and `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] ^ imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

## Memory Load & Store

### `__m256i __lasx_xvld (void * addr, imm_n2048_2047 offset)`

**汇编指令**: `xvld xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvld (void * addr, imm_n2048_2047 offset)
#include <lasxintrin.h>
Instruction: xvld xr, r, imm
CPU Flags: LASX
```

#### Description

Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors.

#### Operation

```c++
dst = memory_load(256, addr + offset);
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvldrepl_b (void * addr, imm_n2048_2047 offset)`

**汇编指令**: `xvldrepl.b xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldrepl_b (void * addr, imm_n2048_2047 offset)
#include <lasxintrin.h>
Instruction: xvldrepl.b xr, r, imm
CPU Flags: LASX
```

#### Description

Read 8-bit data from memory address `addr + (offset << 0)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u8 data = memory_load(8, addr + offset);
for (int i = 0; i < 32; i++) {
  dst.byte[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvldrepl_d (void * addr, imm_n256_255 offset)`

**汇编指令**: `xvldrepl.d xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldrepl_d (void * addr, imm_n256_255 offset)
#include <lasxintrin.h>
Instruction: xvldrepl.d xr, r, imm
CPU Flags: LASX
```

#### Description

Read 64-bit data from memory address `addr + (offset << 3)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u64 data = memory_load(64, addr + (offset << 3));
for (int i = 0; i < 4; i++) {
  dst.dword[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvldrepl_h (void * addr, imm_n1024_1023 offset)`

**汇编指令**: `xvldrepl.h xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldrepl_h (void * addr, imm_n1024_1023 offset)
#include <lasxintrin.h>
Instruction: xvldrepl.h xr, r, imm
CPU Flags: LASX
```

#### Description

Read 16-bit data from memory address `addr + (offset << 1)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u16 data = memory_load(16, addr + (offset << 1));
for (int i = 0; i < 16; i++) {
  dst.half[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvldrepl_w (void * addr, imm_n512_511 offset)`

**汇编指令**: `xvldrepl.w xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldrepl_w (void * addr, imm_n512_511 offset)
#include <lasxintrin.h>
Instruction: xvldrepl.w xr, r, imm
CPU Flags: LASX
```

#### Description

Read 32-bit data from memory address `addr + (offset << 2)`, replicate the data to all vector lanes and save into `dst`.

#### Operation

```c++
u32 data = memory_load(32, addr + (offset << 2));
for (int i = 0; i < 8; i++) {
  dst.word[i] = data;
}
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvldx (void * addr, long int offset)`

**汇编指令**: `xvldx xr, r, r`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldx (void * addr, long int offset)
#include <lasxintrin.h>
Instruction: xvldx xr, r, r
CPU Flags: LASX
```

#### Description

Read whole vector from memory address `addr + offset`, save the data into `dst`.  Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors.

#### Operation

```c++
dst = memory_load(256, addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvst (__m256i data, void * addr, imm_n2048_2047 offset)`

**汇编指令**: `xvst xr, r, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvst (__m256i data, void * addr, imm_n2048_2047 offset)
#include <lasxintrin.h>
Instruction: xvst xr, r, imm
CPU Flags: LASX
```

#### Description

Write whole vector data in `data` to memory address `addr + offset`.

#### Operation

```c++
memory_store(256, data, addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvstelm_b (__m256i data, void * addr, imm_n128_127 offset, imm0_31 lane)`

**汇编指令**: `xvstelm.b xr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvstelm_b (__m256i data, void * addr, imm_n128_127 offset, imm0_31 lane)
#include <lasxintrin.h>
Instruction: xvstelm.b xr, r, imm, imm
CPU Flags: LASX
```

#### Description

Store the 8-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(8, data.byte[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvstelm_d (__m256i data, void * addr, imm_n128_127 offset, imm0_3 lane)`

**汇编指令**: `xvstelm.d xr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvstelm_d (__m256i data, void * addr, imm_n128_127 offset, imm0_3 lane)
#include <lasxintrin.h>
Instruction: xvstelm.d xr, r, imm, imm
CPU Flags: LASX
```

#### Description

Store the 64-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(64, data.dword[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvstelm_h (__m256i data, void * addr, imm_n128_127 offset, imm0_15 lane)`

**汇编指令**: `xvstelm.h xr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvstelm_h (__m256i data, void * addr, imm_n128_127 offset, imm0_15 lane)
#include <lasxintrin.h>
Instruction: xvstelm.h xr, r, imm, imm
CPU Flags: LASX
```

#### Description

Store the 16-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(16, data.half[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvstelm_w (__m256i data, void * addr, imm_n128_127 offset, imm0_7 lane)`

**汇编指令**: `xvstelm.w xr, r, imm, imm`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvstelm_w (__m256i data, void * addr, imm_n128_127 offset, imm0_7 lane)
#include <lasxintrin.h>
Instruction: xvstelm.w xr, r, imm, imm
CPU Flags: LASX
```

#### Description

Store the 32-bit element in `data` specified by `lane` to memory address `addr + offset`.

#### Operation

```c++
memory_store(32, data.word[lane], addr + offset);
```

#### Latency and Throughput

未提供

---

### `void __lasx_xvstx (__m256i data, void * addr, long int offset)`

**汇编指令**: `xvstx xr, r, r`  
**分类**: `Memory Load & Store`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
void __lasx_xvstx (__m256i data, void * addr, long int offset)
#include <lasxintrin.h>
Instruction: xvstx xr, r, r
CPU Flags: LASX
```

#### Description

Write whole-vector data in `data` to memory address `addr + offset`.

#### Operation

```c++
memory_store(256, data, addr + offset);
```

#### Latency and Throughput

未提供

---

## Misc

### `__m256 __lasx_xvpickve_w_f (__m256 a, imm0_7 imm)`

**汇编指令**: `xvpickve.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvpickve_w_f (__m256 a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvpickve.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Copy one 32-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i == 0) ? a.word[imm] : 0;
}

// Expands to:

if (0) {
  dst.word[0] = a.word[imm];
  dst.word[1] = 0;
  dst.word[2] = 0;
  dst.word[3] = 0;
  dst.word[4] = 0;
  dst.word[5] = 0;
  dst.word[6] = 0;
  dst.word[7] = 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256d __lasx_xvpickve_d_f (__m256d a, imm0_3 imm)`

**汇编指令**: `xvpickve.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvpickve_d_f (__m256d a, imm0_3 imm)
#include <lasxintrin.h>
Instruction: xvpickve.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Copy one 64-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i == 0) ? a.dword[imm] : 0;
}

// Expands to:

if (0) {
  dst.dword[0] = a.dword[imm];
  dst.dword[1] = 0;
  dst.dword[2] = 0;
  dst.dword[3] = 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_d_b (__m256i a)`

**汇编指令**: `vext2xv.d.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_d_b (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.d.b xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 8-bit lane of `a` to signed 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_d_h (__m256i a)`

**汇编指令**: `vext2xv.d.h xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_d_h (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.d.h xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 16-bit lane of `a` to signed 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s16)a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_d_w (__m256i a)`

**汇编指令**: `vext2xv.d.w xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_d_w (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.d.w xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 32-bit lane of `a` to signed 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_du_bu (__m256i a)`

**汇编指令**: `vext2xv.du.bu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_du_bu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.du.bu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 8-bit lane of `a` to unsigned 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_du_hu (__m256i a)`

**汇编指令**: `vext2xv.du.hu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_du_hu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.du.hu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 16-bit lane of `a` to unsigned 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u16)a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_du_wu (__m256i a)`

**汇编指令**: `vext2xv.du.wu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_du_wu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.du.wu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 32-bit lane of `a` to unsigned 64-bit elements.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_h_b (__m256i a)`

**汇编指令**: `vext2xv.h.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_h_b (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.h.b xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 8-bit lane of `a` to signed 16-bit elements.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_hu_bu (__m256i a)`

**汇编指令**: `vext2xv.hu.bu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_hu_bu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.hu.bu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 8-bit lane of `a` to unsigned 16-bit elements.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_w_b (__m256i a)`

**汇编指令**: `vext2xv.w.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_w_b (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.w.b xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 8-bit lane of `a` to signed 32-bit elements.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_w_h (__m256i a)`

**汇编指令**: `vext2xv.w.h xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_w_h (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.w.h xr, xr
CPU Flags: LSX
```

#### Description

Extend signed 16-bit lane of `a` to signed 32-bit elements.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_wu_bu (__m256i a)`

**汇编指令**: `vext2xv.wu.bu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_wu_bu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.wu.bu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 8-bit lane of `a` to unsigned 32-bit elements.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u8)a.byte[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_vext2xv_wu_hu (__m256i a)`

**汇编指令**: `vext2xv.wu.hu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LSX`

#### Synopsis

```c++
__m256i __lasx_vext2xv_wu_hu (__m256i a)
#include <lsxintrin.h>
Instruction: vext2xv.wu.hu xr, xr
CPU Flags: LSX
```

#### Description

Extend unsigned 16-bit lane of `a` to unsigned 32-bit elements.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvexth_d_w (__m256i a)`

**汇编指令**: `xvexth.d.w xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_d_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.d.w xr, xr
CPU Flags: LASX
```

#### Description

Extend signed 32-bit elements in the higher half of `a` to 64-bit.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[i + 2];
}
for (; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[i + 4];
}

// Expands to:

if (0) {
  dst.dword[0] = (s64)((s32)a.word[2]);
  dst.dword[1] = (s64)((s32)a.word[3]);
  dst.dword[2] = (s64)((s32)a.word[6]);
  dst.dword[3] = (s64)((s32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_du_wu (__m256i a)`

**汇编指令**: `xvexth.du.wu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_du_wu (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.du.wu xr, xr
CPU Flags: LASX
```

#### Description

Extend unsigned 32-bit elements in the higher half of `a` to 64-bit.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[i + 2];
}
for (; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[i + 4];
}

// Expands to:

if (0) {
  dst.dword[0] = (u64)((u32)a.word[2]);
  dst.dword[1] = (u64)((u32)a.word[3]);
  dst.dword[2] = (u64)((u32)a.word[6]);
  dst.dword[3] = (u64)((u32)a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_h_b (__m256i a)`

**汇编指令**: `xvexth.h.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_h_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.h.b xr, xr
CPU Flags: LASX
```

#### Description

Extend signed 8-bit elements in the higher half of `a` to 16-bit.

#### Operation

```c++
int i;
for (i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[i + 8];
}
for (; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[i + 16];
}

// Expands to:

if (0) {
  dst.half[0] = (s16)((s8)a.byte[8]);
  dst.half[1] = (s16)((s8)a.byte[9]);
  dst.half[2] = (s16)((s8)a.byte[10]);
  dst.half[3] = (s16)((s8)a.byte[11]);
  dst.half[4] = (s16)((s8)a.byte[12]);
  dst.half[5] = (s16)((s8)a.byte[13]);
  dst.half[6] = (s16)((s8)a.byte[14]);
  dst.half[7] = (s16)((s8)a.byte[15]);
  dst.half[8] = (s16)((s8)a.byte[24]);
  dst.half[9] = (s16)((s8)a.byte[25]);
  dst.half[10] = (s16)((s8)a.byte[26]);
  dst.half[11] = (s16)((s8)a.byte[27]);
  dst.half[12] = (s16)((s8)a.byte[28]);
  dst.half[13] = (s16)((s8)a.byte[29]);
  dst.half[14] = (s16)((s8)a.byte[30]);
  dst.half[15] = (s16)((s8)a.byte[31]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_hu_bu (__m256i a)`

**汇编指令**: `xvexth.hu.bu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_hu_bu (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.hu.bu xr, xr
CPU Flags: LASX
```

#### Description

Extend unsigned 8-bit elements in the higher half of `a` to 16-bit.

#### Operation

```c++
int i;
for (i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[i + 8];
}
for (; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[i + 16];
}

// Expands to:

if (0) {
  dst.half[0] = (u16)((u8)a.byte[8]);
  dst.half[1] = (u16)((u8)a.byte[9]);
  dst.half[2] = (u16)((u8)a.byte[10]);
  dst.half[3] = (u16)((u8)a.byte[11]);
  dst.half[4] = (u16)((u8)a.byte[12]);
  dst.half[5] = (u16)((u8)a.byte[13]);
  dst.half[6] = (u16)((u8)a.byte[14]);
  dst.half[7] = (u16)((u8)a.byte[15]);
  dst.half[8] = (u16)((u8)a.byte[24]);
  dst.half[9] = (u16)((u8)a.byte[25]);
  dst.half[10] = (u16)((u8)a.byte[26]);
  dst.half[11] = (u16)((u8)a.byte[27]);
  dst.half[12] = (u16)((u8)a.byte[28]);
  dst.half[13] = (u16)((u8)a.byte[29]);
  dst.half[14] = (u16)((u8)a.byte[30]);
  dst.half[15] = (u16)((u8)a.byte[31]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_q_d (__m256i a)`

**汇编指令**: `xvexth.q.d xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_q_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.q.d xr, xr
CPU Flags: LASX
```

#### Description

Extend signed 64-bit elements in the higher half of `a` to 128-bit.

#### Operation

```c++
int i;
for (i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i + 1];
}
for (; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i + 2];
}

// Expands to:

if (0) {
  dst.qword[0] = (s128)((s64)a.dword[1]);
  dst.qword[1] = (s128)((s64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_qu_du (__m256i a)`

**汇编指令**: `xvexth.qu.du xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_qu_du (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.qu.du xr, xr
CPU Flags: LASX
```

#### Description

Extend unsigned 64-bit elements in the higher half of `a` to 128-bit.

#### Operation

```c++
int i;
for (i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i + 1];
}
for (; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i + 2];
}

// Expands to:

if (0) {
  dst.qword[0] = (u128)((u64)a.dword[1]);
  dst.qword[1] = (u128)((u64)a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_w_h (__m256i a)`

**汇编指令**: `xvexth.w.h xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_w_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.w.h xr, xr
CPU Flags: LASX
```

#### Description

Extend signed 16-bit elements in the higher half of `a` to 32-bit.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[i + 4];
}
for (; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[i + 8];
}

// Expands to:

if (0) {
  dst.word[0] = (s32)((s16)a.half[4]);
  dst.word[1] = (s32)((s16)a.half[5]);
  dst.word[2] = (s32)((s16)a.half[6]);
  dst.word[3] = (s32)((s16)a.half[7]);
  dst.word[4] = (s32)((s16)a.half[12]);
  dst.word[5] = (s32)((s16)a.half[13]);
  dst.word[6] = (s32)((s16)a.half[14]);
  dst.word[7] = (s32)((s16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvexth_wu_hu (__m256i a)`

**汇编指令**: `xvexth.wu.hu xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvexth_wu_hu (__m256i a)
#include <lasxintrin.h>
Instruction: xvexth.wu.hu xr, xr
CPU Flags: LASX
```

#### Description

Extend unsigned 16-bit elements in the higher half of `a` to 32-bit.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[i + 4];
}
for (; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[i + 8];
}

// Expands to:

if (0) {
  dst.word[0] = (u32)((u16)a.half[4]);
  dst.word[1] = (u32)((u16)a.half[5]);
  dst.word[2] = (u32)((u16)a.half[6]);
  dst.word[3] = (u32)((u16)a.half[7]);
  dst.word[4] = (u32)((u16)a.half[12]);
  dst.word[5] = (u32)((u16)a.half[13]);
  dst.word[6] = (u32)((u16)a.half[14]);
  dst.word[7] = (u32)((u16)a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextl_q_d (__m256i a)`

**汇编指令**: `xvextl.q.d xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextl_q_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvextl.q.d xr, xr
CPU Flags: LASX
```

#### Description

Extend signed 64-bit elements in the lower half of `a` to 128-bit.

#### Operation

```c++
int i;
for (i = 0; i < 1; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i];
}
for (; i < 2; i++) {
  dst.qword[i] = (s128)(s64)a.dword[i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = (s128)((s64)a.dword[0]);
  dst.qword[1] = (s128)((s64)a.dword[2]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextl_qu_du (__m256i a)`

**汇编指令**: `xvextl.qu.du xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextl_qu_du (__m256i a)
#include <lasxintrin.h>
Instruction: xvextl.qu.du xr, xr
CPU Flags: LASX
```

#### Description

Extend unsigned 64-bit elements in the lower half of `a` to 128-bit.

#### Operation

```c++
int i;
for (i = 0; i < 1; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i];
}
for (; i < 2; i++) {
  dst.qword[i] = (u128)(u64)a.dword[i + 1];
}

// Expands to:

if (0) {
  dst.qword[0] = (u128)((u64)a.dword[0]);
  dst.qword[1] = (u128)((u64)a.dword[2]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextrins_b (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvextrins.b xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextrins_b (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvextrins.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Extract one 8-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
int i;
for (i = 0; i < 16; i++) {
  dst.byte[i] = (i == ((imm >> 4) & 15)) ? b.byte[imm & 15] : a.byte[i];
}
for (; i < 32; i++) {
  dst.byte[i] =
      (i - 16 == ((imm >> 4) & 15)) ? b.byte[(imm & 15) + 16] : a.byte[i];
}

// Expands to:

if (0) {
  dst.byte[0] = (0 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[0]);
  dst.byte[1] = (1 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[1]);
  dst.byte[2] = (2 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[2]);
  dst.byte[3] = (3 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[3]);
  dst.byte[4] = (4 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[4]);
  dst.byte[5] = (5 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[5]);
  dst.byte[6] = (6 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[6]);
  dst.byte[7] = (7 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[7]);
  dst.byte[8] = (8 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[8]);
  dst.byte[9] = (9 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[9]);
  dst.byte[10] = (10 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[10]);
  dst.byte[11] = (11 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[11]);
  dst.byte[12] = (12 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[12]);
  dst.byte[13] = (13 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[13]);
  dst.byte[14] = (14 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[14]);
  dst.byte[15] = (15 == ((imm >> 4) & 15)) ? (b.byte[imm & 15]) : (a.byte[15]);
  dst.byte[16] =
      (0 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[16]);
  dst.byte[17] =
      (1 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[17]);
  dst.byte[18] =
      (2 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[18]);
  dst.byte[19] =
      (3 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[19]);
  dst.byte[20] =
      (4 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[20]);
  dst.byte[21] =
      (5 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[21]);
  dst.byte[22] =
      (6 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[22]);
  dst.byte[23] =
      (7 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[23]);
  dst.byte[24] =
      (8 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[24]);
  dst.byte[25] =
      (9 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[25]);
  dst.byte[26] =
      (10 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[26]);
  dst.byte[27] =
      (11 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[27]);
  dst.byte[28] =
      (12 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[28]);
  dst.byte[29] =
      (13 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[29]);
  dst.byte[30] =
      (14 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[30]);
  dst.byte[31] =
      (15 == ((imm >> 4) & 15)) ? (b.byte[(imm & 15) + 16]) : (a.byte[31]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextrins_d (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvextrins.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextrins_d (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvextrins.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Extract one 64-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.dword[i] = (i == ((imm >> 4) & 1)) ? b.dword[imm & 1] : a.dword[i];
}
for (; i < 4; i++) {
  dst.dword[i] =
      (i - 2 == ((imm >> 4) & 1)) ? b.dword[(imm & 1) + 2] : a.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] = (0 == ((imm >> 4) & 1)) ? (b.dword[imm & 1]) : (a.dword[0]);
  dst.dword[1] = (1 == ((imm >> 4) & 1)) ? (b.dword[imm & 1]) : (a.dword[1]);
  dst.dword[2] =
      (0 == ((imm >> 4) & 1)) ? (b.dword[(imm & 1) + 2]) : (a.dword[2]);
  dst.dword[3] =
      (1 == ((imm >> 4) & 1)) ? (b.dword[(imm & 1) + 2]) : (a.dword[3]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextrins_h (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvextrins.h xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextrins_h (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvextrins.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Extract one 16-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
int i;
for (i = 0; i < 8; i++) {
  dst.half[i] = (i == ((imm >> 4) & 7)) ? b.half[imm & 7] : a.half[i];
}
for (; i < 16; i++) {
  dst.half[i] = (i - 8 == ((imm >> 4) & 7)) ? b.half[(imm & 7) + 8] : a.half[i];
}

// Expands to:

if (0) {
  dst.half[0] = (0 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[0]);
  dst.half[1] = (1 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[1]);
  dst.half[2] = (2 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[2]);
  dst.half[3] = (3 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[3]);
  dst.half[4] = (4 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[4]);
  dst.half[5] = (5 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[5]);
  dst.half[6] = (6 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[6]);
  dst.half[7] = (7 == ((imm >> 4) & 7)) ? (b.half[imm & 7]) : (a.half[7]);
  dst.half[8] = (0 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[8]);
  dst.half[9] = (1 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[9]);
  dst.half[10] =
      (2 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[10]);
  dst.half[11] =
      (3 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[11]);
  dst.half[12] =
      (4 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[12]);
  dst.half[13] =
      (5 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[13]);
  dst.half[14] =
      (6 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[14]);
  dst.half[15] =
      (7 == ((imm >> 4) & 7)) ? (b.half[(imm & 7) + 8]) : (a.half[15]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvextrins_w (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvextrins.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvextrins_w (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvextrins.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Extract one 32-bit element in `b` and insert it to `a` according to `imm`.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.word[i] = (i == ((imm >> 4) & 3)) ? b.word[imm & 3] : a.word[i];
}
for (; i < 8; i++) {
  dst.word[i] = (i - 4 == ((imm >> 4) & 3)) ? b.word[(imm & 3) + 4] : a.word[i];
}

// Expands to:

if (0) {
  dst.word[0] = (0 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[0]);
  dst.word[1] = (1 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[1]);
  dst.word[2] = (2 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[2]);
  dst.word[3] = (3 == ((imm >> 4) & 3)) ? (b.word[imm & 3]) : (a.word[3]);
  dst.word[4] = (0 == ((imm >> 4) & 3)) ? (b.word[(imm & 3) + 4]) : (a.word[4]);
  dst.word[5] = (1 == ((imm >> 4) & 3)) ? (b.word[(imm & 3) + 4]) : (a.word[5]);
  dst.word[6] = (2 == ((imm >> 4) & 3)) ? (b.word[(imm & 3) + 4]) : (a.word[6]);
  dst.word[7] = (3 == ((imm >> 4) & 3)) ? (b.word[(imm & 3) + 4]) : (a.word[7]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvfrstp_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvfrstp.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfrstp_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvfrstp.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `c`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i];
}
int i;
for (i = 0; i < 16; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[c.byte[0] % 16] = i;
for (i = 16; i < 32; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[(c.byte[16] % 16) + 16] = i - 16;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvfrstp_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvfrstp.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfrstp_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvfrstp.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `c`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i];
}
int i;
for (i = 0; i < 8; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[c.half[0] % 8] = i;
for (i = 8; i < 16; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[(c.half[8] % 8) + 8] = i - 8;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvfrstpi_b (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvfrstpi.b xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfrstpi_b (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvfrstpi.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i];
}
int i;
for (i = 0; i < 16; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[imm % 16] = i;
for (i = 16; i < 32; i++) {
  if ((s8)b.byte[i] < 0) {
    break;
  }
}
dst.byte[(imm % 16) + 16] = i - 16;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvfrstpi_h (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvfrstpi.h xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvfrstpi_h (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvfrstpi.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i];
}
int i;
for (i = 0; i < 8; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[imm % 8] = i;
for (i = 8; i < 16; i++) {
  if ((s16)b.half[i] < 0) {
    break;
  }
}
dst.half[(imm % 8) + 8] = i - 8;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvilvh_b (__m256i a, __m256i b)`

**汇编指令**: `xvilvh.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvh_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvh.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 8-bit elements in higher half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8];
}
for (; i < 32; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 16] : b.byte[i / 2 + 16];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[8];
  dst.byte[1] = a.byte[8];
  dst.byte[2] = b.byte[9];
  dst.byte[3] = a.byte[9];
  dst.byte[4] = b.byte[10];
  dst.byte[5] = a.byte[10];
  dst.byte[6] = b.byte[11];
  dst.byte[7] = a.byte[11];
  dst.byte[8] = b.byte[12];
  dst.byte[9] = a.byte[12];
  dst.byte[10] = b.byte[13];
  dst.byte[11] = a.byte[13];
  dst.byte[12] = b.byte[14];
  dst.byte[13] = a.byte[14];
  dst.byte[14] = b.byte[15];
  dst.byte[15] = a.byte[15];
  dst.byte[16] = b.byte[24];
  dst.byte[17] = a.byte[24];
  dst.byte[18] = b.byte[25];
  dst.byte[19] = a.byte[25];
  dst.byte[20] = b.byte[26];
  dst.byte[21] = a.byte[26];
  dst.byte[22] = b.byte[27];
  dst.byte[23] = a.byte[27];
  dst.byte[24] = b.byte[28];
  dst.byte[25] = a.byte[28];
  dst.byte[26] = b.byte[29];
  dst.byte[27] = a.byte[29];
  dst.byte[28] = b.byte[30];
  dst.byte[29] = a.byte[30];
  dst.byte[30] = b.byte[31];
  dst.byte[31] = a.byte[31];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvh_d (__m256i a, __m256i b)`

**汇编指令**: `xvilvh.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvh_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvh.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 64-bit elements in higher half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1];
}
for (; i < 4; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 2] : b.dword[i / 2 + 2];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
  dst.dword[2] = b.dword[3];
  dst.dword[3] = a.dword[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvh_h (__m256i a, __m256i b)`

**汇编指令**: `xvilvh.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvh_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvh.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 16-bit elements in higher half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4];
}
for (; i < 16; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 8] : b.half[i / 2 + 8];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[4];
  dst.half[1] = a.half[4];
  dst.half[2] = b.half[5];
  dst.half[3] = a.half[5];
  dst.half[4] = b.half[6];
  dst.half[5] = a.half[6];
  dst.half[6] = b.half[7];
  dst.half[7] = a.half[7];
  dst.half[8] = b.half[12];
  dst.half[9] = a.half[12];
  dst.half[10] = b.half[13];
  dst.half[11] = a.half[13];
  dst.half[12] = b.half[14];
  dst.half[13] = a.half[14];
  dst.half[14] = b.half[15];
  dst.half[15] = a.half[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvh_w (__m256i a, __m256i b)`

**汇编指令**: `xvilvh.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvh_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvh.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 32-bit elements in higher half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2];
}
for (; i < 8; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 4] : b.word[i / 2 + 4];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[2];
  dst.word[1] = a.word[2];
  dst.word[2] = b.word[3];
  dst.word[3] = a.word[3];
  dst.word[4] = b.word[6];
  dst.word[5] = a.word[6];
  dst.word[6] = b.word[7];
  dst.word[7] = a.word[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvl_b (__m256i a, __m256i b)`

**汇编指令**: `xvilvl.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvl_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvl.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 8-bit elements in lower half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 16; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2] : b.byte[i / 2];
}
for (; i < 32; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = a.byte[0];
  dst.byte[2] = b.byte[1];
  dst.byte[3] = a.byte[1];
  dst.byte[4] = b.byte[2];
  dst.byte[5] = a.byte[2];
  dst.byte[6] = b.byte[3];
  dst.byte[7] = a.byte[3];
  dst.byte[8] = b.byte[4];
  dst.byte[9] = a.byte[4];
  dst.byte[10] = b.byte[5];
  dst.byte[11] = a.byte[5];
  dst.byte[12] = b.byte[6];
  dst.byte[13] = a.byte[6];
  dst.byte[14] = b.byte[7];
  dst.byte[15] = a.byte[7];
  dst.byte[16] = b.byte[16];
  dst.byte[17] = a.byte[16];
  dst.byte[18] = b.byte[17];
  dst.byte[19] = a.byte[17];
  dst.byte[20] = b.byte[18];
  dst.byte[21] = a.byte[18];
  dst.byte[22] = b.byte[19];
  dst.byte[23] = a.byte[19];
  dst.byte[24] = b.byte[20];
  dst.byte[25] = a.byte[20];
  dst.byte[26] = b.byte[21];
  dst.byte[27] = a.byte[21];
  dst.byte[28] = b.byte[22];
  dst.byte[29] = a.byte[22];
  dst.byte[30] = b.byte[23];
  dst.byte[31] = a.byte[23];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvl_d (__m256i a, __m256i b)`

**汇编指令**: `xvilvl.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvl_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvl.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 64-bit elements in lower half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 2; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2] : b.dword[i / 2];
}
for (; i < 4; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
  dst.dword[2] = b.dword[2];
  dst.dword[3] = a.dword[2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvl_h (__m256i a, __m256i b)`

**汇编指令**: `xvilvl.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvl_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvl.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 16-bit elements in lower half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 8; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2] : b.half[i / 2];
}
for (; i < 16; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = a.half[0];
  dst.half[2] = b.half[1];
  dst.half[3] = a.half[1];
  dst.half[4] = b.half[2];
  dst.half[5] = a.half[2];
  dst.half[6] = b.half[3];
  dst.half[7] = a.half[3];
  dst.half[8] = b.half[8];
  dst.half[9] = a.half[8];
  dst.half[10] = b.half[9];
  dst.half[11] = a.half[9];
  dst.half[12] = b.half[10];
  dst.half[13] = a.half[10];
  dst.half[14] = b.half[11];
  dst.half[15] = a.half[11];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvilvl_w (__m256i a, __m256i b)`

**汇编指令**: `xvilvl.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvilvl_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvilvl.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Interleave 32-bit elements in lower half of `a` and `b`.

#### Operation

```c++
int i;
for (i = 0; i < 4; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2] : b.word[i / 2];
}
for (; i < 8; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = a.word[0];
  dst.word[2] = b.word[1];
  dst.word[3] = a.word[1];
  dst.word[4] = b.word[4];
  dst.word[5] = a.word[4];
  dst.word[6] = b.word[5];
  dst.word[7] = a.word[5];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvinsgr2vr_d (__m256i a, long int b, imm0_3 imm)`

**汇编指令**: `xvinsgr2vr.d xr, r, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvinsgr2vr_d (__m256i a, long int b, imm0_3 imm)
#include <lasxintrin.h>
Instruction: xvinsgr2vr.d xr, r, imm
CPU Flags: LASX
```

#### Description

Insert 64-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i == imm) ? b : a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvinsgr2vr_w (__m256i a, int b, imm0_7 imm)`

**汇编指令**: `xvinsgr2vr.w xr, r, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvinsgr2vr_w (__m256i a, int b, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvinsgr2vr.w xr, r, imm
CPU Flags: LASX
```

#### Description

Insert 32-bit element into lane indexed `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i == imm) ? b : a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvinsve0_d (__m256i a, __m256i b, imm0_3 imm)`

**汇编指令**: `xvinsve0.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvinsve0_d (__m256i a, __m256i b, imm0_3 imm)
#include <lasxintrin.h>
Instruction: xvinsve0.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Insert the first 64-bit lane of `b` into lane indexed `imm` of `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i == imm) ? b.dword[0] : a.dword[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvinsve0_w (__m256i a, __m256i b, imm0_7 imm)`

**汇编指令**: `xvinsve0.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvinsve0_w (__m256i a, __m256i b, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvinsve0.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Insert the first 32-bit lane of `b` into lane indexed `imm` of `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i == imm) ? b.word[0] : a.word[i];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvldi (imm_n1024_1023 imm)`

**汇编指令**: `xvldi xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvldi (imm_n1024_1023 imm)
#include <lasxintrin.h>
Instruction: xvldi xr, imm
CPU Flags: LASX
```

#### Description

Initialize `dst` using predefined patterns:

- `imm[12:10]=0b000`: broadcast `imm[7:0]` as 8-bit elements to all lanes
- `imm[12:10]=0b001`: broadcast sign-extended `imm[9:0]` as 16-bit elements to all lanes
- `imm[12:10]=0b010`: broadcast sign-extended `imm[9:0]` as 32-bit elements to all lanes
- `imm[12:10]=0b011`: broadcast sign-extended `imm[9:0]` as 64-bit elements to all lanes
- `imm[12:8]=0b10000`: broadcast `imm[7:0]` as 32-bit elements to all lanes
- `imm[12:8]=0b10001`: broadcast `imm[7:0] << 8` as 32-bit elements to all lanes
- `imm[12:8]=0b10010`: broadcast `imm[7:0] << 16` as 32-bit elements to all lanes
- `imm[12:8]=0b10011`: broadcast `imm[7:0] << 24` as 32-bit elements to all lanes
- `imm[12:8]=0b10100`: broadcast `imm[7:0]` as 16-bit elements to all lanes
- `imm[12:8]=0b10101`: broadcast `imm[7:0] << 8` as 16-bit elements to all lanes
- `imm[12:8]=0b10110`: broadcast `(imm[7:0] << 8) | 0xFF` as 32-bit elements to all lanes
- `imm[12:8]=0b10111`: broadcast `(imm[7:0] << 16) | 0xFFFF` as 32-bit elements to all lanes
- `imm[12:8]=0b11000`: broadcast `imm[7:0]` as 8-bit elements to all lanes
- `imm[12:8]=0b11001`: repeat each bit of `imm[7:0]` eight times, and broadcast the result as 64-bit elements to all lanes
- `imm[12:8]=0b11010`: broadcast `(imm[7] << 31) | ((1-imm[6]) << 30) | ((imm[6] * 0x1F) << 25) | (imm[5:0] << 19)` as 32-bit elements to all lanes
- `imm[12:8]=0b11011`: broadcast `(imm[7] << 31) | ((1-imm[6]) << 30) | ((imm[6] * 0x1F) << 25) | (imm[5:0] << 19)` as 64-bit elements to all lanes
- `imm[12:8]=0b11100`: broadcast `(imm[7] << 63) | ((1-imm[6]) << 62) | ((imm[6] * 0xFF) << 54) | (imm[5:0] << 48)` as 64-bit elements to all lanes

#### Operation

```c++
u64 imm12_10 = (imm >> 10) & 0b111;
u64 imm12_8 = (imm >> 8) & 0b11111;
u64 imm9_0 = imm & 0x3FF;
s64 simm9_0 = ((s64)imm9_0 << 54) >> 54;
u64 imm7_0 = imm & 0xFF;
u64 imm7 = (imm >> 7) & 0x1;
u64 imm6 = (imm >> 6) & 0x1;
u64 imm5 = (imm >> 5) & 0x1;
u64 imm5_0 = imm & 0x3F;
u64 imm4 = (imm >> 4) & 0x1;
u64 imm3 = (imm >> 3) & 0x1;
u64 imm2 = (imm >> 2) & 0x1;
u64 imm1 = (imm >> 1) & 0x1;
u64 imm0 = imm & 0x1;

u64 broadcast_value;
u64 broadcast_width;
if (imm12_10 == 0b000) {
  broadcast_value = imm7_0;
  broadcast_width = 8;
} else if (imm12_10 == 0b001) {
  broadcast_value = simm9_0;
  broadcast_width = 16;
} else if (imm12_10 == 0b010) {
  broadcast_value = simm9_0;
  broadcast_width = 32;
} else if (imm12_10 == 0b011) {
  broadcast_value = simm9_0;
  broadcast_width = 64;
} else if (imm12_8 == 0b10000) {
  broadcast_value = imm7_0;
  broadcast_width = 32;
} else if (imm12_8 == 0b10001) {
  broadcast_value = imm7_0 << 8;
  broadcast_width = 32;
} else if (imm12_8 == 0b10010) {
  broadcast_value = imm7_0 << 16;
  broadcast_width = 32;
} else if (imm12_8 == 0b10011) {
  broadcast_value = imm7_0 << 24;
  broadcast_width = 32;
} else if (imm12_8 == 0b10100) {
  broadcast_value = imm7_0;
  broadcast_width = 16;
} else if (imm12_8 == 0b10101) {
  broadcast_value = imm7_0 << 8;
  broadcast_width = 16;
} else if (imm12_8 == 0b10110) {
  broadcast_value = (imm7_0 << 8) | 0xFF;
  broadcast_width = 32;
} else if (imm12_8 == 0b10111) {
  broadcast_value = (imm7_0 << 16) | 0xFFFF;
  broadcast_width = 32;
} else if (imm12_8 == 0b11000) {
  broadcast_value = imm7_0;
  broadcast_width = 8;
} else if (imm12_8 == 0b11001) {
  broadcast_value = imm0 * 0xFF + imm1 * 0xFF00 + imm2 * 0xFF0000 +
                    imm3 * 0xFF000000 + imm4 * 0xFF00000000 +
                    imm5 * 0xFF0000000000 + imm6 * 0xFF000000000000 +
                    imm7 * 0xFF00000000000000;
  broadcast_width = 64;
} else if (imm12_8 == 0b11010) {
  broadcast_value = (imm7 << 31) | ((1 - imm6) << 30) | ((imm6 * 0x1F) << 25) |
                    (imm5_0 << 19);
  broadcast_width = 32;
} else if (imm12_8 == 0b11011) {
  broadcast_value = (imm7 << 31) | ((1 - imm6) << 30) | ((imm6 * 0x1F) << 25) |
                    (imm5_0 << 19);
  broadcast_width = 64;
} else if (imm12_8 == 0b11100) {
  broadcast_value = (imm7 << 63) | ((1 - imm6) << 62) | ((imm6 * 0xFF) << 54) |
                    (imm5_0 << 48);
  broadcast_width = 64;
}

if (broadcast_width == 8) {
  for (int i = 0; i < 32; i++) {
    dst.byte[i] = broadcast_value;
  }
} else if (broadcast_width == 16) {
  for (int i = 0; i < 16; i++) {
    dst.half[i] = broadcast_value;
  }
} else if (broadcast_width == 32) {
  for (int i = 0; i < 8; i++) {
    dst.word[i] = broadcast_value;
  }
} else if (broadcast_width == 64) {
  for (int i = 0; i < 4; i++) {
    dst.dword[i] = broadcast_value;
  }
}
```

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvmskgez_b (__m256i a)`

**汇编指令**: `xvmskgez.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmskgez_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvmskgez.b xr, xr
CPU Flags: LASX
```

#### Description

For each 8-bit element in `a`, if the element is greater than or equal to zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmskgez_b(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x00000000000001fe 0x0000000000000000 0x000000000000ff0f 0x0000000000000000
__m256i __lasx_xvmskgez_b(__m256i{0x0000191100000000, 0x00a1000011b11c11, 0x1181000008010101, 0x0000000000000000})
= 0x000000000000bbff 0x0000000000000000 0x000000000000ffbf 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8080808080808080;
u64 c = m & a.dword[0];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[0] = (u16)~dst.dword[0];
dst.dword[1] = 0;

c = m & a.dword[2];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] = c;
c = m & a.dword[3];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] |= c << 8;
dst.dword[2] = (u16)~dst.dword[2];
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmskltz_b (__m256i a)`

**汇编指令**: `xvmskltz.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmskltz_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvmskltz.b xr, xr
CPU Flags: LASX
```

#### Description

For each 8-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmskltz_b(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x000000000000fe01 0x0000000000000000 0x00000000000000f0 0x0000000000000000
__m256i __lasx_xvmskltz_b(__m256i{0x0000118100000000, 0x0081000081111118, 0x1181000001010801, 0x0000000000000000})
= 0x0000000000004810 0x0000000000000000 0x0000000000000040 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8080808080808080;
u64 c = m & a.dword[0];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[1] = 0;

c = m & a.dword[2];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] = c;
c = m & a.dword[3];
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] |= c << 8;
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmskltz_d (__m256i a)`

**汇编指令**: `xvmskltz.d xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmskltz_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvmskltz.d xr, xr
CPU Flags: LASX
```

#### Description

For each 64-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmskltz_d(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x0000000000000002 0x0000000000000000 0x0000000000000001 0x0000000000000000
__m256i __lasx_xvmskltz_d(__m256i{0x0000111800000000, 0x0081000081111111, 0x8111000008010101, 0x0000000000000000})
= 0x0000000000000000 0x0000000000000000 0x0000000000000001 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000000000000000;
u64 c = m & a.dword[0];
c >>= 63;
dst.dword[0] = c;
c = m & a.dword[1];
c >>= 63;
dst.dword[0] |= c << 1;
dst.dword[1] = 0;

c = m & a.dword[2];
c >>= 63;
dst.dword[2] = c;
c = m & a.dword[3];
c >>= 63;
dst.dword[2] |= c << 1;
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmskltz_h (__m256i a)`

**汇编指令**: `xvmskltz.h xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmskltz_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvmskltz.h xr, xr
CPU Flags: LASX
```

#### Description

For each 16-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmskltz_h(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x00000000000000f0 0x0000000000000000 0x000000000000000c 0x0000000000000000
__m256i __lasx_xvmskltz_h(__m256i{0x0000818100000000, 0x0018000018181881, 0x1181000008080808, 0x0000000000000000})
= 0x0000000000000004 0x0000000000000000 0x0000000000000000 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000800080008000;
u64 c = m & a.dword[0];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[0] |= c << 4;
dst.dword[1] = 0;

c = m & a.dword[2];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[2] = c;
c = m & a.dword[3];
c |= c << 15;
c |= c << 30;
c >>= 60;
dst.dword[2] |= c << 4;
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmskltz_w (__m256i a)`

**汇编指令**: `xvmskltz.w xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmskltz_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvmskltz.w xr, xr
CPU Flags: LASX
```

#### Description

For each 32-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmskltz_w(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x000000000000000c 0x0000000000000000 0x0000000000000002 0x0000000000000000
__m256i __lasx_xvmskltz_w(__m256i{0x0000811100000000, 0x0018000081111111, 0x8111000001010108, 0x0000000000000000})
= 0x0000000000000004 0x0000000000000000 0x0000000000000002 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x8000000080000000;
u64 c = m & a.dword[0];
c |= c << 31;
c >>= 62;
dst.dword[0] = c;
c = m & a.dword[1];
c |= c << 31;
c >>= 62;
dst.dword[0] |= c << 2;
dst.dword[1] = 0;

c = m & a.dword[2];
c |= c << 31;
c >>= 62;
dst.dword[2] = c;
c = m & a.dword[3];
c |= c << 31;
c >>= 62;
dst.dword[2] |= c << 2;
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvmsknz_b (__m256i a)`

**汇编指令**: `xvmsknz.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmsknz_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvmsknz.b xr, xr
CPU Flags: LASX
```

#### Description

For each 8-bit element in `a`, if the element is non-zero, set one bit in `dst`, otherwise clear it.

#### Examples

```c++
__m256i __lasx_xvmsknz_b(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabababab12121212, 0x1234567812345678})
= 0x000000000000feff 0x0000000000000000 0x000000000000ffff 0x0000000000000000
__m256i __lasx_xvmsknz_b(__m256i{0x0000111100000000, 0x0011000011111111, 0x1111000001010101, 0x0000000000000000})
= 0x0000000000004f30 0x0000000000000000 0x00000000000000cf 0x0000000000000000
```

#### Operation

```c++
u64 m = 0x7F7F7F7F7F7F7F7F;
u64 c = ~(((a.dword[0] & m) + m) | a.dword[0] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] = c;
c = ~(((a.dword[1] & m) + m) | a.dword[1] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[0] |= c << 8;
dst.dword[0] = (u16)~dst.dword[0];
dst.dword[1] = 0;

c = ~(((a.dword[2] & m) + m) | a.dword[2] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] = c;
c = ~(((a.dword[3] & m) + m) | a.dword[3] | m);
c |= c << 7;
c |= c << 14;
c |= c << 28;
c >>= 56;
dst.dword[2] |= c << 8;
dst.dword[2] = (u16)~dst.dword[2];
dst.dword[3] = 0;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackev_b (__m256i a, __m256i b)`

**汇编指令**: `xvpackev.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackev_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackev.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack even-positioned 8-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i - 1] : b.byte[i];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = a.byte[0];
  dst.byte[2] = b.byte[2];
  dst.byte[3] = a.byte[2];
  dst.byte[4] = b.byte[4];
  dst.byte[5] = a.byte[4];
  dst.byte[6] = b.byte[6];
  dst.byte[7] = a.byte[6];
  dst.byte[8] = b.byte[8];
  dst.byte[9] = a.byte[8];
  dst.byte[10] = b.byte[10];
  dst.byte[11] = a.byte[10];
  dst.byte[12] = b.byte[12];
  dst.byte[13] = a.byte[12];
  dst.byte[14] = b.byte[14];
  dst.byte[15] = a.byte[14];
  dst.byte[16] = b.byte[16];
  dst.byte[17] = a.byte[16];
  dst.byte[18] = b.byte[18];
  dst.byte[19] = a.byte[18];
  dst.byte[20] = b.byte[20];
  dst.byte[21] = a.byte[20];
  dst.byte[22] = b.byte[22];
  dst.byte[23] = a.byte[22];
  dst.byte[24] = b.byte[24];
  dst.byte[25] = a.byte[24];
  dst.byte[26] = b.byte[26];
  dst.byte[27] = a.byte[26];
  dst.byte[28] = b.byte[28];
  dst.byte[29] = a.byte[28];
  dst.byte[30] = b.byte[30];
  dst.byte[31] = a.byte[30];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackev_d (__m256i a, __m256i b)`

**汇编指令**: `xvpackev.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackev_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackev.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack even-positioned 64-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i - 1] : b.dword[i];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
  dst.dword[2] = b.dword[2];
  dst.dword[3] = a.dword[2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackev_h (__m256i a, __m256i b)`

**汇编指令**: `xvpackev.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackev_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackev.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack even-positioned 16-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i - 1] : b.half[i];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = a.half[0];
  dst.half[2] = b.half[2];
  dst.half[3] = a.half[2];
  dst.half[4] = b.half[4];
  dst.half[5] = a.half[4];
  dst.half[6] = b.half[6];
  dst.half[7] = a.half[6];
  dst.half[8] = b.half[8];
  dst.half[9] = a.half[8];
  dst.half[10] = b.half[10];
  dst.half[11] = a.half[10];
  dst.half[12] = b.half[12];
  dst.half[13] = a.half[12];
  dst.half[14] = b.half[14];
  dst.half[15] = a.half[14];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackev_w (__m256i a, __m256i b)`

**汇编指令**: `xvpackev.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackev_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackev.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack even-positioned 32-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i - 1] : b.word[i];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = a.word[0];
  dst.word[2] = b.word[2];
  dst.word[3] = a.word[2];
  dst.word[4] = b.word[4];
  dst.word[5] = a.word[4];
  dst.word[6] = b.word[6];
  dst.word[7] = a.word[6];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackod_b (__m256i a, __m256i b)`

**汇编指令**: `xvpackod.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackod_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackod.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack odd-positioned 8-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (i % 2 == 1) ? a.byte[i] : b.byte[i + 1];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[1];
  dst.byte[1] = a.byte[1];
  dst.byte[2] = b.byte[3];
  dst.byte[3] = a.byte[3];
  dst.byte[4] = b.byte[5];
  dst.byte[5] = a.byte[5];
  dst.byte[6] = b.byte[7];
  dst.byte[7] = a.byte[7];
  dst.byte[8] = b.byte[9];
  dst.byte[9] = a.byte[9];
  dst.byte[10] = b.byte[11];
  dst.byte[11] = a.byte[11];
  dst.byte[12] = b.byte[13];
  dst.byte[13] = a.byte[13];
  dst.byte[14] = b.byte[15];
  dst.byte[15] = a.byte[15];
  dst.byte[16] = b.byte[17];
  dst.byte[17] = a.byte[17];
  dst.byte[18] = b.byte[19];
  dst.byte[19] = a.byte[19];
  dst.byte[20] = b.byte[21];
  dst.byte[21] = a.byte[21];
  dst.byte[22] = b.byte[23];
  dst.byte[23] = a.byte[23];
  dst.byte[24] = b.byte[25];
  dst.byte[25] = a.byte[25];
  dst.byte[26] = b.byte[27];
  dst.byte[27] = a.byte[27];
  dst.byte[28] = b.byte[29];
  dst.byte[29] = a.byte[29];
  dst.byte[30] = b.byte[31];
  dst.byte[31] = a.byte[31];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackod_d (__m256i a, __m256i b)`

**汇编指令**: `xvpackod.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackod_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackod.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack odd-positioned 64-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i % 2 == 1) ? a.dword[i] : b.dword[i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
  dst.dword[2] = b.dword[3];
  dst.dword[3] = a.dword[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackod_h (__m256i a, __m256i b)`

**汇编指令**: `xvpackod.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackod_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackod.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack odd-positioned 16-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (i % 2 == 1) ? a.half[i] : b.half[i + 1];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[1];
  dst.half[1] = a.half[1];
  dst.half[2] = b.half[3];
  dst.half[3] = a.half[3];
  dst.half[4] = b.half[5];
  dst.half[5] = a.half[5];
  dst.half[6] = b.half[7];
  dst.half[7] = a.half[7];
  dst.half[8] = b.half[9];
  dst.half[9] = a.half[9];
  dst.half[10] = b.half[11];
  dst.half[11] = a.half[11];
  dst.half[12] = b.half[13];
  dst.half[13] = a.half[13];
  dst.half[14] = b.half[15];
  dst.half[15] = a.half[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpackod_w (__m256i a, __m256i b)`

**汇编指令**: `xvpackod.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpackod_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpackod.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Collect and pack odd-positioned 32-bit elements in `a` and `b` and store `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i % 2 == 1) ? a.word[i] : b.word[i + 1];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[1];
  dst.word[1] = a.word[1];
  dst.word[2] = b.word[3];
  dst.word[3] = a.word[3];
  dst.word[4] = b.word[5];
  dst.word[5] = a.word[5];
  dst.word[6] = b.word[7];
  dst.word[7] = a.word[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickev_b (__m256i a, __m256i b)`

**汇编指令**: `xvpickev.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickev_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickev.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick even-positioned 8-bit elements in `b` first, then pick even-positioned 8-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? b.byte[i * 2] : a.byte[(i - 8) * 2];
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? b.byte[(i - 8) * 2] : a.byte[(i - 16) * 2];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[0];
  dst.byte[1] = b.byte[2];
  dst.byte[2] = b.byte[4];
  dst.byte[3] = b.byte[6];
  dst.byte[4] = b.byte[8];
  dst.byte[5] = b.byte[10];
  dst.byte[6] = b.byte[12];
  dst.byte[7] = b.byte[14];
  dst.byte[8] = a.byte[0];
  dst.byte[9] = a.byte[2];
  dst.byte[10] = a.byte[4];
  dst.byte[11] = a.byte[6];
  dst.byte[12] = a.byte[8];
  dst.byte[13] = a.byte[10];
  dst.byte[14] = a.byte[12];
  dst.byte[15] = a.byte[14];
  dst.byte[16] = b.byte[16];
  dst.byte[17] = b.byte[18];
  dst.byte[18] = b.byte[20];
  dst.byte[19] = b.byte[22];
  dst.byte[20] = b.byte[24];
  dst.byte[21] = b.byte[26];
  dst.byte[22] = b.byte[28];
  dst.byte[23] = b.byte[30];
  dst.byte[24] = a.byte[16];
  dst.byte[25] = a.byte[18];
  dst.byte[26] = a.byte[20];
  dst.byte[27] = a.byte[22];
  dst.byte[28] = a.byte[24];
  dst.byte[29] = a.byte[26];
  dst.byte[30] = a.byte[28];
  dst.byte[31] = a.byte[30];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickev_d (__m256i a, __m256i b)`

**汇编指令**: `xvpickev.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickev_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickev.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick even-positioned 64-bit elements in `b` first, then pick even-positioned 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? b.dword[i * 2] : a.dword[(i - 1) * 2];
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (i < 3) ? b.dword[(i - 1) * 2] : a.dword[(i - 2) * 2];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[0];
  dst.dword[1] = a.dword[0];
  dst.dword[2] = b.dword[2];
  dst.dword[3] = a.dword[2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickev_h (__m256i a, __m256i b)`

**汇编指令**: `xvpickev.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickev_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickev.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick even-positioned 16-bit elements in `b` first, then pick even-positioned 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? b.half[i * 2] : a.half[(i - 4) * 2];
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (i < 12) ? b.half[(i - 4) * 2] : a.half[(i - 8) * 2];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[0];
  dst.half[1] = b.half[2];
  dst.half[2] = b.half[4];
  dst.half[3] = b.half[6];
  dst.half[4] = a.half[0];
  dst.half[5] = a.half[2];
  dst.half[6] = a.half[4];
  dst.half[7] = a.half[6];
  dst.half[8] = b.half[8];
  dst.half[9] = b.half[10];
  dst.half[10] = b.half[12];
  dst.half[11] = b.half[14];
  dst.half[12] = a.half[8];
  dst.half[13] = a.half[10];
  dst.half[14] = a.half[12];
  dst.half[15] = a.half[14];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickev_w (__m256i a, __m256i b)`

**汇编指令**: `xvpickev.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickev_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickev.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick even-positioned 32-bit elements in `b` first, then pick even-positioned 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? b.word[i * 2] : a.word[(i - 2) * 2];
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6) ? b.word[(i - 2) * 2] : a.word[(i - 4) * 2];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[0];
  dst.word[1] = b.word[2];
  dst.word[2] = a.word[0];
  dst.word[3] = a.word[2];
  dst.word[4] = b.word[4];
  dst.word[5] = b.word[6];
  dst.word[6] = a.word[4];
  dst.word[7] = a.word[6];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickod_b (__m256i a, __m256i b)`

**汇编指令**: `xvpickod.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickod_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickod.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick odd-positioned 8-bit elements in `b` first, then pick odd-positioned 8-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? b.byte[i * 2 + 1] : a.byte[(i - 8) * 2 + 1];
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? b.byte[(i - 8) * 2 + 1] : a.byte[(i - 16) * 2 + 1];
}

// Expands to:

if (0) {
  dst.byte[0] = b.byte[1];
  dst.byte[1] = b.byte[3];
  dst.byte[2] = b.byte[5];
  dst.byte[3] = b.byte[7];
  dst.byte[4] = b.byte[9];
  dst.byte[5] = b.byte[11];
  dst.byte[6] = b.byte[13];
  dst.byte[7] = b.byte[15];
  dst.byte[8] = a.byte[1];
  dst.byte[9] = a.byte[3];
  dst.byte[10] = a.byte[5];
  dst.byte[11] = a.byte[7];
  dst.byte[12] = a.byte[9];
  dst.byte[13] = a.byte[11];
  dst.byte[14] = a.byte[13];
  dst.byte[15] = a.byte[15];
  dst.byte[16] = b.byte[17];
  dst.byte[17] = b.byte[19];
  dst.byte[18] = b.byte[21];
  dst.byte[19] = b.byte[23];
  dst.byte[20] = b.byte[25];
  dst.byte[21] = b.byte[27];
  dst.byte[22] = b.byte[29];
  dst.byte[23] = b.byte[31];
  dst.byte[24] = a.byte[17];
  dst.byte[25] = a.byte[19];
  dst.byte[26] = a.byte[21];
  dst.byte[27] = a.byte[23];
  dst.byte[28] = a.byte[25];
  dst.byte[29] = a.byte[27];
  dst.byte[30] = a.byte[29];
  dst.byte[31] = a.byte[31];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickod_d (__m256i a, __m256i b)`

**汇编指令**: `xvpickod.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickod_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickod.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick odd-positioned 64-bit elements in `b` first, then pick odd-positioned 64-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? b.dword[i * 2 + 1] : a.dword[(i - 1) * 2 + 1];
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (i < 3) ? b.dword[(i - 1) * 2 + 1] : a.dword[(i - 2) * 2 + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = b.dword[1];
  dst.dword[1] = a.dword[1];
  dst.dword[2] = b.dword[3];
  dst.dword[3] = a.dword[3];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickod_h (__m256i a, __m256i b)`

**汇编指令**: `xvpickod.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickod_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickod.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick odd-positioned 16-bit elements in `b` first, then pick odd-positioned 16-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? b.half[i * 2 + 1] : a.half[(i - 4) * 2 + 1];
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (i < 12) ? b.half[(i - 4) * 2 + 1] : a.half[(i - 8) * 2 + 1];
}

// Expands to:

if (0) {
  dst.half[0] = b.half[1];
  dst.half[1] = b.half[3];
  dst.half[2] = b.half[5];
  dst.half[3] = b.half[7];
  dst.half[4] = a.half[1];
  dst.half[5] = a.half[3];
  dst.half[6] = a.half[5];
  dst.half[7] = a.half[7];
  dst.half[8] = b.half[9];
  dst.half[9] = b.half[11];
  dst.half[10] = b.half[13];
  dst.half[11] = b.half[15];
  dst.half[12] = a.half[9];
  dst.half[13] = a.half[11];
  dst.half[14] = a.half[13];
  dst.half[15] = a.half[15];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickod_w (__m256i a, __m256i b)`

**汇编指令**: `xvpickod.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickod_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvpickod.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Pick odd-positioned 32-bit elements in `b` first, then pick odd-positioned 32-bit elements in `a`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? b.word[i * 2 + 1] : a.word[(i - 2) * 2 + 1];
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6) ? b.word[(i - 2) * 2 + 1] : a.word[(i - 4) * 2 + 1];
}

// Expands to:

if (0) {
  dst.word[0] = b.word[1];
  dst.word[1] = b.word[3];
  dst.word[2] = a.word[1];
  dst.word[3] = a.word[3];
  dst.word[4] = b.word[5];
  dst.word[5] = b.word[7];
  dst.word[6] = a.word[5];
  dst.word[7] = a.word[7];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvpickve_d (__m256i a, imm0_3 imm)`

**汇编指令**: `xvpickve.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickve_d (__m256i a, imm0_3 imm)
#include <lasxintrin.h>
Instruction: xvpickve.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Copy one 64-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (i == 0) ? a.dword[imm] : 0;
}

// Expands to:

if (0) {
  dst.dword[0] = a.dword[imm];
  dst.dword[1] = 0;
  dst.dword[2] = 0;
  dst.dword[3] = 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvpickve_w (__m256i a, imm0_7 imm)`

**汇编指令**: `xvpickve.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpickve_w (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvpickve.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Copy one 32-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (i == 0) ? a.word[imm] : 0;
}

// Expands to:

if (0) {
  dst.word[0] = a.word[imm];
  dst.word[1] = 0;
  dst.word[2] = 0;
  dst.word[3] = 0;
  dst.word[4] = 0;
  dst.word[5] = 0;
  dst.word[6] = 0;
  dst.word[7] = 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvrepl128vei_b (__m256i a, imm0_15 idx)`

**汇编指令**: `xvrepl128vei.b xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepl128vei_b (__m256i a, imm0_15 idx)
#include <lasxintrin.h>
Instruction: xvrepl128vei.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[idx];
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = a.byte[idx + 16];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrepl128vei_d (__m256i a, imm0_1 idx)`

**汇编指令**: `xvrepl128vei.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepl128vei_d (__m256i a, imm0_1 idx)
#include <lasxintrin.h>
Instruction: xvrepl128vei.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[idx];
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = a.dword[idx + 2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrepl128vei_h (__m256i a, imm0_7 idx)`

**汇编指令**: `xvrepl128vei.h xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepl128vei_h (__m256i a, imm0_7 idx)
#include <lasxintrin.h>
Instruction: xvrepl128vei.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[idx];
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = a.half[idx + 8];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrepl128vei_w (__m256i a, imm0_3 idx)`

**汇编指令**: `xvrepl128vei.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepl128vei_w (__m256i a, imm0_3 idx)
#include <lasxintrin.h>
Instruction: xvrepl128vei.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[idx];
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = a.word[idx + 4];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvreplgr2vr_b (int val)`

**汇编指令**: `xvreplgr2vr.b xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplgr2vr_b (int val)
#include <lasxintrin.h>
Instruction: xvreplgr2vr.b xr, r
CPU Flags: LASX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |

---

### `__m256i __lasx_xvreplgr2vr_d (long int val)`

**汇编指令**: `xvreplgr2vr.d xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplgr2vr_d (long int val)
#include <lasxintrin.h>
Instruction: xvreplgr2vr.d xr, r
CPU Flags: LASX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |

---

### `__m256i __lasx_xvreplgr2vr_h (int val)`

**汇编指令**: `xvreplgr2vr.h xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplgr2vr_h (int val)
#include <lasxintrin.h>
Instruction: xvreplgr2vr.h xr, r
CPU Flags: LASX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |

---

### `__m256i __lasx_xvreplgr2vr_w (int val)`

**汇编指令**: `xvreplgr2vr.w xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplgr2vr_w (int val)
#include <lasxintrin.h>
Instruction: xvreplgr2vr.w xr, r
CPU Flags: LASX
```

#### Description

Repeat `val` to whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = val;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | N/A | 1 |
| 3A6000 | LA664 | N/A | 1 |
| 3C6000 | LA664 | N/A | 1 |

---

### `__m256i __lasx_xvrepli_b (imm_n512_511 imm)`

**汇编指令**: `xvldi xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepli_b (imm_n512_511 imm)
#include <lasxintrin.h>
Instruction: xvldi xr, imm
CPU Flags: LASX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvrepli_d (imm_n512_511 imm)`

**汇编指令**: `xvldi xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepli_d (imm_n512_511 imm)
#include <lasxintrin.h>
Instruction: xvldi xr, imm
CPU Flags: LASX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvrepli_h (imm_n512_511 imm)`

**汇编指令**: `xvldi xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepli_h (imm_n512_511 imm)
#include <lasxintrin.h>
Instruction: xvldi xr, imm
CPU Flags: LASX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvrepli_w (imm_n512_511 imm)`

**汇编指令**: `xvldi xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrepli_w (imm_n512_511 imm)
#include <lasxintrin.h>
Instruction: xvldi xr, imm
CPU Flags: LASX
```

#### Description

Repeat `imm` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = imm;
}
```

Tested on real machine.

#### Latency and Throughput

未提供

---

### `__m256i __lasx_xvreplve0_b (__m256i a)`

**汇编指令**: `xvreplve0.b xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve0_b (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.b xr, xr
CPU Flags: LASX
```

#### Description

Repeat the first 8-bit lane from `a` to all lanes of `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvreplve0_d (__m256i a)`

**汇编指令**: `xvreplve0.d xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve0_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.d xr, xr
CPU Flags: LASX
```

#### Description

Repeat the first 64-bit lane from `a` to all lanes of `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvreplve0_h (__m256i a)`

**汇编指令**: `xvreplve0.h xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve0_h (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.h xr, xr
CPU Flags: LASX
```

#### Description

Repeat the first 16-bit lane from `a` to all lanes of `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvreplve0_q (__m256i a)`

**汇编指令**: `xvreplve0.q xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve0_q (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.q xr, xr
CPU Flags: LASX
```

#### Description

Repeat the first 128-bit lane from `a` to all lanes of `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.qword[i] = a.qword[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvreplve0_w (__m256i a)`

**汇编指令**: `xvreplve0.w xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve0_w (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.w xr, xr
CPU Flags: LASX
```

#### Description

Repeat the first 32-bit lane from `a` to all lanes of `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[0];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvreplve_b (__m256i a, int idx)`

**汇编指令**: `xvreplve.b xr, xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve_b (__m256i a, int idx)
#include <lasxintrin.h>
Instruction: xvreplve.b xr, xr, r
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = a.byte[idx % 16];
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = a.byte[(idx % 16) + 16];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvreplve_d (__m256i a, int idx)`

**汇编指令**: `xvreplve.d xr, xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve_d (__m256i a, int idx)
#include <lasxintrin.h>
Instruction: xvreplve.d xr, xr, r
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = a.dword[idx % 2];
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = a.dword[(idx % 2) + 2];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvreplve_h (__m256i a, int idx)`

**汇编指令**: `xvreplve.h xr, xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve_h (__m256i a, int idx)
#include <lasxintrin.h>
Instruction: xvreplve.h xr, xr, r
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = a.half[idx % 8];
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = a.half[(idx % 8) + 8];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvreplve_w (__m256i a, int idx)`

**汇编指令**: `xvreplve.w xr, xr, r`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvreplve_w (__m256i a, int idx)
#include <lasxintrin.h>
Instruction: xvreplve.w xr, xr, r
CPU Flags: LASX
```

#### Description

Repeat the element in lane `idx` of `a` to fill whole vector.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = a.word[idx % 4];
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = a.word[(idx % 4) + 4];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvsat_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsat.b xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsat.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp signed 8-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = clamp<s8>(a.byte[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_bu (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsat.bu xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_bu (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsat.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp unsigned 8-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = clamp<u8>(a.byte[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsat.d xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsat.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp signed 64-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = clamp<s64>(a.dword[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_du (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsat.du xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_du (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsat.du xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp unsigned 64-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = clamp<u64>(a.dword[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsat.h xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsat.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp signed 16-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = clamp<s16>(a.half[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_hu (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsat.hu xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_hu (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsat.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp unsigned 16-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = clamp<u16>(a.half[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsat.w xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsat.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp signed 32-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = clamp<s32>(a.word[i], -(1 << imm), (1 << imm) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsat_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsat.wu xr, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsat_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsat.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Clamp unsigned 32-bit elements in `a` to range specified by `imm`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = clamp<u32>(a.word[i], 0, (1 << (imm + 1)) - 1);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsigncov_b (__m256i a, __m256i b)`

**汇编指令**: `xvsigncov.b xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsigncov_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsigncov.b xr, xr, xr
CPU Flags: LASX
```

#### Description

If the 8-bit element in `a` equals to zero, set the result to zero. If the signed 8-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] =
      (a.byte[i] == 0) ? 0 : ((s8)a.byte[i] > 0 ? b.byte[i] : -b.byte[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvsigncov_d (__m256i a, __m256i b)`

**汇编指令**: `xvsigncov.d xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsigncov_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsigncov.d xr, xr, xr
CPU Flags: LASX
```

#### Description

If the 64-bit element in `a` equals to zero, set the result to zero. If the signed 64-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] =
      (a.dword[i] == 0) ? 0 : ((s64)a.dword[i] > 0 ? b.dword[i] : -b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvsigncov_h (__m256i a, __m256i b)`

**汇编指令**: `xvsigncov.h xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsigncov_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsigncov.h xr, xr, xr
CPU Flags: LASX
```

#### Description

If the 16-bit element in `a` equals to zero, set the result to zero. If the signed 16-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] =
      (a.half[i] == 0) ? 0 : ((s16)a.half[i] > 0 ? b.half[i] : -b.half[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvsigncov_w (__m256i a, __m256i b)`

**汇编指令**: `xvsigncov.w xr, xr, xr`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsigncov_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsigncov.w xr, xr, xr
CPU Flags: LASX
```

#### Description

If the 32-bit element in `a` equals to zero, set the result to zero. If the signed 32-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] =
      (a.word[i] == 0) ? 0 : ((s32)a.word[i] > 0 ? b.word[i] : -b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `int __lasx_xvpickve2gr_w (__m256i a, imm0_7 idx)`

**汇编指令**: `xvpickve2gr.w r, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
int __lasx_xvpickve2gr_w (__m256i a, imm0_7 idx)
#include <lasxintrin.h>
Instruction: xvpickve2gr.w r, xr, imm
CPU Flags: LASX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s32)a.word[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `long int __lasx_xvpickve2gr_d (__m256i a, imm0_3 idx)`

**汇编指令**: `xvpickve2gr.d r, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
long int __lasx_xvpickve2gr_d (__m256i a, imm0_3 idx)
#include <lasxintrin.h>
Instruction: xvpickve2gr.d r, xr, imm
CPU Flags: LASX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (s64)a.dword[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `unsigned int __lasx_xvpickve2gr_wu (__m256i a, imm0_7 idx)`

**汇编指令**: `xvpickve2gr.wu r, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
unsigned int __lasx_xvpickve2gr_wu (__m256i a, imm0_7 idx)
#include <lasxintrin.h>
Instruction: xvpickve2gr.wu r, xr, imm
CPU Flags: LASX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u32)a.word[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `unsigned long int __lasx_xvpickve2gr_du (__m256i a, imm0_3 idx)`

**汇编指令**: `xvpickve2gr.du r, xr, imm`  
**分类**: `Misc`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
unsigned long int __lasx_xvpickve2gr_du (__m256i a, imm0_3 idx)
#include <lasxintrin.h>
Instruction: xvpickve2gr.du r, xr, imm
CPU Flags: LASX
```

#### Description

Pick the `lane` specified by `idx` from `a` and store into `dst`.

#### Operation

```c++
dst = (u64)a.dword[idx];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

## Permutation

### `__m256i __lasx_xvperm_w (__m256i a, __m256i b)`

**汇编指令**: `xvperm.w xr, xr, xr`  
**分类**: `Permutation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvperm_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvperm.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Permute words from `a` with indices recorded in `b` and store into `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[b.word[i] % 0x8];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvpermi_d (__m256i a, imm0_255 imm)`

**汇编指令**: `xvpermi.d xr, xr, imm`  
**分类**: `Permutation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpermi_d (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvpermi.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Permute double words from `a` with indices recorded in `imm` and store into `dst`.

![](../diagram/xvpermi_d.svg)

#### Examples

```c++
__m256i __lasx_xvpermi_d( __m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, 0x12)
= 0xabcdef1212341234 0x1122334455667788 0x99aabbccddeeff00 0x1122334455667788
```

#### Operation

```c++
dst.dword[0] = a.dword[imm & 0x3];
dst.dword[1] = a.dword[(imm >> 2) & 0x3];
dst.dword[2] = a.dword[(imm >> 4) & 0x3];
dst.dword[3] = a.dword[(imm >> 6) & 0x3];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 4 |
| 3C6000 | LA664 | 3 | 4 |

---

### `__m256i __lasx_xvpermi_q (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvpermi.q xr, xr, imm`  
**分类**: `Permutation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpermi_q (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvpermi.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Permute quad words from `a` and `b` with indices recorded in `imm` and store into `dst`.

![](../diagram/xvpermi_q.svg)

#### Examples

```c++
__m256i __lasx_xvpermi_q( __m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{ 0xababababbbbbbbbb, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0x1122334455667788 0x99aabbccddeeff00 0x1234123443214321 0x5678567856785678
```

#### Operation

```c++
if ((imm & 0x4) && (UARCH_LA264 || UARCH_LA464)) {
  // Caveat: observed in LA264 and LA464
  dst.qword[0] = 0;
} else {
  dst.qword[0] = (imm & 2) ? a.qword[imm & 0x1] : b.qword[imm & 0x1];
}
if ((imm & 0x80) && (UARCH_LA264 || UARCH_LA464)) {
  // Caveat: observed in LA264 and LA464
  dst.qword[1] = 0;
} else {
  dst.qword[1] =
      (imm & 0x20) ? a.qword[(imm >> 4) & 0x1] : b.qword[(imm >> 4) & 0x1];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2.67 |
| 3C6000 | LA664 | 3 | 2.67 |

---

### `__m256i __lasx_xvpermi_w (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvpermi.w xr, xr, imm`  
**分类**: `Permutation`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvpermi_w (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvpermi.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`.

![](../diagram/xvpermi_w.svg)

#### Examples

```c++
__m256i __lasx_xvpermi_w( __m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{ 0xababababbbbbbbbb, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0xbbbbbbbb43214321 0x5566778811223344 0x4321432156785678 0x12341234abcdef12
```

#### Operation

```c++
dst.word[0] = b.word[imm & 0x3];
dst.word[1] = b.word[(imm >> 2) & 0x3];
dst.word[2] = a.word[(imm >> 4) & 0x3];
dst.word[3] = a.word[(imm >> 6) & 0x3];
dst.word[4] = b.word[4 + (imm & 0x3)];
dst.word[5] = b.word[4 + ((imm >> 2) & 0x3)];
dst.word[6] = a.word[4 + ((imm >> 4) & 0x3)];
dst.word[7] = a.word[4 + ((imm >> 6) & 0x3)];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

## Shift

### `__m256i __lasx_xvbsll_v (__m256i a, imm0_31 imm)`

**汇编指令**: `xvbsll.v xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbsll_v (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvbsll.v xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute whole vector `a` shifted left by `imm * 8` bits.

#### Operation

```c++
int shift = (imm * 8) % 128;
dst.qword[0] = (u128)a.qword[0] << shift;
dst.qword[1] = (u128)a.qword[1] << shift;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvbsrl_v (__m256i a, imm0_31 imm)`

**汇编指令**: `xvbsrl.v xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvbsrl_v (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvbsrl.v xr, xr, imm
CPU Flags: LASX
```

#### Description

Compute whole vector `a` shifted right by `imm * 8` bits.

#### Operation

```c++
int shift = (imm * 8) % 128;
dst.qword[0] = (u128)a.qword[0] >> shift;
dst.qword[1] = (u128)a.qword[1] >> shift;
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotr_b (__m256i a, __m256i b)`

**汇编指令**: `xvrotr.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotr_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvrotr.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] =
      (a.byte[i] >> (b.byte[i] & 0x7)) | (a.byte[i] << (8 - (b.byte[i] & 0x7)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotr_d (__m256i a, __m256i b)`

**汇编指令**: `xvrotr.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotr_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvrotr.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) |
                 (a.dword[i] << (64 - (b.dword[i] & 0x3f)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotr_h (__m256i a, __m256i b)`

**汇编指令**: `xvrotr.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotr_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvrotr.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) |
                (a.half[i] << (16 - (b.half[i] & 0xf)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotr_w (__m256i a, __m256i b)`

**汇编指令**: `xvrotr.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotr_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvrotr.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) |
                (a.word[i] << (32 - (b.word[i] & 0x1f)));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotri_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvrotri.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotri_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvrotri.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = (a.byte[i] >> imm) | (a.byte[i] << (8 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotri_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvrotri.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotri_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvrotri.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = (a.dword[i] >> imm) | (a.dword[i] << (64 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotri_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvrotri.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotri_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvrotri.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = (a.half[i] >> imm) | (a.half[i] << (16 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvrotri_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvrotri.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvrotri_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvrotri.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Rotate right the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = (a.word[i] >> imm) | (a.word[i] << (32 - imm));
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsll_b (__m256i a, __m256i b)`

**汇编指令**: `xvsll.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsll_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsll.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] << (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsll_d (__m256i a, __m256i b)`

**汇编指令**: `xvsll.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsll_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsll.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] << (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsll_h (__m256i a, __m256i b)`

**汇编指令**: `xvsll.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsll_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsll.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] << (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsll_w (__m256i a, __m256i b)`

**汇编指令**: `xvsll.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsll_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsll.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] << (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslli_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvslli.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslli_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvslli.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslli_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvslli.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslli_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvslli.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslli_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvslli.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslli_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvslli.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvslli_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvslli.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvslli_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvslli.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical left shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsllwil_d_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsllwil.d.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_d_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.d.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift signed 32-bit elements in `a` by `imm` to signed 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (s64)(s32)a.word[i] << imm;
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[i + 2] << imm;
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[0])) << imm;
  dst.dword[1] = ((s64)((s32)a.word[1])) << imm;
  dst.dword[2] = ((s64)((s32)a.word[4])) << imm;
  dst.dword[3] = ((s64)((s32)a.word[5])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsllwil_du_wu (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsllwil.du.wu xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_du_wu (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.du.wu xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift unsigned 32-bit elements in `a` by `imm` to unsigned 64-bit result.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (u64)(u32)a.word[i] << imm;
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (u64)(u32)a.word[i + 2] << imm;
}

// Expands to:

if (0) {
  dst.dword[0] = ((u64)((u32)a.word[0])) << imm;
  dst.dword[1] = ((u64)((u32)a.word[1])) << imm;
  dst.dword[2] = ((u64)((u32)a.word[4])) << imm;
  dst.dword[3] = ((u64)((u32)a.word[5])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsllwil_h_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsllwil.h.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_h_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.h.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift signed 8-bit elements in `a` by `imm` to signed 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (s16)(s8)a.byte[i] << imm;
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (s16)(s8)a.byte[i + 8] << imm;
}

// Expands to:

if (0) {
  dst.half[0] = ((s16)((s8)a.byte[0])) << imm;
  dst.half[1] = ((s16)((s8)a.byte[1])) << imm;
  dst.half[2] = ((s16)((s8)a.byte[2])) << imm;
  dst.half[3] = ((s16)((s8)a.byte[3])) << imm;
  dst.half[4] = ((s16)((s8)a.byte[4])) << imm;
  dst.half[5] = ((s16)((s8)a.byte[5])) << imm;
  dst.half[6] = ((s16)((s8)a.byte[6])) << imm;
  dst.half[7] = ((s16)((s8)a.byte[7])) << imm;
  dst.half[8] = ((s16)((s8)a.byte[16])) << imm;
  dst.half[9] = ((s16)((s8)a.byte[17])) << imm;
  dst.half[10] = ((s16)((s8)a.byte[18])) << imm;
  dst.half[11] = ((s16)((s8)a.byte[19])) << imm;
  dst.half[12] = ((s16)((s8)a.byte[20])) << imm;
  dst.half[13] = ((s16)((s8)a.byte[21])) << imm;
  dst.half[14] = ((s16)((s8)a.byte[22])) << imm;
  dst.half[15] = ((s16)((s8)a.byte[23])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsllwil_hu_bu (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsllwil.hu.bu xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_hu_bu (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.hu.bu xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift unsigned 8-bit elements in `a` by `imm` to unsigned 16-bit result.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (u16)(u8)a.byte[i] << imm;
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (u16)(u8)a.byte[i + 8] << imm;
}

// Expands to:

if (0) {
  dst.half[0] = ((u16)((u8)a.byte[0])) << imm;
  dst.half[1] = ((u16)((u8)a.byte[1])) << imm;
  dst.half[2] = ((u16)((u8)a.byte[2])) << imm;
  dst.half[3] = ((u16)((u8)a.byte[3])) << imm;
  dst.half[4] = ((u16)((u8)a.byte[4])) << imm;
  dst.half[5] = ((u16)((u8)a.byte[5])) << imm;
  dst.half[6] = ((u16)((u8)a.byte[6])) << imm;
  dst.half[7] = ((u16)((u8)a.byte[7])) << imm;
  dst.half[8] = ((u16)((u8)a.byte[16])) << imm;
  dst.half[9] = ((u16)((u8)a.byte[17])) << imm;
  dst.half[10] = ((u16)((u8)a.byte[18])) << imm;
  dst.half[11] = ((u16)((u8)a.byte[19])) << imm;
  dst.half[12] = ((u16)((u8)a.byte[20])) << imm;
  dst.half[13] = ((u16)((u8)a.byte[21])) << imm;
  dst.half[14] = ((u16)((u8)a.byte[22])) << imm;
  dst.half[15] = ((u16)((u8)a.byte[23])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsllwil_w_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsllwil.w.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_w_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.w.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift signed 16-bit elements in `a` by `imm` to signed 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (s32)(s16)a.half[i] << imm;
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (s32)(s16)a.half[i + 4] << imm;
}

// Expands to:

if (0) {
  dst.word[0] = ((s32)((s16)a.half[0])) << imm;
  dst.word[1] = ((s32)((s16)a.half[1])) << imm;
  dst.word[2] = ((s32)((s16)a.half[2])) << imm;
  dst.word[3] = ((s32)((s16)a.half[3])) << imm;
  dst.word[4] = ((s32)((s16)a.half[8])) << imm;
  dst.word[5] = ((s32)((s16)a.half[9])) << imm;
  dst.word[6] = ((s32)((s16)a.half[10])) << imm;
  dst.word[7] = ((s32)((s16)a.half[11])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsllwil_wu_hu (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsllwil.wu.hu xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsllwil_wu_hu (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsllwil.wu.hu xr, xr, imm
CPU Flags: LASX
```

#### Description

Extend and shift unsigned 16-bit elements in `a` by `imm` to unsigned 32-bit result.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (u32)(u16)a.half[i] << imm;
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (u32)(u16)a.half[i + 4] << imm;
}

// Expands to:

if (0) {
  dst.word[0] = ((u32)((u16)a.half[0])) << imm;
  dst.word[1] = ((u32)((u16)a.half[1])) << imm;
  dst.word[2] = ((u32)((u16)a.half[2])) << imm;
  dst.word[3] = ((u32)((u16)a.half[3])) << imm;
  dst.word[4] = ((u32)((u16)a.half[8])) << imm;
  dst.word[5] = ((u32)((u16)a.half[9])) << imm;
  dst.word[6] = ((u32)((u16)a.half[10])) << imm;
  dst.word[7] = ((u32)((u16)a.half[11])) << imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsra_b (__m256i a, __m256i b)`

**汇编指令**: `xvsra.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsra_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsra.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i]) >> (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsra_d (__m256i a, __m256i b)`

**汇编指令**: `xvsra.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsra_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsra.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i]) >> (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsra_h (__m256i a, __m256i b)`

**汇编指令**: `xvsra.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsra_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsra.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i]) >> (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsra_w (__m256i a, __m256i b)`

**汇编指令**: `xvsra.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsra_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsra.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i]) >> (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrai_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsrai.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrai_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsrai.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = ((s8)a.byte[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrai_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsrai.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrai_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrai.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = ((s64)a.dword[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrai_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsrai.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrai_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrai.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = ((s16)a.half[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrai_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsrai.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrai_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrai.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = ((s32)a.word[i]) >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsran_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvsran.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsran_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsran.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? (s8)((s16)a.half[i] >> (b.half[i] & 15)) : 0;
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? (s8)((s16)a.half[i - 8] >> (b.half[i - 8] & 15)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsran_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvsran.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsran_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsran.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? (s16)((s32)a.word[i] >> (b.word[i] & 31)) : 0;
}
for (int i = 8; i < 16; i++) {
  dst.half[i] =
      (i < 12) ? (s16)((s32)a.word[i - 4] >> (b.word[i - 4] & 31)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsran_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvsran.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsran_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsran.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (s32)((s64)a.dword[i] >> (b.dword[i] & 63)) : 0;
}
for (int i = 4; i < 8; i++) {
  dst.word[i] =
      (i < 6) ? (s32)((s64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsrani_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvsrani.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrani_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrani.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (i < 8) ? (s8)((s16)b.half[i] >> imm) : (s8)((s16)a.half[i - 8] >> imm);
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? (s8)((s16)b.half[i - 8] >> imm)
                         : (s8)((s16)a.half[i - 16] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrani_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvsrani.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrani_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvsrani.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? (s64)((s128)b.qword[i] >> imm)
                         : (s64)((s128)a.qword[i - 1] >> imm);
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (i < 3) ? (s64)((s128)b.qword[i - 1] >> imm)
                         : (s64)((s128)a.qword[i - 2] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrani_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvsrani.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrani_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrani.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (i < 4) ? (s16)((s32)b.word[i] >> imm) : (s16)((s32)a.word[i - 4] >> imm);
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (i < 12) ? (s16)((s32)b.word[i - 4] >> imm)
                         : (s16)((s32)a.word[i - 8] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrani_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvsrani.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrani_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrani.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (s32)((s64)b.dword[i] >> imm)
                        : (s32)((s64)a.dword[i - 2] >> imm);
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6) ? (s32)((s64)b.dword[i - 2] >> imm)
                        : (s32)((s64)a.dword[i - 4] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrar_b (__m256i a, __m256i b)`

**汇编指令**: `xvsrar.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrar_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrar.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  if ((b.byte[i] & 0x7) == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = ((s8)a.byte[i] >> (b.byte[i] & 0x7)) +
                  (((s8)a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrar_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrar.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrar_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrar.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((b.dword[i] & 0x3f) == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = ((s64)a.dword[i] >> (b.dword[i] & 0x3f)) +
                   (((s64)a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrar_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrar.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrar_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrar.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if ((b.half[i] & 0xf) == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = ((s16)a.half[i] >> (b.half[i] & 0xf)) +
                  (((s16)a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrar_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrar.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrar_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrar.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((b.word[i] & 0x1f) == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = ((s32)a.word[i] >> (b.word[i] & 0x1f)) +
                  (((s32)a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrari_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsrari.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrari_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsrari.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  if (imm == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = ((s8)a.byte[i] >> imm) + (((s8)a.byte[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrari_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsrari.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrari_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrari.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (imm == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] =
        ((s64)a.dword[i] >> imm) + (((s64)a.dword[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrari_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsrari.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrari_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrari.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (imm == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] =
        ((s16)a.half[i] >> imm) + (((s16)a.half[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrari_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsrari.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrari_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrari.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (imm == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] =
        ((s32)a.word[i] >> imm) + (((s32)a.word[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrarn_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrarn.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarn_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrarn.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u8 shift = (b.half[i] & 15);
    if (shift == 0) {
      dst.byte[i] = (s8)(s16)a.half[i];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i] >> shift) +
                         (((s16)a.half[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u8 shift = (b.half[i - 8] & 15);
    if (shift == 0) {
      dst.byte[i] = (s8)(s16)a.half[i - 8];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i - 8] >> shift) +
                         (((s16)a.half[i - 8] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrarn_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrarn.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarn_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrarn.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u8 shift = (b.word[i] & 31);
    if (shift == 0) {
      dst.half[i] = (s16)(s32)a.word[i];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i] >> shift) +
                          (((s32)a.word[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u8 shift = (b.word[i - 4] & 31);
    if (shift == 0) {
      dst.half[i] = (s16)(s32)a.word[i - 4];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i - 4] >> shift) +
                          (((s32)a.word[i - 4] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrarn_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrarn.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarn_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrarn.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u8 shift = (b.dword[i] & 63);
    if (shift == 0) {
      dst.word[i] = (s32)(s64)a.dword[i];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i] >> shift) +
                          (((s64)a.dword[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u8 shift = (b.dword[i - 2] & 63);
    if (shift == 0) {
      dst.word[i] = (s32)(s64)a.dword[i - 2];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i - 2] >> shift) +
                          (((s64)a.dword[i - 2] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrarni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvsrarni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrarni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)b.half[i];
    } else {
      dst.byte[i] =
          (s8)(((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)a.half[i - 8];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i - 8] >> imm) +
                         (((s16)a.half[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)b.half[i - 8];
    } else {
      dst.byte[i] = (s8)(((s16)b.half[i - 8] >> imm) +
                         (((s16)b.half[i - 8] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (s8)(s16)a.half[i - 16];
    } else {
      dst.byte[i] = (s8)(((s16)a.half[i - 16] >> imm) +
                         (((s16)a.half[i - 16] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrarni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvsrarni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvsrarni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)b.qword[i];
    } else {
      dst.dword[i] = (s64)(((s128)b.qword[i] >> imm) +
                           (((s128)b.qword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)a.qword[i - 1];
    } else {
      dst.dword[i] = (s64)(((s128)a.qword[i - 1] >> imm) +
                           (((s128)a.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)b.qword[i - 1];
    } else {
      dst.dword[i] = (s64)(((s128)b.qword[i - 1] >> imm) +
                           (((s128)b.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (s64)(s128)a.qword[i - 2];
    } else {
      dst.dword[i] = (s64)(((s128)a.qword[i - 2] >> imm) +
                           (((s128)a.qword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrarni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvsrarni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrarni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)b.word[i];
    } else {
      dst.half[i] = (s16)(((s32)b.word[i] >> imm) +
                          (((s32)b.word[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)a.word[i - 4];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i - 4] >> imm) +
                          (((s32)a.word[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)b.word[i - 4];
    } else {
      dst.half[i] = (s16)(((s32)b.word[i - 4] >> imm) +
                          (((s32)b.word[i - 4] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (s16)(s32)a.word[i - 8];
    } else {
      dst.half[i] = (s16)(((s32)a.word[i - 8] >> imm) +
                          (((s32)a.word[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrarni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvsrarni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrarni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrarni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)b.dword[i];
    } else {
      dst.word[i] = (s32)(((s64)b.dword[i] >> imm) +
                          (((s64)b.dword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)a.dword[i - 2];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i - 2] >> imm) +
                          (((s64)a.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)b.dword[i - 2];
    } else {
      dst.word[i] = (s32)(((s64)b.dword[i - 2] >> imm) +
                          (((s64)b.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (s32)(s64)a.dword[i - 4];
    } else {
      dst.word[i] = (s32)(((s64)a.dword[i - 4] >> imm) +
                          (((s64)a.dword[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrl_b (__m256i a, __m256i b)`

**汇编指令**: `xvsrl.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrl_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrl.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] >> (b.byte[i] & 0x7);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrl_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrl.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrl_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrl.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] >> (b.dword[i] & 0x3f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrl_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrl.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrl_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrl.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] >> (b.half[i] & 0xf);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrl_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrl.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrl_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrl.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] >> (b.word[i] & 0x1f);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrli_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsrli.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrli_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsrli.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrli_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsrli.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrli_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrli.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrli_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsrli.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrli_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrli.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrli_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsrli.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrli_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrli.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[i] >> imm;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvsrln_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrln.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrln_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrln.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] = (i < 8) ? (u8)((u16)a.half[i] >> (b.half[i] & 15)) : 0;
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? (u8)((u16)a.half[i - 8] >> (b.half[i - 8] & 15)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsrln_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrln.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrln_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrln.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] = (i < 4) ? (u16)((u32)a.word[i] >> (b.word[i] & 31)) : 0;
}
for (int i = 8; i < 16; i++) {
  dst.half[i] =
      (i < 12) ? (u16)((u32)a.word[i - 4] >> (b.word[i - 4] & 31)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsrln_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrln.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrln_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrln.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (u32)((u64)a.dword[i] >> (b.dword[i] & 63)) : 0;
}
for (int i = 4; i < 8; i++) {
  dst.word[i] =
      (i < 6) ? (u32)((u64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) : 0;
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |

---

### `__m256i __lasx_xvsrlni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvsrlni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrlni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.byte[i] =
      (i < 8) ? (u8)((u16)b.half[i] >> imm) : (u8)((u16)a.half[i - 8] >> imm);
}
for (int i = 16; i < 32; i++) {
  dst.byte[i] = (i < 24) ? (u8)((u16)b.half[i - 8] >> imm)
                         : (u8)((u16)a.half[i - 16] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvsrlni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvsrlni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? (u64)((u128)b.qword[i] >> imm)
                         : (u64)((u128)a.qword[i - 1] >> imm);
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (i < 3) ? (u64)((u128)b.qword[i - 1] >> imm)
                         : (u64)((u128)a.qword[i - 2] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvsrlni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrlni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.half[i] =
      (i < 4) ? (u16)((u32)b.word[i] >> imm) : (u16)((u32)a.word[i - 4] >> imm);
}
for (int i = 8; i < 16; i++) {
  dst.half[i] = (i < 12) ? (u16)((u32)b.word[i - 4] >> imm)
                         : (u16)((u32)a.word[i - 8] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvsrlni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrlni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.word[i] = (i < 2) ? (u32)((u64)b.dword[i] >> imm)
                        : (u32)((u64)a.dword[i - 2] >> imm);
}
for (int i = 4; i < 8; i++) {
  dst.word[i] = (i < 6) ? (u32)((u64)b.dword[i - 2] >> imm)
                        : (u32)((u64)a.dword[i - 4] >> imm);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlr_b (__m256i a, __m256i b)`

**汇编指令**: `xvsrlr.b xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlr_b (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlr.b xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  if ((b.byte[i] & 0x7) == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) +
                  ((a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlr_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrlr.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlr_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlr.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((b.dword[i] & 0x3f) == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) +
                   ((a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlr_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrlr.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlr_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlr.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if ((b.half[i] & 0xf) == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) +
                  ((a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlr_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrlr.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlr_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlr.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((b.word[i] & 0x1f) == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) +
                  ((a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlri_b (__m256i a, imm0_7 imm)`

**汇编指令**: `xvsrlri.b xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlri_b (__m256i a, imm0_7 imm)
#include <lasxintrin.h>
Instruction: xvsrlri.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  if (imm == 0) {
    dst.byte[i] = a.byte[i];
  } else {
    dst.byte[i] = (a.byte[i] >> imm) + ((a.byte[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlri_d (__m256i a, imm0_63 imm)`

**汇编指令**: `xvsrlri.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlri_d (__m256i a, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrlri.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (imm == 0) {
    dst.dword[i] = a.dword[i];
  } else {
    dst.dword[i] = (a.dword[i] >> imm) + ((a.dword[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlri_h (__m256i a, imm0_15 imm)`

**汇编指令**: `xvsrlri.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlri_h (__m256i a, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrlri.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (imm == 0) {
    dst.half[i] = a.half[i];
  } else {
    dst.half[i] = (a.half[i] >> imm) + ((a.half[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlri_w (__m256i a, imm0_31 imm)`

**汇编指令**: `xvsrlri.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlri_w (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrlri.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (imm == 0) {
    dst.word[i] = a.word[i];
  } else {
    dst.word[i] = (a.word[i] >> imm) + ((a.word[i] >> (imm - 1)) & 0x1);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlrn_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvsrlrn.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrn_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlrn.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u8 shift = (b.half[i] & 15);
    if (shift == 0) {
      dst.byte[i] = (u8)(u16)a.half[i];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i] >> shift) +
                         (((u16)a.half[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u8 shift = (b.half[i - 8] & 15);
    if (shift == 0) {
      dst.byte[i] = (u8)(u16)a.half[i - 8];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i - 8] >> shift) +
                         (((u16)a.half[i - 8] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlrn_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvsrlrn.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrn_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlrn.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u8 shift = (b.word[i] & 31);
    if (shift == 0) {
      dst.half[i] = (u16)(u32)a.word[i];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i] >> shift) +
                          (((u32)a.word[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u8 shift = (b.word[i - 4] & 31);
    if (shift == 0) {
      dst.half[i] = (u16)(u32)a.word[i - 4];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i - 4] >> shift) +
                          (((u32)a.word[i - 4] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlrn_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvsrlrn.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrn_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvsrlrn.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u8 shift = (b.dword[i] & 63);
    if (shift == 0) {
      dst.word[i] = (u32)(u64)a.dword[i];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i] >> shift) +
                          (((u64)a.dword[i] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u8 shift = (b.dword[i - 2] & 63);
    if (shift == 0) {
      dst.word[i] = (u32)(u64)a.dword[i - 2];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i - 2] >> shift) +
                          (((u64)a.dword[i - 2] >> (shift - 1)) & 0x1));
    }
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlrni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvsrlrni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvsrlrni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)b.half[i];
    } else {
      dst.byte[i] =
          (u8)(((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)a.half[i - 8];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i - 8] >> imm) +
                         (((u16)a.half[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)b.half[i - 8];
    } else {
      dst.byte[i] = (u8)(((u16)b.half[i - 8] >> imm) +
                         (((u16)b.half[i - 8] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.byte[i] = (u8)(u16)a.half[i - 16];
    } else {
      dst.byte[i] = (u8)(((u16)a.half[i - 16] >> imm) +
                         (((u16)a.half[i - 16] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlrni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvsrlrni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvsrlrni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)b.qword[i];
    } else {
      dst.dword[i] = (u64)(((u128)b.qword[i] >> imm) +
                           (((u128)b.qword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)a.qword[i - 1];
    } else {
      dst.dword[i] = (u64)(((u128)a.qword[i - 1] >> imm) +
                           (((u128)a.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)b.qword[i - 1];
    } else {
      dst.dword[i] = (u64)(((u128)b.qword[i - 1] >> imm) +
                           (((u128)b.qword[i - 1] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.dword[i] = (u64)(u128)a.qword[i - 2];
    } else {
      dst.dword[i] = (u64)(((u128)a.qword[i - 2] >> imm) +
                           (((u128)a.qword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvsrlrni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvsrlrni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvsrlrni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)b.word[i];
    } else {
      dst.half[i] = (u16)(((u32)b.word[i] >> imm) +
                          (((u32)b.word[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)a.word[i - 4];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i - 4] >> imm) +
                          (((u32)a.word[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)b.word[i - 4];
    } else {
      dst.half[i] = (u16)(((u32)b.word[i - 4] >> imm) +
                          (((u32)b.word[i - 4] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.half[i] = (u16)(u32)a.word[i - 8];
    } else {
      dst.half[i] = (u16)(((u32)a.word[i - 8] >> imm) +
                          (((u32)a.word[i - 8] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvsrlrni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvsrlrni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvsrlrni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvsrlrni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)b.dword[i];
    } else {
      dst.word[i] = (u32)(((u64)b.dword[i] >> imm) +
                          (((u64)b.dword[i] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)a.dword[i - 2];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i - 2] >> imm) +
                          (((u64)a.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)b.dword[i - 2];
    } else {
      dst.word[i] = (u32)(((u64)b.dword[i - 2] >> imm) +
                          (((u64)b.dword[i - 2] >> (imm - 1)) & 0x1));
    }
  } else {
    if (imm == 0) {
      dst.word[i] = (u32)(u64)a.dword[i - 4];
    } else {
      dst.word[i] = (u32)(((u64)a.dword[i - 4] >> imm) +
                          (((u64)a.dword[i - 4] >> (imm - 1)) & 0x1));
    }
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvssran.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp = (s16)a.half[i - 8] >> (b.half[i - 8] & 15);
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_bu_h (__m256i a, __m256i b)`

**汇编指令**: `xvssran.bu.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_bu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.bu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp = (s16)a.half[i - 8] >> (b.half[i - 8] & 15);
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvssran.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp = (s32)a.word[i - 4] >> (b.word[i - 4] & 31);
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_hu_w (__m256i a, __m256i b)`

**汇编指令**: `xvssran.hu.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_hu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.hu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp = (s32)a.word[i - 4] >> (b.word[i - 4] & 31);
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvssran.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp = (s64)a.dword[i - 2] >> (b.dword[i - 2] & 63);
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssran_wu_d (__m256i a, __m256i b)`

**汇编指令**: `xvssran.wu.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssran_wu_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssran.wu.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp = (s64)a.dword[i - 2] >> (b.dword[i - 2] & 63);
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrani.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrani.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)b.half[i] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp = (s16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp = (s16)b.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp = (s16)a.half[i - 16] >> imm;
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_bu_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrani.bu.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_bu_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrani.bu.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp = (s16)b.half[i] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp = (s16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp = (s16)b.half[i - 8] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp = (s16)a.half[i - 16] >> imm;
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrani.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrani.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp = (s128)b.qword[i] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp = (s128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    s128 temp = (s128)b.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp = (s128)a.qword[i - 2] >> imm;
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrani_du_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrani.du.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_du_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrani.du.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp = (s128)b.qword[i] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp = (s128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    s128 temp = (s128)b.qword[i - 1] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp = (s128)a.qword[i - 2] >> imm;
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrani_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrani.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrani.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)b.word[i] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp = (s32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp = (s32)b.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp = (s32)a.word[i - 8] >> imm;
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_hu_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrani.hu.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_hu_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrani.hu.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp = (s32)b.word[i] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp = (s32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp = (s32)b.word[i - 4] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp = (s32)a.word[i - 8] >> imm;
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrani.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrani.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)b.dword[i] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp = (s64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp = (s64)b.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp = (s64)a.dword[i - 4] >> imm;
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrani_wu_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrani.wu.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrani_wu_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrani.wu.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp = (s64)b.dword[i] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp = (s64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp = (s64)b.dword[i - 2] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp = (s64)a.dword[i - 4] >> imm;
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (s16)a.half[i];
    } else {
      temp = ((s16)a.half[i] >> (b.half[i] & 15)) +
             (((s16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp;
    if ((b.half[i - 8] & 15) == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp = ((s16)a.half[i - 8] >> (b.half[i - 8] & 15)) +
             (((s16)a.half[i - 8] >> ((b.half[i - 8] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_bu_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.bu.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_bu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.bu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (s16)a.half[i];
    } else {
      temp = ((s16)a.half[i] >> (b.half[i] & 15)) +
             (((s16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp;
    if ((b.half[i - 8] & 15) == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp = ((s16)a.half[i - 8] >> (b.half[i - 8] & 15)) +
             (((s16)a.half[i - 8] >> ((b.half[i - 8] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (s32)a.word[i];
    } else {
      temp = ((s32)a.word[i] >> (b.word[i] & 31)) +
             (((s32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp;
    if ((b.word[i - 4] & 31) == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp = ((s32)a.word[i - 4] >> (b.word[i - 4] & 31)) +
             (((s32)a.word[i - 4] >> ((b.word[i - 4] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_hu_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.hu.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_hu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.hu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (s32)a.word[i];
    } else {
      temp = ((s32)a.word[i] >> (b.word[i] & 31)) +
             (((s32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp;
    if ((b.word[i - 4] & 31) == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp = ((s32)a.word[i - 4] >> (b.word[i - 4] & 31)) +
             (((s32)a.word[i - 4] >> ((b.word[i - 4] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (s64)a.dword[i];
    } else {
      temp = ((s64)a.dword[i] >> (b.dword[i] & 63)) +
             (((s64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp;
    if ((b.dword[i - 2] & 63) == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) +
             (((s64)a.dword[i - 2] >> ((b.dword[i - 2] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarn_wu_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrarn.wu.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarn_wu_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrarn.wu.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (s64)a.dword[i];
    } else {
      temp = ((s64)a.dword[i] >> (b.dword[i] & 63)) +
             (((s64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp;
    if ((b.dword[i - 2] & 63) == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) +
             (((s64)a.dword[i - 2] >> ((b.dword[i - 2] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrarni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i];
    } else {
      temp = ((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp =
          ((s16)a.half[i - 8] >> imm) + (((s16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i - 8];
    } else {
      temp =
          ((s16)b.half[i - 8] >> imm) + (((s16)b.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 16];
    } else {
      temp = ((s16)a.half[i - 16] >> imm) +
             (((s16)a.half[i - 16] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, -128, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_bu_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrarni.bu.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_bu_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.bu.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i];
    } else {
      temp = ((s16)b.half[i] >> imm) + (((s16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 8];
    } else {
      temp =
          ((s16)a.half[i - 8] >> imm) + (((s16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    s16 temp;
    if (imm == 0) {
      temp = (s16)b.half[i - 8];
    } else {
      temp =
          ((s16)b.half[i - 8] >> imm) + (((s16)b.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  } else {
    s16 temp;
    if (imm == 0) {
      temp = (s16)a.half[i - 16];
    } else {
      temp = ((s16)a.half[i - 16] >> imm) +
             (((s16)a.half[i - 16] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<s16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrarni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i];
    } else {
      temp = ((s128)b.qword[i] >> imm) + (((s128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 1];
    } else {
      temp = ((s128)a.qword[i - 1] >> imm) +
             (((s128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i - 1];
    } else {
      temp = ((s128)b.qword[i - 1] >> imm) +
             (((s128)b.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 2];
    } else {
      temp = ((s128)a.qword[i - 2] >> imm) +
             (((s128)a.qword[i - 2] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, -9223372036854775808, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrarni_du_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrarni.du.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_du_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.du.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i];
    } else {
      temp = ((s128)b.qword[i] >> imm) + (((s128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 1];
    } else {
      temp = ((s128)a.qword[i - 1] >> imm) +
             (((s128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    s128 temp;
    if (imm == 0) {
      temp = (s128)b.qword[i - 1];
    } else {
      temp = ((s128)b.qword[i - 1] >> imm) +
             (((s128)b.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  } else {
    s128 temp;
    if (imm == 0) {
      temp = (s128)a.qword[i - 2];
    } else {
      temp = ((s128)a.qword[i - 2] >> imm) +
             (((s128)a.qword[i - 2] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<s128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrarni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrarni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i];
    } else {
      temp = ((s32)b.word[i] >> imm) + (((s32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp =
          ((s32)a.word[i - 4] >> imm) + (((s32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i - 4];
    } else {
      temp =
          ((s32)b.word[i - 4] >> imm) + (((s32)b.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 8];
    } else {
      temp =
          ((s32)a.word[i - 8] >> imm) + (((s32)a.word[i - 8] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, -32768, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_hu_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrarni.hu.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_hu_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.hu.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i];
    } else {
      temp = ((s32)b.word[i] >> imm) + (((s32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 4];
    } else {
      temp =
          ((s32)a.word[i - 4] >> imm) + (((s32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    s32 temp;
    if (imm == 0) {
      temp = (s32)b.word[i - 4];
    } else {
      temp =
          ((s32)b.word[i - 4] >> imm) + (((s32)b.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  } else {
    s32 temp;
    if (imm == 0) {
      temp = (s32)a.word[i - 8];
    } else {
      temp =
          ((s32)a.word[i - 8] >> imm) + (((s32)a.word[i - 8] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<s32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrarni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i];
    } else {
      temp = ((s64)b.dword[i] >> imm) + (((s64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> imm) +
             (((s64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i - 2];
    } else {
      temp = ((s64)b.dword[i - 2] >> imm) +
             (((s64)b.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 4];
    } else {
      temp = ((s64)a.dword[i - 4] >> imm) +
             (((s64)a.dword[i - 4] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, -2147483648, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrarni_wu_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrarni.wu.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrarni_wu_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrarni.wu.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i];
    } else {
      temp = ((s64)b.dword[i] >> imm) + (((s64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 2];
    } else {
      temp = ((s64)a.dword[i - 2] >> imm) +
             (((s64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    s64 temp;
    if (imm == 0) {
      temp = (s64)b.dword[i - 2];
    } else {
      temp = ((s64)b.dword[i - 2] >> imm) +
             (((s64)b.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  } else {
    s64 temp;
    if (imm == 0) {
      temp = (s64)a.dword[i - 4];
    } else {
      temp = ((s64)a.dword[i - 4] >> imm) +
             (((s64)a.dword[i - 4] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<s64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp = (u16)a.half[i - 8] >> (b.half[i - 8] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_bu_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.bu.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_bu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.bu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)a.half[i] >> (b.half[i] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp = (u16)a.half[i - 8] >> (b.half[i - 8] & 15);
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp = (u32)a.word[i - 4] >> (b.word[i - 4] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_hu_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.hu.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_hu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.hu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)a.word[i] >> (b.word[i] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp = (u32)a.word[i - 4] >> (b.word[i - 4] & 31);
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp = (u64)a.dword[i - 2] >> (b.dword[i - 2] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrln_wu_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrln.wu.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrln_wu_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrln.wu.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)a.dword[i] >> (b.dword[i] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp = (u64)a.dword[i - 2] >> (b.dword[i - 2] & 63);
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrlni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)b.half[i] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp = (u16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp = (u16)b.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp = (u16)a.half[i - 16] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_bu_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrlni.bu.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_bu_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.bu.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp = (u16)b.half[i] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp = (u16)a.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp = (u16)b.half[i - 8] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp = (u16)a.half[i - 16] >> imm;
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrlni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp = (u128)b.qword[i] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp = (u128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    u128 temp = (u128)b.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp = (u128)a.qword[i - 2] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrlni_du_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrlni.du.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_du_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.du.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp = (u128)b.qword[i] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp = (u128)a.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    u128 temp = (u128)b.qword[i - 1] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp = (u128)a.qword[i - 2] >> imm;
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrlni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrlni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)b.word[i] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp = (u32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp = (u32)b.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp = (u32)a.word[i - 8] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_hu_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrlni.hu.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_hu_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.hu.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp = (u32)b.word[i] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp = (u32)a.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp = (u32)b.word[i - 4] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp = (u32)a.word[i - 8] >> imm;
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrlni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)b.dword[i] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp = (u64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp = (u64)b.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp = (u64)a.dword[i - 4] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlni_wu_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrlni.wu.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlni_wu_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrlni.wu.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp = (u64)b.dword[i] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp = (u64)a.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp = (u64)b.dword[i - 2] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp = (u64)a.dword[i - 4] >> imm;
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_b_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.b.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_b_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.b.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (u16)a.half[i];
    } else {
      temp = ((u16)a.half[i] >> (b.half[i] & 15)) +
             (((u16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp;
    if ((b.half[i - 8] & 15) == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp = ((u16)a.half[i - 8] >> (b.half[i - 8] & 15)) +
             (((u16)a.half[i - 8] >> ((b.half[i - 8] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_bu_h (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.bu.h xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_bu_h (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.bu.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if ((b.half[i] & 15) == 0) {
      temp = (u16)a.half[i];
    } else {
      temp = ((u16)a.half[i] >> (b.half[i] & 15)) +
             (((u16)a.half[i] >> ((b.half[i] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp;
    if ((b.half[i - 8] & 15) == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp = ((u16)a.half[i - 8] >> (b.half[i - 8] & 15)) +
             (((u16)a.half[i - 8] >> ((b.half[i - 8] & 15) - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    dst.byte[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_h_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.h.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_h_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.h.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (u32)a.word[i];
    } else {
      temp = ((u32)a.word[i] >> (b.word[i] & 31)) +
             (((u32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp;
    if ((b.word[i - 4] & 31) == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp = ((u32)a.word[i - 4] >> (b.word[i - 4] & 31)) +
             (((u32)a.word[i - 4] >> ((b.word[i - 4] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_hu_w (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.hu.w xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_hu_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.hu.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if ((b.word[i] & 31) == 0) {
      temp = (u32)a.word[i];
    } else {
      temp = ((u32)a.word[i] >> (b.word[i] & 31)) +
             (((u32)a.word[i] >> ((b.word[i] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp;
    if ((b.word[i - 4] & 31) == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp = ((u32)a.word[i - 4] >> (b.word[i - 4] & 31)) +
             (((u32)a.word[i - 4] >> ((b.word[i - 4] & 31) - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    dst.half[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_w_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.w.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_w_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.w.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (u64)a.dword[i];
    } else {
      temp = ((u64)a.dword[i] >> (b.dword[i] & 63)) +
             (((u64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp;
    if ((b.dword[i - 2] & 63) == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) +
             (((u64)a.dword[i - 2] >> ((b.dword[i - 2] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrn_wu_d (__m256i a, __m256i b)`

**汇编指令**: `xvssrlrn.wu.d xr, xr, xr`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrn_wu_d (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvssrlrn.wu.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if ((b.dword[i] & 63) == 0) {
      temp = (u64)a.dword[i];
    } else {
      temp = ((u64)a.dword[i] >> (b.dword[i] & 63)) +
             (((u64)a.dword[i] >> ((b.dword[i] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp;
    if ((b.dword[i - 2] & 63) == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> (b.dword[i - 2] & 63)) +
             (((u64)a.dword[i - 2] >> ((b.dword[i - 2] & 63) - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    dst.word[i] = 0;
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_b_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrlrni.b.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_b_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.b.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i];
    } else {
      temp = ((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp =
          ((u16)a.half[i - 8] >> imm) + (((u16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i - 8];
    } else {
      temp =
          ((u16)b.half[i - 8] >> imm) + (((u16)b.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 16];
    } else {
      temp = ((u16)a.half[i - 16] >> imm) +
             (((u16)a.half[i - 16] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 127);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_bu_h (__m256i a, __m256i b, imm0_15 imm)`

**汇编指令**: `xvssrlrni.bu.h xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_bu_h (__m256i a, __m256i b, imm0_15 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.bu.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if (i < 8) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i];
    } else {
      temp = ((u16)b.half[i] >> imm) + (((u16)b.half[i] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 8];
    } else {
      temp =
          ((u16)a.half[i - 8] >> imm) + (((u16)a.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
for (int i = 16; i < 32; i++) {
  if (i < 24) {
    u16 temp;
    if (imm == 0) {
      temp = (u16)b.half[i - 8];
    } else {
      temp =
          ((u16)b.half[i - 8] >> imm) + (((u16)b.half[i - 8] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  } else {
    u16 temp;
    if (imm == 0) {
      temp = (u16)a.half[i - 16];
    } else {
      temp = ((u16)a.half[i - 16] >> imm) +
             (((u16)a.half[i - 16] >> (imm - 1)) & 1);
    }
    dst.byte[i] = clamp<u16>(temp, 0, 255);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_d_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrlrni.d.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.d.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i];
    } else {
      temp = ((u128)b.qword[i] >> imm) + (((u128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 1];
    } else {
      temp = ((u128)a.qword[i - 1] >> imm) +
             (((u128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i - 1];
    } else {
      temp = ((u128)b.qword[i - 1] >> imm) +
             (((u128)b.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 2];
    } else {
      temp = ((u128)a.qword[i - 2] >> imm) +
             (((u128)a.qword[i - 2] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 9223372036854775807);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrlrni_du_q (__m256i a, __m256i b, imm0_127 imm)`

**汇编指令**: `xvssrlrni.du.q xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_du_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.du.q xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 2; i++) {
  if (i < 1) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i];
    } else {
      temp = ((u128)b.qword[i] >> imm) + (((u128)b.qword[i] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 1];
    } else {
      temp = ((u128)a.qword[i - 1] >> imm) +
             (((u128)a.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
for (int i = 2; i < 4; i++) {
  if (i < 3) {
    u128 temp;
    if (imm == 0) {
      temp = (u128)b.qword[i - 1];
    } else {
      temp = ((u128)b.qword[i - 1] >> imm) +
             (((u128)b.qword[i - 1] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  } else {
    u128 temp;
    if (imm == 0) {
      temp = (u128)a.qword[i - 2];
    } else {
      temp = ((u128)a.qword[i - 2] >> imm) +
             (((u128)a.qword[i - 2] >> (imm - 1)) & 1);
    }
    dst.dword[i] = clamp<u128>(temp, 0, 18446744073709551615);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 3 | 2 |
| 3A6000 | LA664 | 3 | 2 |
| 3C6000 | LA664 | 3 | 2 |

---

### `__m256i __lasx_xvssrlrni_h_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrlrni.h.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_h_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.h.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i];
    } else {
      temp = ((u32)b.word[i] >> imm) + (((u32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp =
          ((u32)a.word[i - 4] >> imm) + (((u32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i - 4];
    } else {
      temp =
          ((u32)b.word[i - 4] >> imm) + (((u32)b.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 8];
    } else {
      temp =
          ((u32)a.word[i - 8] >> imm) + (((u32)a.word[i - 8] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 32767);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_hu_w (__m256i a, __m256i b, imm0_31 imm)`

**汇编指令**: `xvssrlrni.hu.w xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_hu_w (__m256i a, __m256i b, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.hu.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if (i < 4) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i];
    } else {
      temp = ((u32)b.word[i] >> imm) + (((u32)b.word[i] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 4];
    } else {
      temp =
          ((u32)a.word[i - 4] >> imm) + (((u32)a.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
for (int i = 8; i < 16; i++) {
  if (i < 12) {
    u32 temp;
    if (imm == 0) {
      temp = (u32)b.word[i - 4];
    } else {
      temp =
          ((u32)b.word[i - 4] >> imm) + (((u32)b.word[i - 4] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  } else {
    u32 temp;
    if (imm == 0) {
      temp = (u32)a.word[i - 8];
    } else {
      temp =
          ((u32)a.word[i - 8] >> imm) + (((u32)a.word[i - 8] >> (imm - 1)) & 1);
    }
    dst.half[i] = clamp<u32>(temp, 0, 65535);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_w_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrlrni.w.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_w_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.w.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i];
    } else {
      temp = ((u64)b.dword[i] >> imm) + (((u64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> imm) +
             (((u64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i - 2];
    } else {
      temp = ((u64)b.dword[i - 2] >> imm) +
             (((u64)b.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 4];
    } else {
      temp = ((u64)a.dword[i - 4] >> imm) +
             (((u64)a.dword[i - 4] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 2147483647);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvssrlrni_wu_d (__m256i a, __m256i b, imm0_63 imm)`

**汇编指令**: `xvssrlrni.wu.d xr, xr, imm`  
**分类**: `Shift`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvssrlrni_wu_d (__m256i a, __m256i b, imm0_63 imm)
#include <lasxintrin.h>
Instruction: xvssrlrni.wu.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if (i < 2) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i];
    } else {
      temp = ((u64)b.dword[i] >> imm) + (((u64)b.dword[i] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 2];
    } else {
      temp = ((u64)a.dword[i - 2] >> imm) +
             (((u64)a.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
for (int i = 4; i < 8; i++) {
  if (i < 6) {
    u64 temp;
    if (imm == 0) {
      temp = (u64)b.dword[i - 2];
    } else {
      temp = ((u64)b.dword[i - 2] >> imm) +
             (((u64)b.dword[i - 2] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  } else {
    u64 temp;
    if (imm == 0) {
      temp = (u64)a.dword[i - 4];
    } else {
      temp = ((u64)a.dword[i - 4] >> imm) +
             (((u64)a.dword[i - 4] >> (imm - 1)) & 1);
    }
    dst.word[i] = clamp<u64>(temp, 0, 4294967295);
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 4 | 1 |
| 3A6000 | LA664 | 4 | 2 |
| 3C6000 | LA664 | 4 | 2 |

---

## Shuffling

### `__m256i __lasx_xvshuf4i_b (__m256i a, imm0_255 imm)`

**汇编指令**: `xvshuf4i.b xr, xr, imm`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf4i_b (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvshuf4i.b xr, xr, imm
CPU Flags: LASX
```

#### Description

Shuffle every four 8-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/xvshuf4i_b.svg)

#### Examples

```c++
__m256i __lasx_xvshuf4i_b( __m256i{ 0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0x13ef13cd78667815 0x3412343421432121 0x3412343421432121 0x7856787878567878
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  dst.byte[i] = a.byte[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.byte[0] = a.byte[0 + ((imm >> 0) & 0x3)];
  dst.byte[1] = a.byte[0 + ((imm >> 2) & 0x3)];
  dst.byte[2] = a.byte[0 + ((imm >> 4) & 0x3)];
  dst.byte[3] = a.byte[0 + ((imm >> 6) & 0x3)];
  dst.byte[4] = a.byte[4 + ((imm >> 0) & 0x3)];
  dst.byte[5] = a.byte[4 + ((imm >> 2) & 0x3)];
  dst.byte[6] = a.byte[4 + ((imm >> 4) & 0x3)];
  dst.byte[7] = a.byte[4 + ((imm >> 6) & 0x3)];
  dst.byte[8] = a.byte[8 + ((imm >> 0) & 0x3)];
  dst.byte[9] = a.byte[8 + ((imm >> 2) & 0x3)];
  dst.byte[10] = a.byte[8 + ((imm >> 4) & 0x3)];
  dst.byte[11] = a.byte[8 + ((imm >> 6) & 0x3)];
  dst.byte[12] = a.byte[12 + ((imm >> 0) & 0x3)];
  dst.byte[13] = a.byte[12 + ((imm >> 2) & 0x3)];
  dst.byte[14] = a.byte[12 + ((imm >> 4) & 0x3)];
  dst.byte[15] = a.byte[12 + ((imm >> 6) & 0x3)];
  dst.byte[16] = a.byte[16 + ((imm >> 0) & 0x3)];
  dst.byte[17] = a.byte[16 + ((imm >> 2) & 0x3)];
  dst.byte[18] = a.byte[16 + ((imm >> 4) & 0x3)];
  dst.byte[19] = a.byte[16 + ((imm >> 6) & 0x3)];
  dst.byte[20] = a.byte[20 + ((imm >> 0) & 0x3)];
  dst.byte[21] = a.byte[20 + ((imm >> 2) & 0x3)];
  dst.byte[22] = a.byte[20 + ((imm >> 4) & 0x3)];
  dst.byte[23] = a.byte[20 + ((imm >> 6) & 0x3)];
  dst.byte[24] = a.byte[24 + ((imm >> 0) & 0x3)];
  dst.byte[25] = a.byte[24 + ((imm >> 2) & 0x3)];
  dst.byte[26] = a.byte[24 + ((imm >> 4) & 0x3)];
  dst.byte[27] = a.byte[24 + ((imm >> 6) & 0x3)];
  dst.byte[28] = a.byte[28 + ((imm >> 0) & 0x3)];
  dst.byte[29] = a.byte[28 + ((imm >> 2) & 0x3)];
  dst.byte[30] = a.byte[28 + ((imm >> 4) & 0x3)];
  dst.byte[31] = a.byte[28 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvshuf4i_d (__m256i a, __m256i b, imm0_255 imm)`

**汇编指令**: `xvshuf4i.d xr, xr, imm`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf4i_d (__m256i a, __m256i b, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvshuf4i.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Shuffle every four 64-bit elements in `a` and `b` with indices packed in `imm`, save the result to `dst`.

![](../diagram/xvshuf4i_d.svg)

#### Examples

```c++
__m256i __lasx_xvshuf4i_d( __m256i{ 0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{ 0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0xabcdef1314156678 0x1122334455667788 0x1234123443214321 0xabcdef1212341234
```

#### Operation

```c++
dst.dword[0] = (imm & 2) ? b.dword[(imm & 1)] : a.dword[(imm & 1)];
dst.dword[1] =
    (imm & 8) ? b.dword[((imm >> 2) & 1)] : a.dword[((imm >> 2) & 1)];
dst.dword[2] = (imm & 2) ? b.dword[(imm & 1) + 2] : a.dword[(imm & 1) + 2];
dst.dword[3] =
    (imm & 8) ? b.dword[((imm >> 2) & 1) + 2] : a.dword[((imm >> 2) & 1) + 2];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvshuf4i_h (__m256i a, imm0_255 imm)`

**汇编指令**: `xvshuf4i.h xr, xr, imm`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf4i_h (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvshuf4i.h xr, xr, imm
CPU Flags: LASX
```

#### Description

Shuffle every four 16-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/xvshuf4i_h.svg)

#### Examples

```c++
__m256i __lasx_xvshuf4i_h( __m256i{ 0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0x667814156678ef13 0x4321432143211234 0x4321432143211234 0x5678567856785678
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  dst.half[i] = a.half[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.half[0] = a.half[0 + ((imm >> 0) & 0x3)];
  dst.half[1] = a.half[0 + ((imm >> 2) & 0x3)];
  dst.half[2] = a.half[0 + ((imm >> 4) & 0x3)];
  dst.half[3] = a.half[0 + ((imm >> 6) & 0x3)];
  dst.half[4] = a.half[4 + ((imm >> 0) & 0x3)];
  dst.half[5] = a.half[4 + ((imm >> 2) & 0x3)];
  dst.half[6] = a.half[4 + ((imm >> 4) & 0x3)];
  dst.half[7] = a.half[4 + ((imm >> 6) & 0x3)];
  dst.half[8] = a.half[8 + ((imm >> 0) & 0x3)];
  dst.half[9] = a.half[8 + ((imm >> 2) & 0x3)];
  dst.half[10] = a.half[8 + ((imm >> 4) & 0x3)];
  dst.half[11] = a.half[8 + ((imm >> 6) & 0x3)];
  dst.half[12] = a.half[12 + ((imm >> 0) & 0x3)];
  dst.half[13] = a.half[12 + ((imm >> 2) & 0x3)];
  dst.half[14] = a.half[12 + ((imm >> 4) & 0x3)];
  dst.half[15] = a.half[12 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvshuf4i_w (__m256i a, imm0_255 imm)`

**汇编指令**: `xvshuf4i.w xr, xr, imm`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf4i_w (__m256i a, imm0_255 imm)
#include <lasxintrin.h>
Instruction: xvshuf4i.w xr, xr, imm
CPU Flags: LASX
```

#### Description

Shuffle every four 32-bit elements in `a` with indices packed in `imm`, save the result to `dst`.

![](../diagram/xvshuf4i_w.svg)

#### Examples

```c++
__m256i __lasx_xvshuf4i_w( __m256i{ 0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, 0x12)
= 0x1415667843214321 0x14156678abcdef13 0x4321432156785678 0x4321432112341234
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.word[i] = a.word[(i & ~0x3) + ((imm >> (2 * (i & 0x3))) & 0x3)];
}

// Expands to:

if (0) {
  dst.word[0] = a.word[0 + ((imm >> 0) & 0x3)];
  dst.word[1] = a.word[0 + ((imm >> 2) & 0x3)];
  dst.word[2] = a.word[0 + ((imm >> 4) & 0x3)];
  dst.word[3] = a.word[0 + ((imm >> 6) & 0x3)];
  dst.word[4] = a.word[4 + ((imm >> 0) & 0x3)];
  dst.word[5] = a.word[4 + ((imm >> 2) & 0x3)];
  dst.word[6] = a.word[4 + ((imm >> 4) & 0x3)];
  dst.word[7] = a.word[4 + ((imm >> 6) & 0x3)];
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 4 |
| 3C6000 | LA664 | 1 | 4 |

---

### `__m256i __lasx_xvshuf_b (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvshuf.b xr, xr, xr, xr`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf_b (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvshuf.b xr, xr, xr, xr
CPU Flags: LASX
```

#### Description

Shuffle bytes from `a` and `b` with indices from `c`.

Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics, they are placed in `a`.


![](../diagram/xvshuf_b.svg)

#### Examples

```c++
__m256i __lasx_xvshuf_b(__m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678}, __m256i{0x1f1f00001a0a1b0b, 0x1111120213031404, 0x0102030405060708, 0x1112131405060708})
= 0x99997878ee21dd43 0x7777661555144413 0x4321433412341278 0x1234121212341278
```

#### Operation

```c++
for (int i = 0; i < 32; i++) {
  if ((c.byte[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.byte[i] = 0;
  } else if ((c.byte[i] % 32) < 16) {
    dst.byte[i] = b.byte[(c.byte[i] % 32) + ((i >= 16) ? 16 : 0)];
  } else {
    dst.byte[i] = a.byte[(c.byte[i] % 32) + ((i >= 16) ? 0 : -16)];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvshuf_d (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvshuf.d xr, xr, xr`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvshuf.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Shuffle 64-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/xvshuf_d.svg)

#### Examples

```c++
__m256i __lasx_xvshuf_d(__m256i{0x0000000000000000, 0x0000000000000003, 0x0000000000000002, 0x0000000000000001}, __m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0xabcdef1314156678 0x99aabbccddeeff00 0xabcdef1212341234 0x5678567856785678
```

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  if ((a.dword[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.dword[i] = 0;
  } else if ((a.dword[i] % 4) < 2) {
    dst.dword[i] = c.dword[(a.dword[i] % 4) + ((i >= 2) ? 2 : 0)];
  } else {
    dst.dword[i] = b.dword[(a.dword[i] % 4) + ((i >= 2) ? 0 : -2)];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvshuf_h (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvshuf.h xr, xr, xr`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf_h (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvshuf.h xr, xr, xr
CPU Flags: LASX
```

#### Description

Shuffle 16-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/xvshuf_h.svg)

#### Examples

```c++
__m256i __lasx_xvshuf_h(__m256i{0x0001000200030004, 0x0005000a000b000c, 0x000f000e00010002, 0x0008000900020001}, __m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x1415ef13abcd4321 0x432133441122ff00 0xaabbaabb43211234 0x1234123412344321
```

#### Operation

```c++
for (int i = 0; i < 16; i++) {
  if ((a.half[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.half[i] = 0;
  } else if ((a.half[i] % 16) < 8) {
    dst.half[i] = c.half[(a.half[i] % 16) + ((i >= 8) ? 8 : 0)];
  } else {
    dst.half[i] = b.half[(a.half[i] % 16) + ((i >= 8) ? 0 : -8)];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

### `__m256i __lasx_xvshuf_w (__m256i a, __m256i b, __m256i c)`

**汇编指令**: `xvshuf.w xr, xr, xr`  
**分类**: `Shuffling`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvshuf_w (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvshuf.w xr, xr, xr
CPU Flags: LASX
```

#### Description

Shuffle 32-bit elements in `b` and `c` with indices from `a`, save the result to `dst`.

![](../diagram/xvshuf_w.svg)

#### Examples

```c++
__m256i __lasx_xvshuf_w(__m256i{0x0000000200000004, 0x0000000700000005, 0x0000000100000003, 0x0000000400000000}, __m256i{0x1122334455667788, 0x99aabbccddeeff00, 0xabcdef1212341234, 0xaabbaabbddeeddee}, __m256i{0xabcdef1314156678, 0x1234123443214321, 0x1234123443214321, 0x5678567856785678})
= 0x4321432155667788 0x99aabbcc11223344 0x1234123456785678 0x1234123443214321
```

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  if ((a.word[i] % 256) >= 64 && (UARCH_LA264 || UARCH_LA464)) {
    // Caveat: observed in LA264 and LA464
    dst.word[i] = 0;
  } else if ((a.word[i] % 8) < 4) {
    dst.word[i] = c.word[(a.word[i] % 8) + ((i >= 4) ? 4 : 0)];
  } else {
    dst.word[i] = b.word[(a.word[i] % 8) + ((i >= 4) ? 0 : -4)];
  }
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 2 |
| 3A6000 | LA664 | 1 | 2 |
| 3C6000 | LA664 | 1 | 2 |

---

## Undocumented Intrinsics

### `__m256 __lasx_xvfscaleb_s (__m256 a, __m256i b)`

**汇编指令**: `xvfscaleb.s xr, xr, xr`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256 __lasx_xvfscaleb_s (__m256 a, __m256i b)
#include <lasxintrin.h>
Instruction: xvfscaleb.s xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute IEEE754 scaleB of single precision floating point elements in `a` by integer elements in `b`. Currently undocumented.

#### Operation

```c++
for (int i = 0; i < 8; i++) {
  dst.fp32[i] = __builtin_scalbn(a.fp32[i], b.word[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256d __lasx_xvfscaleb_d (__m256d a, __m256i b)`

**汇编指令**: `xvfscaleb.d xr, xr, xr`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256d __lasx_xvfscaleb_d (__m256d a, __m256i b)
#include <lasxintrin.h>
Instruction: xvfscaleb.d xr, xr, xr
CPU Flags: LASX
```

#### Description

Compute IEEE754 scaleB of double precision floating point elements in `a` by integer elements in `b`. Currently undocumented.

#### Operation

```c++
for (int i = 0; i < 4; i++) {
  dst.fp64[i] = __builtin_scalbn(a.fp64[i], b.dword[i]);
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | 4 | 2 |

---

### `__m256i __lasx_xvhseli_d (__m256i a, imm0_31 imm)`

**汇编指令**: `xvhseli.d xr, xr, imm`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvhseli_d (__m256i a, imm0_31 imm)
#include <lasxintrin.h>
Instruction: xvhseli.d xr, xr, imm
CPU Flags: LASX
```

#### Description

Select double words from `a` with indices recorded in `imm` and store into `dst`.

![](../diagram/xvhseli_d.svg)

#### Operation

```c++
dst.dword[0] = (imm & 1) ? a.dword[1] : a.dword[0];
dst.dword[1] = (imm & 2) ? a.dword[1] : a.dword[0];
dst.dword[2] = (imm & 4) ? a.dword[3] : a.dword[2];
dst.dword[3] = (imm & 8) ? a.dword[3] : a.dword[2];
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |

---

### `__m256i __lasx_xvmepatmsk_v (int mode, int uimm5)`

**汇编指令**: `xvmepatmsk.v xr, mode, uimm5`  
**分类**: `Undocumented Intrinsics`  
**扩展**: `LASX`  
**CPU Flags**: `LASX`

#### Synopsis

```c++
__m256i __lasx_xvmepatmsk_v (int mode, int uimm5)
#include <lasxintrin.h>
Instruction: xvmepatmsk.v xr, mode, uimm5
CPU Flags: LASX
```

#### Description

Compute pattern according to `mode`, then add `uimm5` to each element.

#### Examples

```c++
__m256i __lasx_xvmepatmsk_v(3, 1)
= 0x0807060504030201 0x100f0e0d0c0b0a09 0x0807060504030201 0x100f0e0d0c0b0a09
```

#### Operation

```c++
if (mode == 0b00) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i + 16] = dst.byte[i] =
        uimm5 + (i % 4); // [0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3]
  }
} else if (mode == 0b01) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i + 16] = dst.byte[i] =
        uimm5 + (i / 4) + (i % 4); // [0 1 2 3 1 2 3 4 2 3 4 5 3 4 5 6]
  }
} else if (mode == 0b10) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i + 16] = dst.byte[i] =
        uimm5 + (i / 4) + (i % 4) + 4; // [4 5 6 7 5 6 7 8 6 7 8 9 7 8 9 10]
  }
} else if (mode == 0b11) {
  for (int i = 0; i < 16; i++) {
    dst.byte[i + 16] = dst.byte[i] =
        uimm5 + i; // [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
  }
} else {
  // illegal instruction
}
```

Tested on real machine.

#### Latency and Throughput

| CPU | µarch | Latency | Throughput (IPC) |
|-----|-------|---------|------------------|
| 3C6000 | LA664 | N/A | 4 |

---