# LoongArch LSX/LASX 向量指令参考手册 > 本文档由 `generate_lsx_lasx_docs.py` 从 `lsx_lasx.json` 自动生成 ## 概述 LoongArch 架构提供两种向量扩展： | 扩展 | 位宽 | 类型 | 寄存器 | 条目数 | 性能覆盖 | |------|------|------|--------|--------|----------| | **LSX** | 128-bit | `__m128`, `__m128i`, `__m128d` | vr0-vr31 | 723 | 702 | | **LASX** | 256-bit | `__m256`, `__m256i`, `__m256d` | xr0-xr31 | 744 | 723 | ### 数据类型对应 | C 类型 | LSX | LASX | 说明 | |--------|-----|------|------| | 8-bit 整数 | `__m128i` (16个) | `__m256i` (32个) | int8_t / uint8_t | | 16-bit 整数 | `__m128i` (8个) | `__m256i` (16个) | int16_t / uint16_t | | 32-bit 整数 | `__m128i` (4个) | `__m256i` (8个) | int32_t / uint32_t | | 64-bit 整数 | `__m128i` (2个) | `__m256i` (4个) | int64_t / uint64_t | | 单精度浮点 | `__m128` (4个) | `__m256` (8个) | float | | 双精度浮点 | `__m128d` (2个) | `__m256d` (4个) | double | ### 统计 - 总条目数: 1467 - 带延迟/IPC 的条目: 1425 - 缺少性能数据的条目: 42 ### 分类统计 | 分类 | 数量 | |------|------| | Integer Computation | 476 | | Shift | 280 | | Misc | 195 | | Floating Point Comparison | 88 | | Floating Point Conversion | 84 | | Integer Comparison | 80 | | Bitwise Operations | 76 | | Floating Point Computation | 56 | | Floating Point Misc | 24 | | Memory Load & Store | 24 | | Branch | 20 | | Logical | 20 | | Fused Multiply-Add | 16 | | Shuffling | 16 | | Undocumented Intrinsics | 7 | | Permutation | 5 | --- # LSX 速查表 ## Bitwise Operations | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vbitclr_b (__m128i a, __m128i b) | `vbitclr.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclr_d (__m128i a, __m128i b) | `vbitclr.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclr_h (__m128i a, __m128i b) | `vbitclr.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclr_w (__m128i a, __m128i b) | `vbitclr.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm) | `vbitclri.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm) | `vbitclri.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm) | `vbitclri.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm) | `vbitclri.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clear the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrev_b (__m128i a, __m128i b) | `vbitrev.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrev_d (__m128i a, __m128i b) | `vbitrev.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrev_h (__m128i a, __m128i b) | `vbitrev.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrev_w (__m128i a, __m128i b) | `vbitrev.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm) | `vbitrevi.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm) | `vbitrevi.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm) | `vbitrevi.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm) | `vbitrevi.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Toggle the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c) | `vbitsel.v vr, vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise selection: for each bit position, if the bit in `c` equals to one, copy the bit from `b` to `dst`, otherwise copy from `a`. | | __m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm) | `vbitseli.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise selection: for each bit position, if the bit in `a` equals to one, copy the bit from `imm` to `dst`, otherwise copy from `b`. | | __m128i __lsx_vbitset_b (__m128i a, __m128i b) | `vbitset.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitset_d (__m128i a, __m128i b) | `vbitset.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitset_h (__m128i a, __m128i b) | `vbitset.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitset_w (__m128i a, __m128i b) | `vbitset.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm) | `vbitseti.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm) | `vbitseti.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm) | `vbitseti.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm) | `vbitseti.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Set the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m128i __lsx_vclo_b (__m128i a) | `vclo.b vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading ones of 8-bit elements in `a`. | | __m128i __lsx_vclo_d (__m128i a) | `vclo.d vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading ones of 64-bit elements in `a`. | | __m128i __lsx_vclo_h (__m128i a) | `vclo.h vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading ones of 16-bit elements in `a`. | | __m128i __lsx_vclo_w (__m128i a) | `vclo.w vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading ones of 32-bit elements in `a`. | | __m128i __lsx_vclz_b (__m128i a) | `vclz.b vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading zeros of 8-bit elements in `a`. | | __m128i __lsx_vclz_d (__m128i a) | `vclz.d vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading zeros of 64-bit elements in `a`. | | __m128i __lsx_vclz_h (__m128i a) | `vclz.h vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading zeros of 16-bit elements in `a`. | | __m128i __lsx_vclz_w (__m128i a) | `vclz.w vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Count leading zeros of 32-bit elements in `a`. | | __m128i __lsx_vpcnt_b (__m128i a) | `vpcnt.b vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Count the number of ones (population, popcount) in 8-bit elements in `a`. | | __m128i __lsx_vpcnt_d (__m128i a) | `vpcnt.d vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Count the number of ones (population, popcount) in 64-bit elements in `a`. | | __m128i __lsx_vpcnt_h (__m128i a) | `vpcnt.h vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Count the number of ones (population, popcount) in 16-bit elements in `a`. | | __m128i __lsx_vpcnt_w (__m128i a) | `vpcnt.w vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Count the number of ones (population, popcount) in 32-bit elements in `a`. | --- ## Branch | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | int __lsx_bnz_b (__m128i a) | `vsetallnez.b fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if all 8-bit elements in `a` are non-zero. | | int __lsx_bnz_d (__m128i a) | `vsetallnez.d fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if all 64-bit elements in `a` are non-zero. | | int __lsx_bnz_h (__m128i a) | `vsetallnez.h fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if all 16-bit elements in `a` are non-zero. | | int __lsx_bnz_v (__m128i a) | `vsetnez.v fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if the whole vector `a` is non-zero. | | int __lsx_bnz_w (__m128i a) | `vsetallnez.w fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if all 32-bit elements in `a` are non-zero. | | int __lsx_bz_b (__m128i a) | `vsetanyeqz.b fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if any 8-bit element in `a` equals to zero. | | int __lsx_bz_d (__m128i a) | `vsetanyeqz.d fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if any 64-bit element in `a` equals to zero. | | int __lsx_bz_h (__m128i a) | `vsetanyeqz.h fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if any 16-bit element in `a` equals to zero. | | int __lsx_bz_v (__m128i a) | `vseteqz.v fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if the whole vector `a` equals to zero. | | int __lsx_bz_w (__m128i a) | `vsetanyeqz.w fcc, vr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Expected to be used in branches: branch if any 32-bit element in `a` equals to zero. | --- ## Floating Point Comparison | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b) | `vfcmp.caf.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b) | `vfcmp.caf.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b) | `vfcmp.ceq.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b) | `vfcmp.ceq.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b) | `vfcmp.cle.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b) | `vfcmp.cle.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b) | `vfcmp.clt.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b) | `vfcmp.clt.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b) | `vfcmp.cne.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b) | `vfcmp.cne.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b) | `vfcmp.cor.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b) | `vfcmp.cor.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b) | `vfcmp.cueq.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b) | `vfcmp.cueq.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b) | `vfcmp.cule.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b) | `vfcmp.cule.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b) | `vfcmp.cult.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b) | `vfcmp.cult.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b) | `vfcmp.cun.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b) | `vfcmp.cun.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b) | `vfcmp.cune.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b) | `vfcmp.cune.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b) | `vfcmp.saf.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b) | `vfcmp.saf.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b) | `vfcmp.seq.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b) | `vfcmp.seq.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b) | `vfcmp.sle.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b) | `vfcmp.sle.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b) | `vfcmp.slt.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b) | `vfcmp.slt.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b) | `vfcmp.sne.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b) | `vfcmp.sne.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b) | `vfcmp.sor.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b) | `vfcmp.sor.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b) | `vfcmp.sueq.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b) | `vfcmp.sueq.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b) | `vfcmp.sule.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b) | `vfcmp.sule.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b) | `vfcmp.sult.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b) | `vfcmp.sult.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b) | `vfcmp.sun.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b) | `vfcmp.sun.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b) | `vfcmp.sune.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b) | `vfcmp.sune.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | --- ## Floating Point Computation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128 __lsx_vfadd_s (__m128 a, __m128 b) | `vfadd.s vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Add single precision floating point elements in `a` to elements in `b`. | | __m128 __lsx_vfdiv_s (__m128 a, __m128 b) | `vfdiv.s vr, vr, vr` | 3C5000/LA464: L=11, 19.5, IPC=0.13(1/7.5); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5); 2K1000LA/LA264: L=12, 28, IPC=0.04(1/28); 2K3000/LA364E: L=12, 28, IPC=0.04(1/28) | Divide single precision floating point elements in `a` by elements in `b`. | | __m128 __lsx_vflogb_s (__m128 a) | `vflogb.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute 2-based logarithm of single precision floating point elements in `a`. | | __m128 __lsx_vfmax_s (__m128 a, __m128 b) | `vfmax.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute maximum of single precision floating point elements in `a` and `b`. | | __m128 __lsx_vfmaxa_s (__m128 a, __m128 b) | `vfmaxa.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute maximum of single precision floating point elements in `a` and `b` by magnitude. | | __m128 __lsx_vfmin_s (__m128 a, __m128 b) | `vfmin.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute minimum of single precision floating point elements in `a` and `b`. | | __m128 __lsx_vfmina_s (__m128 a, __m128 b) | `vfmina.s vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute minimum of single precision floating point elements in `a` and `b` by magnitude. | | __m128 __lsx_vfmul_s (__m128 a, __m128 b) | `vfmul.s vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply single precision floating point elements in `a` and elements in `b`. | | __m128 __lsx_vfrecip_s (__m128 a) | `vfrecip.s vr, vr` | 3C5000/LA464: L=27, IPC=0.14(1/7); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=27, IPC=0.12(1/8.5); 2K1000LA/LA264: L=28, IPC=0.04(1/28); 2K3000/LA364E: L=28, IPC=0.04(1/28) | Compute reciprocal of single precision floating point elements in `a`. | | __m128 __lsx_vfrecipe_s (__m128 a) | `vfrecipe.s vr, vr` | 未提供 | Compute estimated reciprocal of single precision floating point elements in `a`. | | __m128 __lsx_vfrsqrt_s (__m128 a) | `vfrsqrt.s vr, vr` | 3C5000/LA464: L=21, IPC=0.11(1/9); 3A6000/LA664: L=17, IPC=0.05(1/19); 3C6000/LA664: L=21, IPC=0.11(1/9.5); 2K1000LA/LA264: L=26, IPC=0(1/62); 2K3000/LA364E: L=26, IPC=0(1/62) | Compute reciprocal of square root of single precision floating point elements in `a`. | | __m128 __lsx_vfrsqrte_s (__m128 a) | `vfrsqrte.s vr, vr` | 未提供 | Compute estimated reciprocal of square root of single precision floating point elements in `a`. | | __m128 __lsx_vfsqrt_s (__m128 a) | `vfsqrt.s vr, vr` | 3C5000/LA464: L=27, IPC=0.17(1/6); 3A6000/LA664: L=11, IPC=0.08(1/12); 3C6000/LA664: L=25, IPC=0.09(1/11.5); 2K1000LA/LA264: L=16, IPC=0.03(1/40); 2K3000/LA364E: L=28, IPC=0.03(1/40) | Compute square root of single precision floating point elements in `a`. | | __m128 __lsx_vfsub_s (__m128 a, __m128 b) | `vfsub.s vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Subtract single precision floating point elements in `a` by elements in `b`. | | __m128d __lsx_vfadd_d (__m128d a, __m128d b) | `vfadd.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Add double precision floating point elements in `a` to elements in `b`. | | __m128d __lsx_vfdiv_d (__m128d a, __m128d b) | `vfdiv.d vr, vr, vr` | 3C5000/LA464: L=8, 16.5, IPC=0.08(1/12.5); 3A6000/LA664: L=8, 21.5, IPC=0.25(1/4); 3C6000/LA664: L=8, 16.5, IPC=0.33(1/3); 2K1000LA/LA264: L=9, 24, IPC=0.04(1/24); 2K3000/LA364E: L=9, 24, IPC=0.04(1/24) | Divide double precision floating point elements in `a` by elements in `b`. | | __m128d __lsx_vflogb_d (__m128d a) | `vflogb.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute 2-based logarithm of double precision floating point elements in `a`. | | __m128d __lsx_vfmax_d (__m128d a, __m128d b) | `vfmax.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute maximum of double precision floating point elements in `a` and `b`. | | __m128d __lsx_vfmaxa_d (__m128d a, __m128d b) | `vfmaxa.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute maximum of double precision floating point elements in `a` and `b` by magnitude. | | __m128d __lsx_vfmin_d (__m128d a, __m128d b) | `vfmin.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute minimum of double precision floating point elements in `a` and `b`. | | __m128d __lsx_vfmina_d (__m128d a, __m128d b) | `vfmina.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute minimum of double precision floating point elements in `a` and `b` by magnitude. | | __m128d __lsx_vfmul_d (__m128d a, __m128d b) | `vfmul.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply double precision floating point elements in `a` and elements in `b`. | | __m128d __lsx_vfrecip_d (__m128d a) | `vfrecip.d vr, vr` | 3C5000/LA464: L=23, IPC=0.08(1/12); 3A6000/LA664: L=8, IPC=0.25(1/4); 3C6000/LA664: L=23, IPC=0.1(1/10.5); 2K1000LA/LA264: L=24, IPC=0.04(1/24); 2K3000/LA364E: L=24, IPC=0.04(1/24) | Compute reciprocal of double precision floating point elements in `a`. | | __m128d __lsx_vfrecipe_d (__m128d a) | `vfrecipe.d vr, vr` | 未提供 | Compute estimated reciprocal of double precision floating point elements in `a`. | | __m128d __lsx_vfrsqrt_d (__m128d a) | `vfrsqrt.d vr, vr` | 3C5000/LA464: L=15, IPC=0.04(1/27.5); 3A6000/LA664: L=15, IPC=0.04(1/26.5); 3C6000/LA664: L=15, IPC=0.04(1/26); 2K1000LA/LA264: L=16, IPC=0(1/55); 2K3000/LA364E: L=16, IPC=0(1/55) | Compute reciprocal of square root of double precision floating point elements in `a`. | | __m128d __lsx_vfrsqrte_d (__m128d a) | `vfrsqrte.d vr, vr` | 未提供 | Compute estimated reciprocal of square root of double precision floating point elements in `a`. | | __m128d __lsx_vfsqrt_d (__m128d a) | `vfsqrt.d vr, vr` | 3C5000/LA464: L=36, IPC=0.05(1/18.5); 3A6000/LA664: L=36, IPC=0.06(1/17.5); 3C6000/LA664: L=36, IPC=0.06(1/17); 2K1000LA/LA264: L=11, IPC=0.03(1/37); 2K3000/LA364E: L=11, IPC=0.03(1/37) | Compute square root of double precision floating point elements in `a`. | | __m128d __lsx_vfsub_d (__m128d a, __m128d b) | `vfsub.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Subtract double precision floating point elements in `a` by elements in `b`. | --- ## Floating Point Conversion | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128 __lsx_vfcvt_s_d (__m128d a, __m128d b) | `vfcvt.s.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert double precision floating point elements in `a` and `b` to single precision. | | __m128 __lsx_vfcvth_s_h (__m128i a) | `vfcvth.s.h vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert half precision floating point elements in higher half of `a` to single precision. | | __m128 __lsx_vfcvtl_s_h (__m128i a) | `vfcvtl.s.h vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert half precision floating point elements in lower half of `a` to single precision. | | __m128 __lsx_vffint_s_l (__m128i a, __m128i b) | `vffint.s.l vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert 64-bit integer elements in `a` and `b` to single-precision floating point numbers. | | __m128 __lsx_vffint_s_w (__m128i a) | `vffint.s.w vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert signed 32-bit integer elements in `a` to single-precision floating point numbers. | | __m128 __lsx_vffint_s_wu (__m128i a) | `vffint.s.wu vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert unsigned 32-bit integer elements in `a` to single-precision floating point numbers. | | __m128d __lsx_vfcvth_d_s (__m128 a) | `vfcvth.d.s vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert single precision floating point elements in higher half of `a` to double precision. | | __m128d __lsx_vfcvtl_d_s (__m128 a) | `vfcvtl.d.s vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert single precision floating point elements in lower half of `a` to double precision. | | __m128d __lsx_vffint_d_l (__m128i a) | `vffint.d.l vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert signed 64-bit integer elements in `a` to double-precision floating point numbers. | | __m128d __lsx_vffint_d_lu (__m128i a) | `vffint.d.lu vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert unsigned 64-bit integer elements in `a` to double-precision floating point numbers. | | __m128d __lsx_vffinth_d_w (__m128i a) | `vffinth.d.w vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert 32-bit integer elements in higher part of `a` to double precision floating point numbers. | | __m128d __lsx_vffintl_d_w (__m128i a) | `vffintl.d.w vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert 32-bit integer elements in lower part of `a` to double precision floating point numbers. | | __m128i __lsx_vfcvt_h_s (__m128 a, __m128 b) | `vfcvt.h.s vr, vr, vr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Convert single precision floating point elements in `a` and `b` to half precision. | | __m128i __lsx_vftint_l_d (__m128d a) | `vftint.l.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to signed 64-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftint_lu_d (__m128d a) | `vftint.lu.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to unsigned 64-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftint_w_d (__m128d a, __m128d b) | `vftint.w.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftint_w_s (__m128 a) | `vftint.w.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to signed 32-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftint_wu_s (__m128 a) | `vftint.wu.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to unsigned 32-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftinth_l_s (__m128 a) | `vftinth.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftintl_l_s (__m128 a) | `vftintl.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, using current rounding mode specified in `fscr`. | | __m128i __lsx_vftintrm_l_d (__m128d a) | `vftintrm.l.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards negative infinity. | | __m128i __lsx_vftintrm_w_d (__m128d a, __m128d b) | `vftintrm.w.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards negative infinity. | | __m128i __lsx_vftintrm_w_s (__m128 a) | `vftintrm.w.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards negative infinity. | | __m128i __lsx_vftintrmh_l_s (__m128 a) | `vftintrmh.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards negative infinity. | | __m128i __lsx_vftintrml_l_s (__m128 a) | `vftintrml.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards negative infinity. | | __m128i __lsx_vftintrne_l_d (__m128d a) | `vftintrne.l.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards nearest even. | | __m128i __lsx_vftintrne_w_d (__m128d a, __m128d b) | `vftintrne.w.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards nearest even. | | __m128i __lsx_vftintrne_w_s (__m128 a) | `vftintrne.w.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards nearest even. | | __m128i __lsx_vftintrneh_l_s (__m128 a) | `vftintrneh.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards nearest even. | | __m128i __lsx_vftintrnel_l_s (__m128 a) | `vftintrnel.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards nearest even. | | __m128i __lsx_vftintrp_l_d (__m128d a) | `vftintrp.l.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards positive infinity. | | __m128i __lsx_vftintrp_w_d (__m128d a, __m128d b) | `vftintrp.w.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards positive infinity. | | __m128i __lsx_vftintrp_w_s (__m128 a) | `vftintrp.w.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards positive infinity. | | __m128i __lsx_vftintrph_l_s (__m128 a) | `vftintrph.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards positive infinity. | | __m128i __lsx_vftintrpl_l_s (__m128 a) | `vftintrpl.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards positive infinity. | | __m128i __lsx_vftintrz_l_d (__m128d a) | `vftintrz.l.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards zero. | | __m128i __lsx_vftintrz_lu_d (__m128d a) | `vftintrz.lu.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert double-precision floating point elements in `a` to unsigned 64-bit integer, rounding towards zero. | | __m128i __lsx_vftintrz_w_d (__m128d a, __m128d b) | `vftintrz.w.d vr, vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards zero. | | __m128i __lsx_vftintrz_w_s (__m128 a) | `vftintrz.w.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards zero. | | __m128i __lsx_vftintrz_wu_s (__m128 a) | `vftintrz.wu.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Convert single-precision floating point elements in `a` to unsigned 32-bit integer, rounding towards zero. | | __m128i __lsx_vftintrzh_l_s (__m128 a) | `vftintrzh.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards zero. | | __m128i __lsx_vftintrzl_l_s (__m128 a) | `vftintrzl.l.s vr, vr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=5, IPC=0.5(1/2); 2K3000/LA364E: L=5, IPC=0.5(1/2) | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards zero. | --- ## Floating Point Misc | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128 __lsx_vfrint_s (__m128 a) | `vfrint.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers. | | __m128 __lsx_vfrintrm_s (__m128 a) | `vfrintrm.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers. | | __m128 __lsx_vfrintrne_s (__m128 a) | `vfrintrne.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers. | | __m128 __lsx_vfrintrp_s (__m128 a) | `vfrintrp.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers. | | __m128 __lsx_vfrintrz_s (__m128 a) | `vfrintrz.s vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers. | | __m128d __lsx_vfrint_d (__m128d a) | `vfrint.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers. | | __m128d __lsx_vfrintrm_d (__m128d a) | `vfrintrm.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers. | | __m128d __lsx_vfrintrne_d (__m128d a) | `vfrintrne.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers. | | __m128d __lsx_vfrintrp_d (__m128d a) | `vfrintrp.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers. | | __m128d __lsx_vfrintrz_d (__m128d a) | `vfrintrz.d vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers. | | __m128i __lsx_vfclass_d (__m128d a) | `vfclass.d vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Classifiy each double precision floating point elements in `a`. | | __m128i __lsx_vfclass_s (__m128 a) | `vfclass.s vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Classifiy each single precision floating point elements in `a`. | --- ## Fused Multiply-Add | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c) | `vfmadd.s vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`. | | __m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c) | `vfmsub.s vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`. | | __m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c) | `vfnmadd.s vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`. | | __m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c) | `vfnmsub.s vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`. | | __m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c) | `vfmadd.d vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`. | | __m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c) | `vfmsub.d vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`. | | __m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c) | `vfnmadd.d vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`. | | __m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c) | `vfnmsub.d vr, vr, vr, vr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`. | --- ## Integer Comparison | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vseq_b (__m128i a, __m128i b) | `vseq.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 8-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseq_d (__m128i a, __m128i b) | `vseq.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 64-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseq_h (__m128i a, __m128i b) | `vseq.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 16-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseq_w (__m128i a, __m128i b) | `vseq.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 32-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseqi_b (__m128i a, imm_n16_15 imm) | `vseqi.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 8-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseqi_d (__m128i a, imm_n16_15 imm) | `vseqi.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 64-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseqi_h (__m128i a, imm_n16_15 imm) | `vseqi.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 16-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vseqi_w (__m128i a, imm_n16_15 imm) | `vseqi.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the 32-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m128i __lsx_vsle_b (__m128i a, __m128i b) | `vsle.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_bu (__m128i a, __m128i b) | `vsle.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_d (__m128i a, __m128i b) | `vsle.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_du (__m128i a, __m128i b) | `vsle.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_h (__m128i a, __m128i b) | `vsle.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_hu (__m128i a, __m128i b) | `vsle.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_w (__m128i a, __m128i b) | `vsle.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vsle_wu (__m128i a, __m128i b) | `vsle.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m128i __lsx_vslei_b (__m128i a, imm_n16_15 imm) | `vslei.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_bu (__m128i a, imm0_31 imm) | `vslei.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_d (__m128i a, imm_n16_15 imm) | `vslei.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_du (__m128i a, imm0_31 imm) | `vslei.du vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_h (__m128i a, imm_n16_15 imm) | `vslei.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_hu (__m128i a, imm0_31 imm) | `vslei.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_w (__m128i a, imm_n16_15 imm) | `vslei.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslei_wu (__m128i a, imm0_31 imm) | `vslei.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m128i __lsx_vslt_b (__m128i a, __m128i b) | `vslt.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_bu (__m128i a, __m128i b) | `vslt.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_d (__m128i a, __m128i b) | `vslt.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_du (__m128i a, __m128i b) | `vslt.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_h (__m128i a, __m128i b) | `vslt.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_hu (__m128i a, __m128i b) | `vslt.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_w (__m128i a, __m128i b) | `vslt.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslt_wu (__m128i a, __m128i b) | `vslt.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m128i __lsx_vslti_b (__m128i a, imm_n16_15 imm) | `vslti.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_bu (__m128i a, imm0_31 imm) | `vslti.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_d (__m128i a, imm_n16_15 imm) | `vslti.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_du (__m128i a, imm0_31 imm) | `vslti.du vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_h (__m128i a, imm_n16_15 imm) | `vslti.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_hu (__m128i a, imm0_31 imm) | `vslti.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_w (__m128i a, imm_n16_15 imm) | `vslti.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m128i __lsx_vslti_wu (__m128i a, imm0_31 imm) | `vslti.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | --- ## Integer Computation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vabsd_b (__m128i a, __m128i b) | `vabsd.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_bu (__m128i a, __m128i b) | `vabsd.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_d (__m128i a, __m128i b) | `vabsd.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_du (__m128i a, __m128i b) | `vabsd.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_h (__m128i a, __m128i b) | `vabsd.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_hu (__m128i a, __m128i b) | `vabsd.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_w (__m128i a, __m128i b) | `vabsd.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vabsd_wu (__m128i a, __m128i b) | `vabsd.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute absolute difference of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadd_b (__m128i a, __m128i b) | `vadd.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadd_d (__m128i a, __m128i b) | `vadd.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadd_h (__m128i a, __m128i b) | `vadd.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadd_q (__m128i a, __m128i b) | `vadd.q vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add 128-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadd_w (__m128i a, __m128i b) | `vadd.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadda_b (__m128i a, __m128i b) | `vadda.b vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add absolute of 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadda_d (__m128i a, __m128i b) | `vadda.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add absolute of 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadda_h (__m128i a, __m128i b) | `vadda.h vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add absolute of 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vadda_w (__m128i a, __m128i b) | `vadda.w vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add absolute of 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm) | `vaddi.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 8-bit elements in `a` and `imm`, save the result in `dst`. | | __m128i __lsx_vaddi_du (__m128i a, imm0_31 imm) | `vaddi.du vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 64-bit elements in `a` and `imm`, save the result in `dst`. | | __m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm) | `vaddi.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 16-bit elements in `a` and `imm`, save the result in `dst`. | | __m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm) | `vaddi.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Add 32-bit elements in `a` and `imm`, save the result in `dst`. | | __m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) | `vaddwev.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) | `vaddwev.d.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) | `vaddwev.d.wu.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) | `vaddwev.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) | `vaddwev.h.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) | `vaddwev.h.bu.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) | `vaddwev.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) | `vaddwev.q.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) | `vaddwev.q.du.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) | `vaddwev.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) | `vaddwev.w.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) | `vaddwev.w.hu.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vaddwod_d_w (__m128i a, __m128i b) | `vaddwod.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwod_d_wu (__m128i a, __m128i b) | `vaddwod.d.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwod_d_wu_w (__m128i a, __m128i b) | `vaddwod.d.wu.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vaddwod_h_b (__m128i a, __m128i b) | `vaddwod.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwod_h_bu (__m128i a, __m128i b) | `vaddwod.h.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwod_h_bu_b (__m128i a, __m128i b) | `vaddwod.h.bu.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vaddwod_q_d (__m128i a, __m128i b) | `vaddwod.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwod_q_du (__m128i a, __m128i b) | `vaddwod.q.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwod_q_du_d (__m128i a, __m128i b) | `vaddwod.q.du.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vaddwod_w_h (__m128i a, __m128i b) | `vaddwod.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vaddwod_w_hu (__m128i a, __m128i b) | `vaddwod.w.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vaddwod_w_hu_h (__m128i a, __m128i b) | `vaddwod.w.hu.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vavg_b (__m128i a, __m128i b) | `vavg.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_bu (__m128i a, __m128i b) | `vavg.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_d (__m128i a, __m128i b) | `vavg.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute the average (rounded towards negative infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_du (__m128i a, __m128i b) | `vavg.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_h (__m128i a, __m128i b) | `vavg.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_hu (__m128i a, __m128i b) | `vavg.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_w (__m128i a, __m128i b) | `vavg.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavg_wu (__m128i a, __m128i b) | `vavg.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_b (__m128i a, __m128i b) | `vavgr.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_bu (__m128i a, __m128i b) | `vavgr.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_d (__m128i a, __m128i b) | `vavgr.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute the average (rounded towards positive infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_du (__m128i a, __m128i b) | `vavgr.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_h (__m128i a, __m128i b) | `vavgr.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_hu (__m128i a, __m128i b) | `vavgr.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_w (__m128i a, __m128i b) | `vavgr.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vavgr_wu (__m128i a, __m128i b) | `vavgr.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vdiv_b (__m128i a, __m128i b) | `vdiv.b vr, vr, vr` | 3C5000/LA464: L=29, 32, IPC=0.06(1/17); 3A6000/LA664: L=29, 32, IPC=0.06(1/15.5); 3C6000/LA664: L=29, 32, IPC=0.07(1/13.5); 2K1000LA/LA264: L=30, 58, IPC=0(1/55); 2K3000/LA364E: L=30, IPC=0(1/55) | Divide signed 8-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_bu (__m128i a, __m128i b) | `vdiv.bu vr, vr, vr` | 3C5000/LA464: L=29, 36, IPC=0.06(1/18); 3A6000/LA664: L=29, 33, IPC=0.06(1/16.5); 3C6000/LA664: L=29, 36, IPC=0.07(1/13.5); 2K1000LA/LA264: L=30, 44, IPC=0(1/55); 2K3000/LA364E: L=30, IPC=0(1/55) | Divide unsigned 8-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_d (__m128i a, __m128i b) | `vdiv.d vr, vr, vr` | 3C5000/LA464: L=8, 18.5, IPC=0.11(1/9); 3A6000/LA664: L=8, IPC=0.25(1/4); 3C6000/LA664: L=8, 18.5, IPC=0.33(1/3); 2K1000LA/LA264: L=9, 19.5, IPC=0.08(1/12); 2K3000/LA364E: L=9, IPC=0.08(1/12) | Divide signed 64-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_du (__m128i a, __m128i b) | `vdiv.du vr, vr, vr` | 3C5000/LA464: L=8, 18.5, IPC=0.11(1/9); 3A6000/LA664: L=8, IPC=0.25(1/4); 3C6000/LA664: L=8, 18.5, IPC=0.33(1/3); 2K1000LA/LA264: L=9, IPC=0.08(1/12); 2K3000/LA364E: L=9, IPC=0.08(1/12) | Divide unsigned 64-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_h (__m128i a, __m128i b) | `vdiv.h vr, vr, vr` | 3C5000/LA464: L=17, 21.5, IPC=0.09(1/11); 3A6000/LA664: L=17, IPC=0.12(1/8.5); 3C6000/LA664: L=17, 21.5, IPC=0.13(1/7.5); 2K1000LA/LA264: L=18, 36, IPC=0.03(1/31); 2K3000/LA364E: L=18, 27, IPC=0.03(1/31) | Divide signed 16-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_hu (__m128i a, __m128i b) | `vdiv.hu vr, vr, vr` | 3C5000/LA464: L=17, 21.5, IPC=0.07(1/14); 3A6000/LA664: L=17, 22, IPC=0.11(1/9); 3C6000/LA664: L=17, 21.5, IPC=0.13(1/7.5); 2K1000LA/LA264: L=18, 27, IPC=0.03(1/31); 2K3000/LA364E: L=18, 27, IPC=0.03(1/31) | Divide unsigned 16-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_w (__m128i a, __m128i b) | `vdiv.w vr, vr, vr` | 3C5000/LA464: L=11, 17.5, IPC=0.09(1/11.5); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=11, 17.5, IPC=0.22(1/4.5); 2K1000LA/LA264: L=12, 25, IPC=0.06(1/18); 2K3000/LA364E: L=12, 18.5, IPC=0.06(1/18) | Divide signed 32-bit elements in `a` by elements in `b`. | | __m128i __lsx_vdiv_wu (__m128i a, __m128i b) | `vdiv.wu vr, vr, vr` | 3C5000/LA464: L=11, 17.5, IPC=0.07(1/15); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=11, 17.5, IPC=0.22(1/4.5); 2K1000LA/LA264: L=12, IPC=0.06(1/18); 2K3000/LA364E: L=12, 18.5, IPC=0.06(1/18) | Divide unsigned 32-bit elements in `a` by elements in `b`. | | __m128i __lsx_vhaddw_d_w (__m128i a, __m128i b) | `vhaddw.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 32-bit elements in `a` to even-positioned signed 32-bit elements in `b` to get 64-bit result. | | __m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b) | `vhaddw.du.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 32-bit elements in `a` to even-positioned unsigned 32-bit elements in `b` to get 64-bit result. | | __m128i __lsx_vhaddw_h_b (__m128i a, __m128i b) | `vhaddw.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 8-bit elements in `a` to even-positioned signed 8-bit elements in `b` to get 16-bit result. | | __m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b) | `vhaddw.hu.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 8-bit elements in `a` to even-positioned unsigned 8-bit elements in `b` to get 16-bit result. | | __m128i __lsx_vhaddw_q_d (__m128i a, __m128i b) | `vhaddw.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 64-bit elements in `a` to even-positioned signed 64-bit elements in `b` to get 128-bit result. | | __m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b) | `vhaddw.qu.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 64-bit elements in `a` to even-positioned unsigned 64-bit elements in `b` to get 128-bit result. | | __m128i __lsx_vhaddw_w_h (__m128i a, __m128i b) | `vhaddw.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned signed 16-bit elements in `a` to even-positioned signed 16-bit elements in `b` to get 32-bit result. | | __m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b) | `vhaddw.wu.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Add odd-positioned unsigned 16-bit elements in `a` to even-positioned unsigned 16-bit elements in `b` to get 32-bit result. | | __m128i __lsx_vhsubw_d_w (__m128i a, __m128i b) | `vhsubw.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 32-bit elements in `a` by even-positioned signed 32-bit elements in `b` to get 64-bit result. | | __m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b) | `vhsubw.du.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 32-bit elements in `a` by even-positioned unsigned 32-bit elements in `b` to get 64-bit result. | | __m128i __lsx_vhsubw_h_b (__m128i a, __m128i b) | `vhsubw.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 8-bit elements in `a` by even-positioned signed 8-bit elements in `b` to get 16-bit result. | | __m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b) | `vhsubw.hu.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 8-bit elements in `a` by even-positioned unsigned 8-bit elements in `b` to get 16-bit result. | | __m128i __lsx_vhsubw_q_d (__m128i a, __m128i b) | `vhsubw.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 64-bit elements in `a` by even-positioned signed 64-bit elements in `b` to get 128-bit result. | | __m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b) | `vhsubw.qu.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 64-bit elements in `a` by even-positioned unsigned 64-bit elements in `b` to get 128-bit result. | | __m128i __lsx_vhsubw_w_h (__m128i a, __m128i b) | `vhsubw.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 16-bit elements in `a` by even-positioned signed 16-bit elements in `b` to get 32-bit result. | | __m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b) | `vhsubw.wu.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 16-bit elements in `a` by even-positioned unsigned 16-bit elements in `b` to get 32-bit result. | | __m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c) | `vmadd.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 8-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c) | `vmadd.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 64-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c) | `vmadd.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 16-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c) | `vmadd.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 32-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c) | `vmaddwev.d.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c) | `vmaddwev.d.wu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c) | `vmaddwev.d.wu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c) | `vmaddwev.h.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c) | `vmaddwev.h.bu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c) | `vmaddwev.h.bu.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c) | `vmaddwev.q.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c) | `vmaddwev.q.du vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c) | `vmaddwev.q.du.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c) | `vmaddwev.w.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c) | `vmaddwev.w.hu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c) | `vmaddwev.w.hu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c) | `vmaddwod.d.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c) | `vmaddwod.d.wu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c) | `vmaddwod.d.wu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c) | `vmaddwod.h.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c) | `vmaddwod.h.bu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c) | `vmaddwod.h.bu.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c) | `vmaddwod.q.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c) | `vmaddwod.q.du vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c) | `vmaddwod.q.du.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c) | `vmaddwod.w.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c) | `vmaddwod.w.hu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c) | `vmaddwod.w.hu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m128i __lsx_vmax_b (__m128i a, __m128i b) | `vmax.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 8-bit elements in `a` and `b`. | | __m128i __lsx_vmax_bu (__m128i a, __m128i b) | `vmax.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 8-bit elements in `a` and `b`. | | __m128i __lsx_vmax_d (__m128i a, __m128i b) | `vmax.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise maximum for signed 64-bit elements in `a` and `b`. | | __m128i __lsx_vmax_du (__m128i a, __m128i b) | `vmax.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise maximum for unsigned 64-bit elements in `a` and `b`. | | __m128i __lsx_vmax_h (__m128i a, __m128i b) | `vmax.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 16-bit elements in `a` and `b`. | | __m128i __lsx_vmax_hu (__m128i a, __m128i b) | `vmax.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 16-bit elements in `a` and `b`. | | __m128i __lsx_vmax_w (__m128i a, __m128i b) | `vmax.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 32-bit elements in `a` and `b`. | | __m128i __lsx_vmax_wu (__m128i a, __m128i b) | `vmax.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 32-bit elements in `a` and `b`. | | __m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm) | `vmaxi.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 8-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_bu (__m128i a, imm0_31 imm) | `vmaxi.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 8-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm) | `vmaxi.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise maximum for signed 64-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_du (__m128i a, imm0_31 imm) | `vmaxi.du vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise maximum for unsigned 64-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm) | `vmaxi.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 16-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_hu (__m128i a, imm0_31 imm) | `vmaxi.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 16-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm) | `vmaxi.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for signed 32-bit elements in `a` and `imm`. | | __m128i __lsx_vmaxi_wu (__m128i a, imm0_31 imm) | `vmaxi.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise maximum for unsigned 32-bit elements in `a` and `imm`. | | __m128i __lsx_vmin_b (__m128i a, __m128i b) | `vmin.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 8-bit elements in `a` and `b`. | | __m128i __lsx_vmin_bu (__m128i a, __m128i b) | `vmin.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 8-bit elements in `a` and `b`. | | __m128i __lsx_vmin_d (__m128i a, __m128i b) | `vmin.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise minimum for signed 64-bit elements in `a` and `b`. | | __m128i __lsx_vmin_du (__m128i a, __m128i b) | `vmin.du vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise minimum for unsigned 64-bit elements in `a` and `b`. | | __m128i __lsx_vmin_h (__m128i a, __m128i b) | `vmin.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 16-bit elements in `a` and `b`. | | __m128i __lsx_vmin_hu (__m128i a, __m128i b) | `vmin.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 16-bit elements in `a` and `b`. | | __m128i __lsx_vmin_w (__m128i a, __m128i b) | `vmin.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 32-bit elements in `a` and `b`. | | __m128i __lsx_vmin_wu (__m128i a, __m128i b) | `vmin.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 32-bit elements in `a` and `b`. | | __m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm) | `vmini.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 8-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_bu (__m128i a, imm0_31 imm) | `vmini.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 8-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm) | `vmini.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise minimum for signed 64-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_du (__m128i a, imm0_31 imm) | `vmini.du vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Compute elementwise minimum for unsigned 64-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm) | `vmini.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 16-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_hu (__m128i a, imm0_31 imm) | `vmini.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 16-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm) | `vmini.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for signed 32-bit elements in `a` and `imm`. | | __m128i __lsx_vmini_wu (__m128i a, imm0_31 imm) | `vmini.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute elementwise minimum for unsigned 32-bit elements in `a` and `imm`. | | __m128i __lsx_vmod_b (__m128i a, __m128i b) | `vmod.b vr, vr, vr` | 3C5000/LA464: L=29, 33, IPC=0.06(1/17); 3A6000/LA664: L=29, 35, IPC=0.06(1/15.5); 3C6000/LA664: L=29, IPC=0.07(1/13.5); 2K1000LA/LA264: L=30, 46, IPC=0(1/63); 2K3000/LA364E: L=30, 46, IPC=0(1/63) | Modulo residual signed 8-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_bu (__m128i a, __m128i b) | `vmod.bu vr, vr, vr` | 3C5000/LA464: L=29, 33, IPC=0.05(1/19); 3A6000/LA664: L=29, 37, IPC=0.06(1/17.5); 3C6000/LA664: L=29, IPC=0.07(1/13.5); 2K1000LA/LA264: L=30, 46, IPC=0(1/62); 2K3000/LA364E: L=30, 46, IPC=0(1/63) | Modulo residual unsigned 8-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_d (__m128i a, __m128i b) | `vmod.d vr, vr, vr` | 3C5000/LA464: L=8, 10, IPC=0.11(1/9.5); 3A6000/LA664: L=8, 10, IPC=0.25(1/4); 3C6000/LA664: L=8, IPC=0.33(1/3); 2K1000LA/LA264: L=9, 11, IPC=0.08(1/13); 2K3000/LA364E: L=9, 11, IPC=0.08(1/13) | Modulo residual signed 64-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_du (__m128i a, __m128i b) | `vmod.du vr, vr, vr` | 3C5000/LA464: L=8, 10, IPC=0.11(1/9.5); 3A6000/LA664: L=8, 10, IPC=0.25(1/4); 3C6000/LA664: L=8, IPC=0.33(1/3); 2K1000LA/LA264: L=9, 11, IPC=0.08(1/13); 2K3000/LA364E: L=9, 11, IPC=0.08(1/13) | Modulo residual unsigned 64-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_h (__m128i a, __m128i b) | `vmod.h vr, vr, vr` | 3C5000/LA464: L=17, 21, IPC=0.09(1/11); 3A6000/LA664: L=17, 21, IPC=0.12(1/8.5); 3C6000/LA664: L=17, IPC=0.13(1/7.5); 2K1000LA/LA264: L=18, 26, IPC=0.03(1/35); 2K3000/LA364E: L=18, 26, IPC=0.03(1/35) | Modulo residual signed 16-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_hu (__m128i a, __m128i b) | `vmod.hu vr, vr, vr` | 3C5000/LA464: L=17, 21, IPC=0.07(1/15); 3A6000/LA664: L=17, 21, IPC=0.11(1/9.5); 3C6000/LA664: L=17, IPC=0.13(1/7.5); 2K1000LA/LA264: L=18, 26, IPC=0.03(1/35); 2K3000/LA364E: L=18, 26, IPC=0.03(1/35) | Modulo residual unsigned 16-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_w (__m128i a, __m128i b) | `vmod.w vr, vr, vr` | 3C5000/LA464: L=11, 15, IPC=0.08(1/12); 3A6000/LA664: L=11, 13, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5); 2K1000LA/LA264: L=12, 16, IPC=0.05(1/20); 2K3000/LA364E: L=12, 16, IPC=0.05(1/20) | Modulo residual signed 32-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmod_wu (__m128i a, __m128i b) | `vmod.wu vr, vr, vr` | 3C5000/LA464: L=11, 15, IPC=0.06(1/16); 3A6000/LA664: L=11, 13, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5); 2K1000LA/LA264: L=12, 16, IPC=0.05(1/20); 2K3000/LA364E: L=12, 16, IPC=0.05(1/20) | Modulo residual unsigned 32-bit elements in `a` by elements in `b`. | | __m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c) | `vmsub.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 8-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c) | `vmsub.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 64-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c) | `vmsub.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 16-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c) | `vmsub.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 32-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m128i __lsx_vmuh_b (__m128i a, __m128i b) | `vmuh.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply signed 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`. | | __m128i __lsx_vmuh_bu (__m128i a, __m128i b) | `vmuh.bu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply unsigned 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`. | | __m128i __lsx_vmuh_d (__m128i a, __m128i b) | `vmuh.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply signed 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`. | | __m128i __lsx_vmuh_du (__m128i a, __m128i b) | `vmuh.du vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply unsigned 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`. | | __m128i __lsx_vmuh_h (__m128i a, __m128i b) | `vmuh.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply signed 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`. | | __m128i __lsx_vmuh_hu (__m128i a, __m128i b) | `vmuh.hu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply unsigned 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`. | | __m128i __lsx_vmuh_w (__m128i a, __m128i b) | `vmuh.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply signed 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`. | | __m128i __lsx_vmuh_wu (__m128i a, __m128i b) | `vmuh.wu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply unsigned 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`. | | __m128i __lsx_vmul_b (__m128i a, __m128i b) | `vmul.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vmul_d (__m128i a, __m128i b) | `vmul.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vmul_h (__m128i a, __m128i b) | `vmul.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vmul_w (__m128i a, __m128i b) | `vmul.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vmulwev_d_w (__m128i a, __m128i b) | `vmulwev.d.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b) | `vmulwev.d.wu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b) | `vmulwev.d.wu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwev_h_b (__m128i a, __m128i b) | `vmulwev.h.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b) | `vmulwev.h.bu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b) | `vmulwev.h.bu.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwev_q_d (__m128i a, __m128i b) | `vmulwev.q.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwev_q_du (__m128i a, __m128i b) | `vmulwev.q.du vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b) | `vmulwev.q.du.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwev_w_h (__m128i a, __m128i b) | `vmulwev.w.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b) | `vmulwev.w.hu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b) | `vmulwev.w.hu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vmulwod_d_w (__m128i a, __m128i b) | `vmulwod.d.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwod_d_wu (__m128i a, __m128i b) | `vmulwod.d.wu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwod_d_wu_w (__m128i a, __m128i b) | `vmulwod.d.wu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vmulwod_h_b (__m128i a, __m128i b) | `vmulwod.h.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwod_h_bu (__m128i a, __m128i b) | `vmulwod.h.bu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwod_h_bu_b (__m128i a, __m128i b) | `vmulwod.h.bu.b vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vmulwod_q_d (__m128i a, __m128i b) | `vmulwod.q.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwod_q_du (__m128i a, __m128i b) | `vmulwod.q.du vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwod_q_du_d (__m128i a, __m128i b) | `vmulwod.q.du.d vr, vr, vr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2; 2K1000LA/LA264: L=6, IPC=1; 2K3000/LA364E: L=6, IPC=1 | Multiply odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vmulwod_w_h (__m128i a, __m128i b) | `vmulwod.w.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vmulwod_w_hu (__m128i a, __m128i b) | `vmulwod.w.hu vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vmulwod_w_hu_h (__m128i a, __m128i b) | `vmulwod.w.hu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Multiply odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vneg_b (__m128i a) | `vneg.b vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Negate 8-bit elements in `a` and save the result in `dst`. | | __m128i __lsx_vneg_d (__m128i a) | `vneg.d vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Negate 64-bit elements in `a` and save the result in `dst`. | | __m128i __lsx_vneg_h (__m128i a) | `vneg.h vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Negate 16-bit elements in `a` and save the result in `dst`. | | __m128i __lsx_vneg_w (__m128i a) | `vneg.w vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Negate 32-bit elements in `a` and save the result in `dst`. | | __m128i __lsx_vsadd_b (__m128i a, __m128i b) | `vsadd.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the signed 8-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_bu (__m128i a, __m128i b) | `vsadd.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the unsigned 8-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_d (__m128i a, __m128i b) | `vsadd.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the signed 64-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_du (__m128i a, __m128i b) | `vsadd.du vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the unsigned 64-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_h (__m128i a, __m128i b) | `vsadd.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the signed 16-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_hu (__m128i a, __m128i b) | `vsadd.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the unsigned 16-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_w (__m128i a, __m128i b) | `vsadd.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the signed 32-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsadd_wu (__m128i a, __m128i b) | `vsadd.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating add the unsigned 32-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_b (__m128i a, __m128i b) | `vssub.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the signed 8-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_bu (__m128i a, __m128i b) | `vssub.bu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the unsigned 8-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_d (__m128i a, __m128i b) | `vssub.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the signed 64-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_du (__m128i a, __m128i b) | `vssub.du vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the unsigned 64-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_h (__m128i a, __m128i b) | `vssub.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the signed 16-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_hu (__m128i a, __m128i b) | `vssub.hu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the unsigned 16-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_w (__m128i a, __m128i b) | `vssub.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the signed 32-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vssub_wu (__m128i a, __m128i b) | `vssub.wu vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Saturating subtract the unsigned 32-bit elements in `a` and `b`, store the result to `dst`. | | __m128i __lsx_vsub_b (__m128i a, __m128i b) | `vsub.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 8-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vsub_d (__m128i a, __m128i b) | `vsub.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 64-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vsub_h (__m128i a, __m128i b) | `vsub.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 16-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vsub_q (__m128i a, __m128i b) | `vsub.q vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract 128-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vsub_w (__m128i a, __m128i b) | `vsub.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 32-bit elements in `a` and `b`, save the result in `dst`. | | __m128i __lsx_vsubi_bu (__m128i a, imm0_31 imm) | `vsubi.bu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 8-bit elements in `a` by `imm`, save the result in `dst`. | | __m128i __lsx_vsubi_du (__m128i a, imm0_31 imm) | `vsubi.du vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 64-bit elements in `a` by `imm`, save the result in `dst`. | | __m128i __lsx_vsubi_hu (__m128i a, imm0_31 imm) | `vsubi.hu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 16-bit elements in `a` by `imm`, save the result in `dst`. | | __m128i __lsx_vsubi_wu (__m128i a, imm0_31 imm) | `vsubi.wu vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Subtract 32-bit elements in `a` by `imm`, save the result in `dst`. | | __m128i __lsx_vsubwev_d_w (__m128i a, __m128i b) | `vsubwev.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b) | `vsubwev.d.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vsubwev_h_b (__m128i a, __m128i b) | `vsubwev.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b) | `vsubwev.h.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vsubwev_q_d (__m128i a, __m128i b) | `vsubwev.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vsubwev_q_du (__m128i a, __m128i b) | `vsubwev.q.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vsubwev_w_h (__m128i a, __m128i b) | `vsubwev.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b) | `vsubwev.w.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vsubwod_d_w (__m128i a, __m128i b) | `vsubwod.d.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vsubwod_d_wu (__m128i a, __m128i b) | `vsubwod.d.wu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m128i __lsx_vsubwod_h_b (__m128i a, __m128i b) | `vsubwod.h.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vsubwod_h_bu (__m128i a, __m128i b) | `vsubwod.h.bu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m128i __lsx_vsubwod_q_d (__m128i a, __m128i b) | `vsubwod.q.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vsubwod_q_du (__m128i a, __m128i b) | `vsubwod.q.du vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m128i __lsx_vsubwod_w_h (__m128i a, __m128i b) | `vsubwod.w.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m128i __lsx_vsubwod_w_hu (__m128i a, __m128i b) | `vsubwod.w.hu vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Subtract odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | --- ## Logical | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vand_v (__m128i a, __m128i b) | `vand.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise AND between elements in `a` and `b`. | | __m128i __lsx_vandi_b (__m128i a, imm0_255 imm) | `vandi.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise AND between elements in `a` and `imm`. | | __m128i __lsx_vandn_v (__m128i a, __m128i b) | `vandn.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise ANDN between elements in `a` and `b`. | | __m128i __lsx_vnor_v (__m128i a, __m128i b) | `vnor.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise NOR between elements in `a` and `b`. | | __m128i __lsx_vnori_b (__m128i a, imm0_255 imm) | `vnori.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise NOR between elements in `a` and `imm`. | | __m128i __lsx_vor_v (__m128i a, __m128i b) | `vor.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise OR between elements in `a` and `b`. | | __m128i __lsx_vori_b (__m128i a, imm0_255 imm) | `vori.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=3 | Compute bitwise OR between elements in `a` and `imm`. | | __m128i __lsx_vorn_v (__m128i a, __m128i b) | `vorn.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise ORN between elements in `a` and `b`. | | __m128i __lsx_vxor_v (__m128i a, __m128i b) | `vxor.v vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise XOR between elements in `a` and `b`. | | __m128i __lsx_vxori_b (__m128i a, imm0_255 imm) | `vxori.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute bitwise XOR between elements in `a` and `imm`. | --- ## Memory Load & Store | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vld (void * addr, imm_n2048_2047 offset) | `vld vr, r, imm` | 未提供 | Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors. | | __m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset) | `vldrepl.b vr, r, imm` | 未提供 | Read 8-bit data from memory address `addr + (offset << 0)`, replicate the data to all vector lanes and save into `dst`. | | __m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset) | `vldrepl.d vr, r, imm` | 未提供 | Read 64-bit data from memory address `addr + (offset << 3)`, replicate the data to all vector lanes and save into `dst`. | | __m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset) | `vldrepl.h vr, r, imm` | 未提供 | Read 16-bit data from memory address `addr + (offset << 1)`, replicate the data to all vector lanes and save into `dst`. | | __m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset) | `vldrepl.w vr, r, imm` | 未提供 | Read 32-bit data from memory address `addr + (offset << 2)`, replicate the data to all vector lanes and save into `dst`. | | __m128i __lsx_vldx (void * addr, long int offset) | `vldx vr, r, r` | 未提供 | Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors. | | void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset) | `vst vr, r, imm` | 未提供 | Write whole vector data in `data` to memory address `addr + offset`. | | void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane) | `vstelm.b vr, r, imm, imm` | 未提供 | Store the 8-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane) | `vstelm.d vr, r, imm, imm` | 未提供 | Store the 64-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane) | `vstelm.h vr, r, imm, imm` | 未提供 | Store the 16-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane) | `vstelm.w vr, r, imm, imm` | 未提供 | Store the 32-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lsx_vstx (__m128i data, void * addr, long int offset) | `vstx vr, r, r` | 未提供 | Write whole-vector data in `data` to memory address `addr + offset`. | --- ## Misc | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vexth_d_w (__m128i a) | `vexth.d.w vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend signed 32-bit elements in the higher half of `a` to 64-bit. | | __m128i __lsx_vexth_du_wu (__m128i a) | `vexth.du.wu vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend unsigned 32-bit elements in the higher half of `a` to 64-bit. | | __m128i __lsx_vexth_h_b (__m128i a) | `vexth.h.b vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend signed 8-bit elements in the higher half of `a` to 16-bit. | | __m128i __lsx_vexth_hu_bu (__m128i a) | `vexth.hu.bu vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend unsigned 8-bit elements in the higher half of `a` to 16-bit. | | __m128i __lsx_vexth_q_d (__m128i a) | `vexth.q.d vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend signed 64-bit elements in the higher half of `a` to 128-bit. | | __m128i __lsx_vexth_qu_du (__m128i a) | `vexth.qu.du vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend unsigned 64-bit elements in the higher half of `a` to 128-bit. | | __m128i __lsx_vexth_w_h (__m128i a) | `vexth.w.h vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend signed 16-bit elements in the higher half of `a` to 32-bit. | | __m128i __lsx_vexth_wu_hu (__m128i a) | `vexth.wu.hu vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend unsigned 16-bit elements in the higher half of `a` to 32-bit. | | __m128i __lsx_vextl_q_d (__m128i a) | `vextl.q.d vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend signed 64-bit elements in the lower half of `a` to 128-bit. | | __m128i __lsx_vextl_qu_du (__m128i a) | `vextl.qu.du vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extend unsigned 64-bit elements in the lower half of `a` to 128-bit. | | __m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm) | `vextrins.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extract one 8-bit element in `b` and insert it to `a` according to `imm`. | | __m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm) | `vextrins.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extract one 64-bit element in `b` and insert it to `a` according to `imm`. | | __m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm) | `vextrins.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extract one 16-bit element in `b` and insert it to `a` according to `imm`. | | __m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm) | `vextrins.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Extract one 32-bit element in `b` and insert it to `a` according to `imm`. | | __m128i __lsx_vfrstp_b (__m128i a, __m128i b, __m128i c) | `vfrstp.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `c`. | | __m128i __lsx_vfrstp_h (__m128i a, __m128i b, __m128i c) | `vfrstp.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `c`. | | __m128i __lsx_vfrstpi_b (__m128i a, __m128i b, imm0_31 imm) | `vfrstpi.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`. | | __m128i __lsx_vfrstpi_h (__m128i a, __m128i b, imm0_31 imm) | `vfrstpi.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`. | | __m128i __lsx_vilvh_b (__m128i a, __m128i b) | `vilvh.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 8-bit elements in higher half of `a` and `b`. | | __m128i __lsx_vilvh_d (__m128i a, __m128i b) | `vilvh.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 64-bit elements in higher half of `a` and `b`. | | __m128i __lsx_vilvh_h (__m128i a, __m128i b) | `vilvh.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 16-bit elements in higher half of `a` and `b`. | | __m128i __lsx_vilvh_w (__m128i a, __m128i b) | `vilvh.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 32-bit elements in higher half of `a` and `b`. | | __m128i __lsx_vilvl_b (__m128i a, __m128i b) | `vilvl.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 8-bit elements in lower half of `a` and `b`. | | __m128i __lsx_vilvl_d (__m128i a, __m128i b) | `vilvl.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 64-bit elements in lower half of `a` and `b`. | | __m128i __lsx_vilvl_h (__m128i a, __m128i b) | `vilvl.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 16-bit elements in lower half of `a` and `b`. | | __m128i __lsx_vilvl_w (__m128i a, __m128i b) | `vilvl.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Interleave 32-bit elements in lower half of `a` and `b`. | | __m128i __lsx_vinsgr2vr_b (__m128i a, int b, imm0_15 imm) | `vinsgr2vr.b vr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Insert 8-bit element into lane indexed `imm`. | | __m128i __lsx_vinsgr2vr_d (__m128i a, long int b, imm0_1 imm) | `vinsgr2vr.d vr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Insert 64-bit element into lane indexed `imm`. | | __m128i __lsx_vinsgr2vr_h (__m128i a, int b, imm0_7 imm) | `vinsgr2vr.h vr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Insert 16-bit element into lane indexed `imm`. | | __m128i __lsx_vinsgr2vr_w (__m128i a, int b, imm0_3 imm) | `vinsgr2vr.w vr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Insert 32-bit element into lane indexed `imm`. | | __m128i __lsx_vldi (imm_n1024_1023 imm) | `vldi vr, imm` | 未提供 | Initialize `dst` using predefined patterns: - `imm[12:10]=0b000`: broadcast `imm[7:0]` as 8-bit elements to all lanes - `imm[12:10]=0b001`: broadcast sign-extended `imm[9:0]` as 16-bit elements to all lanes - `imm[12:10]=0b010`: broadcast sign-extended `imm[9:0]` as 32-bit elements to all lanes - `imm[12:10]=0b011`: broadcast sign-extended `imm[9:0]` as 64-bit elements to all lanes - `imm[12:8]=0b10000`: broadcast `imm[7:0]` as 32-bit elements to all lanes - `imm[12:8]=0b10001`: broadcast `imm[7:0] << 8` as 32-bit elements to all lanes - `imm[12:8]=0b10010`: broadcast `imm[7:0] << 16` as 32-bit elements to all lanes - `imm[12:8]=0b10011`: broadcast `imm[7:0] << 24` as 32-bit elements to all lanes - `imm[12:8]=0b10100`: broadcast `imm[7:0]` as 16-bit elements to all lanes - `imm[12:8]=0b10101`: broadcast `imm[7:0] << 8` as 16-bit elements to all lanes - `imm[12:8]=0b10110`: broadcast `(imm[7:0] << 8) \| 0xFF` as 32-bit elements to all lanes - `imm[12:8]=0b10111`: broadcast `(imm[7:0] << 16) \| 0xFFFF` as 32-bit elements to all lanes - `imm[12:8]=0b11000`: broadcast `imm[7:0]` as 8-bit elements to all lanes - `imm[12:8]=0b11001`: repeat each bit of `imm[7:0]` eight times, and broadcast the result as 64-bit elements to all lanes - `imm[12:8]=0b11010`: broadcast `(imm[7] << 31) \| ((1-imm[6]) << 30) \| ((imm[6] * 0x1F) << 25) \| (imm[5:0] << 19)` as 32-bit elements to all lanes - `imm[12:8]=0b11011`: broadcast `(imm[7] << 31) \| ((1-imm[6]) << 30) \| ((imm[6] * 0x1F) << 25) \| (imm[5:0] << 19)` as 64-bit elements to all lanes - `imm[12:8]=0b11100`: broadcast `(imm[7] << 63) \| ((1-imm[6]) << 62) \| ((imm[6] * 0xFF) << 54) \| (imm[5:0] << 48)` as 64-bit elements to all lanes | | __m128i __lsx_vmskgez_b (__m128i a) | `vmskgez.b vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 8-bit element in `a`, if the element is greater than or equal to zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vmskltz_b (__m128i a) | `vmskltz.b vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 8-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vmskltz_d (__m128i a) | `vmskltz.d vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 64-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vmskltz_h (__m128i a) | `vmskltz.h vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 16-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vmskltz_w (__m128i a) | `vmskltz.w vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 32-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vmsknz_b (__m128i a) | `vmsknz.b vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | For each 8-bit element in `a`, if the element is non-zero, set one bit in `dst`, otherwise clear it. | | __m128i __lsx_vpackev_b (__m128i a, __m128i b) | `vpackev.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack even-positioned 8-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackev_d (__m128i a, __m128i b) | `vpackev.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack even-positioned 64-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackev_h (__m128i a, __m128i b) | `vpackev.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack even-positioned 16-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackev_w (__m128i a, __m128i b) | `vpackev.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack even-positioned 32-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackod_b (__m128i a, __m128i b) | `vpackod.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack odd-positioned 8-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackod_d (__m128i a, __m128i b) | `vpackod.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack odd-positioned 64-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackod_h (__m128i a, __m128i b) | `vpackod.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack odd-positioned 16-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpackod_w (__m128i a, __m128i b) | `vpackod.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Collect and pack odd-positioned 32-bit elements in `a` and `b` and store `dst`. | | __m128i __lsx_vpickev_b (__m128i a, __m128i b) | `vpickev.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick even-positioned 8-bit elements in `b` first, then pick even-positioned 8-bit elements in `a`. | | __m128i __lsx_vpickev_d (__m128i a, __m128i b) | `vpickev.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick even-positioned 64-bit elements in `b` first, then pick even-positioned 64-bit elements in `a`. | | __m128i __lsx_vpickev_h (__m128i a, __m128i b) | `vpickev.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick even-positioned 16-bit elements in `b` first, then pick even-positioned 16-bit elements in `a`. | | __m128i __lsx_vpickev_w (__m128i a, __m128i b) | `vpickev.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick even-positioned 32-bit elements in `b` first, then pick even-positioned 32-bit elements in `a`. | | __m128i __lsx_vpickod_b (__m128i a, __m128i b) | `vpickod.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick odd-positioned 8-bit elements in `b` first, then pick odd-positioned 8-bit elements in `a`. | | __m128i __lsx_vpickod_d (__m128i a, __m128i b) | `vpickod.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick odd-positioned 64-bit elements in `b` first, then pick odd-positioned 64-bit elements in `a`. | | __m128i __lsx_vpickod_h (__m128i a, __m128i b) | `vpickod.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick odd-positioned 16-bit elements in `b` first, then pick odd-positioned 16-bit elements in `a`. | | __m128i __lsx_vpickod_w (__m128i a, __m128i b) | `vpickod.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Pick odd-positioned 32-bit elements in `b` first, then pick odd-positioned 32-bit elements in `a`. | | __m128i __lsx_vreplgr2vr_b (int val) | `vreplgr2vr.b vr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1; 2K1000LA/LA264: L=N/A, IPC=0.5(1/2); 2K3000/LA364E: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m128i __lsx_vreplgr2vr_d (long int val) | `vreplgr2vr.d vr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m128i __lsx_vreplgr2vr_h (int val) | `vreplgr2vr.h vr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1; 2K1000LA/LA264: L=N/A, IPC=0.5(1/2); 2K3000/LA364E: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m128i __lsx_vreplgr2vr_w (int val) | `vreplgr2vr.w vr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m128i __lsx_vrepli_b (imm_n512_511 imm) | `vldi vr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m128i __lsx_vrepli_d (imm_n512_511 imm) | `vldi vr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m128i __lsx_vrepli_h (imm_n512_511 imm) | `vldi vr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m128i __lsx_vrepli_w (imm_n512_511 imm) | `vldi vr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m128i __lsx_vreplve_b (__m128i a, int idx) | `vreplve.b vr, vr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplve_d (__m128i a, int idx) | `vreplve.d vr, vr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplve_h (__m128i a, int idx) | `vreplve.h vr, vr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplve_w (__m128i a, int idx) | `vreplve.w vr, vr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx) | `vreplvei.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx) | `vreplvei.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx) | `vreplvei.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx) | `vreplvei.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m128i __lsx_vsat_b (__m128i a, imm0_7 imm) | `vsat.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp signed 8-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_bu (__m128i a, imm0_7 imm) | `vsat.bu vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp unsigned 8-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_d (__m128i a, imm0_63 imm) | `vsat.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp signed 64-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_du (__m128i a, imm0_63 imm) | `vsat.du vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp unsigned 64-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_h (__m128i a, imm0_15 imm) | `vsat.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp signed 16-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_hu (__m128i a, imm0_15 imm) | `vsat.hu vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp unsigned 16-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_w (__m128i a, imm0_31 imm) | `vsat.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp signed 32-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsat_wu (__m128i a, imm0_31 imm) | `vsat.wu vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Clamp unsigned 32-bit elements in `a` to range specified by `imm`. | | __m128i __lsx_vsigncov_b (__m128i a, __m128i b) | `vsigncov.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | If the 8-bit element in `a` equals to zero, set the result to zero. If the signed 8-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m128i __lsx_vsigncov_d (__m128i a, __m128i b) | `vsigncov.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | If the 64-bit element in `a` equals to zero, set the result to zero. If the signed 64-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m128i __lsx_vsigncov_h (__m128i a, __m128i b) | `vsigncov.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | If the 16-bit element in `a` equals to zero, set the result to zero. If the signed 16-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m128i __lsx_vsigncov_w (__m128i a, __m128i b) | `vsigncov.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | If the 32-bit element in `a` equals to zero, set the result to zero. If the signed 32-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | int __lsx_vpickve2gr_b (__m128i a, imm0_15 idx) | `vpickve2gr.b r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | int __lsx_vpickve2gr_h (__m128i a, imm0_7 idx) | `vpickve2gr.h r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | int __lsx_vpickve2gr_w (__m128i a, imm0_3 idx) | `vpickve2gr.w r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | long int __lsx_vpickve2gr_d (__m128i a, imm0_1 idx) | `vpickve2gr.d r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned int __lsx_vpickve2gr_bu (__m128i a, imm0_15 idx) | `vpickve2gr.bu r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned int __lsx_vpickve2gr_hu (__m128i a, imm0_7 idx) | `vpickve2gr.hu r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned int __lsx_vpickve2gr_wu (__m128i a, imm0_3 idx) | `vpickve2gr.wu r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned long int __lsx_vpickve2gr_du (__m128i a, imm0_1 idx) | `vpickve2gr.du r, vr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Pick the `lane` specified by `idx` from `a` and store into `dst`. | --- ## Permutation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm) | `vpermi.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`. | --- ## Shift | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vbsll_v (__m128i a, imm0_31 imm) | `vbsll.v vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute whole vector `a` shifted left by `imm * 8` bits. | | __m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm) | `vbsrl.v vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Compute whole vector `a` shifted right by `imm * 8` bits. | | __m128i __lsx_vrotr_b (__m128i a, __m128i b) | `vrotr.b vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vrotr_d (__m128i a, __m128i b) | `vrotr.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vrotr_h (__m128i a, __m128i b) | `vrotr.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vrotr_w (__m128i a, __m128i b) | `vrotr.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vrotri_b (__m128i a, imm0_7 imm) | `vrotri.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vrotri_d (__m128i a, imm0_63 imm) | `vrotri.d vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vrotri_h (__m128i a, imm0_15 imm) | `vrotri.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vrotri_w (__m128i a, imm0_31 imm) | `vrotri.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Rotate right the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsll_b (__m128i a, __m128i b) | `vsll.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsll_d (__m128i a, __m128i b) | `vsll.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsll_h (__m128i a, __m128i b) | `vsll.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsll_w (__m128i a, __m128i b) | `vsll.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vslli_b (__m128i a, imm0_7 imm) | `vslli.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vslli_d (__m128i a, imm0_63 imm) | `vslli.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vslli_h (__m128i a, imm0_15 imm) | `vslli.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vslli_w (__m128i a, imm0_31 imm) | `vslli.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical left shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsllwil_d_w (__m128i a, imm0_31 imm) | `vsllwil.d.w vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift signed 32-bit elements in `a` by `imm` to signed 64-bit result. | | __m128i __lsx_vsllwil_du_wu (__m128i a, imm0_31 imm) | `vsllwil.du.wu vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift unsigned 32-bit elements in `a` by `imm` to unsigned 64-bit result. | | __m128i __lsx_vsllwil_h_b (__m128i a, imm0_7 imm) | `vsllwil.h.b vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift signed 8-bit elements in `a` by `imm` to signed 16-bit result. | | __m128i __lsx_vsllwil_hu_bu (__m128i a, imm0_7 imm) | `vsllwil.hu.bu vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift unsigned 8-bit elements in `a` by `imm` to unsigned 16-bit result. | | __m128i __lsx_vsllwil_w_h (__m128i a, imm0_15 imm) | `vsllwil.w.h vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift signed 16-bit elements in `a` by `imm` to signed 32-bit result. | | __m128i __lsx_vsllwil_wu_hu (__m128i a, imm0_15 imm) | `vsllwil.wu.hu vr, vr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Extend and shift unsigned 16-bit elements in `a` by `imm` to unsigned 32-bit result. | | __m128i __lsx_vsra_b (__m128i a, __m128i b) | `vsra.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsra_d (__m128i a, __m128i b) | `vsra.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsra_h (__m128i a, __m128i b) | `vsra.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsra_w (__m128i a, __m128i b) | `vsra.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrai_b (__m128i a, imm0_7 imm) | `vsrai.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrai_d (__m128i a, imm0_63 imm) | `vsrai.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrai_h (__m128i a, imm0_15 imm) | `vsrai.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrai_w (__m128i a, imm0_31 imm) | `vsrai.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Arithmetic right shift the signed 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsran_b_h (__m128i a, __m128i b) | `vsran.b.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsran_h_w (__m128i a, __m128i b) | `vsran.h.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsran_w_d (__m128i a, __m128i b) | `vsran.w.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrani_b_h (__m128i a, __m128i b, imm0_15 imm) | `vsrani.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrani_d_q (__m128i a, __m128i b, imm0_127 imm) | `vsrani.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m128i __lsx_vsrani_h_w (__m128i a, __m128i b, imm0_31 imm) | `vsrani.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrani_w_d (__m128i a, __m128i b, imm0_63 imm) | `vsrani.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrar_b (__m128i a, __m128i b) | `vsrar.b vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrar_d (__m128i a, __m128i b) | `vsrar.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrar_h (__m128i a, __m128i b) | `vsrar.h vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrar_w (__m128i a, __m128i b) | `vsrar.w vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrari_b (__m128i a, imm0_7 imm) | `vsrari.b vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrari_d (__m128i a, imm0_63 imm) | `vsrari.d vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrari_h (__m128i a, imm0_15 imm) | `vsrari.h vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrari_w (__m128i a, imm0_31 imm) | `vsrari.w vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrarn_b_h (__m128i a, __m128i b) | `vsrarn.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrarn_h_w (__m128i a, __m128i b) | `vsrarn.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrarn_w_d (__m128i a, __m128i b) | `vsrarn.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrarni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vsrarni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrarni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vsrarni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m128i __lsx_vsrarni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vsrarni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrarni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vsrarni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrl_b (__m128i a, __m128i b) | `vsrl.b vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrl_d (__m128i a, __m128i b) | `vsrl.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrl_h (__m128i a, __m128i b) | `vsrl.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrl_w (__m128i a, __m128i b) | `vsrl.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrli_b (__m128i a, imm0_7 imm) | `vsrli.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrli_d (__m128i a, imm0_63 imm) | `vsrli.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrli_h (__m128i a, imm0_15 imm) | `vsrli.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrli_w (__m128i a, imm0_31 imm) | `vsrli.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Logical right shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrln_b_h (__m128i a, __m128i b) | `vsrln.b.h vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrln_h_w (__m128i a, __m128i b) | `vsrln.h.w vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrln_w_d (__m128i a, __m128i b) | `vsrln.w.d vr, vr, vr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2; 2K1000LA/LA264: L=2, IPC=0.5(1/2); 2K3000/LA364E: L=2, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrlni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vsrlni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrlni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vsrlni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m128i __lsx_vsrlni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vsrlni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrlni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vsrlni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrlr_b (__m128i a, __m128i b) | `vsrlr.b vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrlr_d (__m128i a, __m128i b) | `vsrlr.d vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrlr_h (__m128i a, __m128i b) | `vsrlr.h vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrlr_w (__m128i a, __m128i b) | `vsrlr.w vr, vr, vr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m128i __lsx_vsrlri_b (__m128i a, imm0_7 imm) | `vsrlri.b vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrlri_d (__m128i a, imm0_63 imm) | `vsrlri.d vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrlri_h (__m128i a, imm0_15 imm) | `vsrlri.h vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrlri_w (__m128i a, imm0_31 imm) | `vsrlri.w vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m128i __lsx_vsrlrn_b_h (__m128i a, __m128i b) | `vsrlrn.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrlrn_h_w (__m128i a, __m128i b) | `vsrlrn.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrlrn_w_d (__m128i a, __m128i b) | `vsrlrn.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vsrlrni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vsrlrni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m128i __lsx_vsrlrni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vsrlrni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m128i __lsx_vsrlrni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vsrlrni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m128i __lsx_vsrlrni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vsrlrni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m128i __lsx_vssran_b_h (__m128i a, __m128i b) | `vssran.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssran_bu_h (__m128i a, __m128i b) | `vssran.bu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssran_h_w (__m128i a, __m128i b) | `vssran.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssran_hu_w (__m128i a, __m128i b) | `vssran.hu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssran_w_d (__m128i a, __m128i b) | `vssran.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssran_wu_d (__m128i a, __m128i b) | `vssran.wu.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_b_h (__m128i a, __m128i b, imm0_15 imm) | `vssrani.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_bu_h (__m128i a, __m128i b, imm0_15 imm) | `vssrani.bu.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_d_q (__m128i a, __m128i b, imm0_127 imm) | `vssrani.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_du_q (__m128i a, __m128i b, imm0_127 imm) | `vssrani.du.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_h_w (__m128i a, __m128i b, imm0_31 imm) | `vssrani.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_hu_w (__m128i a, __m128i b, imm0_31 imm) | `vssrani.hu.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_w_d (__m128i a, __m128i b, imm0_63 imm) | `vssrani.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrani_wu_d (__m128i a, __m128i b, imm0_63 imm) | `vssrani.wu.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_b_h (__m128i a, __m128i b) | `vssrarn.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_bu_h (__m128i a, __m128i b) | `vssrarn.bu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_h_w (__m128i a, __m128i b) | `vssrarn.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_hu_w (__m128i a, __m128i b) | `vssrarn.hu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_w_d (__m128i a, __m128i b) | `vssrarn.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarn_wu_d (__m128i a, __m128i b) | `vssrarn.wu.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vssrarni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_bu_h (__m128i a, __m128i b, imm0_15 imm) | `vssrarni.bu.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vssrarni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_du_q (__m128i a, __m128i b, imm0_127 imm) | `vssrarni.du.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vssrarni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_hu_w (__m128i a, __m128i b, imm0_31 imm) | `vssrarni.hu.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vssrarni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrarni_wu_d (__m128i a, __m128i b, imm0_63 imm) | `vssrarni.wu.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_b_h (__m128i a, __m128i b) | `vssrln.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_bu_h (__m128i a, __m128i b) | `vssrln.bu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_h_w (__m128i a, __m128i b) | `vssrln.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_hu_w (__m128i a, __m128i b) | `vssrln.hu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_w_d (__m128i a, __m128i b) | `vssrln.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrln_wu_d (__m128i a, __m128i b) | `vssrln.wu.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vssrlni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_bu_h (__m128i a, __m128i b, imm0_15 imm) | `vssrlni.bu.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vssrlni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_du_q (__m128i a, __m128i b, imm0_127 imm) | `vssrlni.du.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vssrlni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_hu_w (__m128i a, __m128i b, imm0_31 imm) | `vssrlni.hu.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vssrlni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlni_wu_d (__m128i a, __m128i b, imm0_63 imm) | `vssrlni.wu.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_b_h (__m128i a, __m128i b) | `vssrlrn.b.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_bu_h (__m128i a, __m128i b) | `vssrlrn.bu.h vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_h_w (__m128i a, __m128i b) | `vssrlrn.h.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_hu_w (__m128i a, __m128i b) | `vssrlrn.hu.w vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_w_d (__m128i a, __m128i b) | `vssrlrn.w.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrn_wu_d (__m128i a, __m128i b) | `vssrlrn.wu.d vr, vr, vr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_b_h (__m128i a, __m128i b, imm0_15 imm) | `vssrlrni.b.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_bu_h (__m128i a, __m128i b, imm0_15 imm) | `vssrlrni.bu.h vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_d_q (__m128i a, __m128i b, imm0_127 imm) | `vssrlrni.d.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_du_q (__m128i a, __m128i b, imm0_127 imm) | `vssrlrni.du.q vr, vr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2; 2K1000LA/LA264: L=2, IPC=1; 2K3000/LA364E: L=2, IPC=1 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_h_w (__m128i a, __m128i b, imm0_31 imm) | `vssrlrni.h.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_hu_w (__m128i a, __m128i b, imm0_31 imm) | `vssrlrni.hu.w vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_w_d (__m128i a, __m128i b, imm0_63 imm) | `vssrlrni.w.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m128i __lsx_vssrlrni_wu_d (__m128i a, __m128i b, imm0_63 imm) | `vssrlrni.wu.d vr, vr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=3, IPC=0.5(1/2); 2K3000/LA364E: L=3, IPC=0.5(1/2) | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | --- ## Shuffling | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128i __lsx_vshuf4i_b (__m128i a, imm0_255 imm) | `vshuf4i.b vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle every four 8-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/vshuf4i_b.svg) | | __m128i __lsx_vshuf4i_d (__m128i a, __m128i b, imm0_255 imm) | `vshuf4i.d vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle every four 64-bit elements in `a` and `b` with indices packed in `imm`, save the result to `dst`. ![](../diagram/vshuf4i_d.svg) | | __m128i __lsx_vshuf4i_h (__m128i a, imm0_255 imm) | `vshuf4i.h vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle every four 16-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/vshuf4i_h.svg) | | __m128i __lsx_vshuf4i_w (__m128i a, imm0_255 imm) | `vshuf4i.w vr, vr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle every four 32-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/vshuf4i_w.svg) | | __m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c) | `vshuf.b vr, vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle bytes from `a` and `b` with indices from `c`. Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics, they are placed in `a`. ![](../diagram/vshuf_b.svg) | | __m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c) | `vshuf.d vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle 64-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/vshuf_d.svg) | | __m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c) | `vshuf.h vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle 16-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/vshuf_h.svg) | | __m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c) | `vshuf.w vr, vr, vr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2; 2K1000LA/LA264: L=1, IPC=1; 2K3000/LA364E: L=1, IPC=1 | Shuffle 32-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/vshuf_w.svg) | --- ## Undocumented Intrinsics | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m128 __lsx_vfscaleb_s (__m128 a, __m128i b) | `vfscaleb.s vr, vr, vr` | 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute IEEE754 scaleB of single precision floating point elements in `a` by integer elements in `b`. Currently undocumented. | | __m128d __lsx_vfscaleb_d (__m128d a, __m128i b) | `vfscaleb.d vr, vr, vr` | 3C6000/LA664: L=4, IPC=2; 2K1000LA/LA264: L=4, IPC=1; 2K3000/LA364E: L=4, IPC=1 | Compute IEEE754 scaleB of double precision floating point elements in `a` by integer elements in `b`. Currently undocumented. | | __m128i __lsx_vmepatmsk_v (int mode, int uimm5) | `vmepatmsk.v vr, mode, uimm5` | 3C6000/LA664: L=N/A, IPC=4; 2K1000LA/LA264: L=N/A, IPC=1; 2K3000/LA364E: L=N/A, IPC=1 | Compute pattern according to `mode`, then add `uimm5` to each element. | --- # LASX 速查表 ## Bitwise Operations | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvbitclr_b (__m256i a, __m256i b) | `xvbitclr.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclr_d (__m256i a, __m256i b) | `xvbitclr.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclr_h (__m256i a, __m256i b) | `xvbitclr.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclr_w (__m256i a, __m256i b) | `xvbitclr.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclri_b (__m256i a, imm0_7 imm) | `xvbitclri.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclri_d (__m256i a, imm0_63 imm) | `xvbitclri.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclri_h (__m256i a, imm0_15 imm) | `xvbitclri.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitclri_w (__m256i a, imm0_31 imm) | `xvbitclri.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clear the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrev_b (__m256i a, __m256i b) | `xvbitrev.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrev_d (__m256i a, __m256i b) | `xvbitrev.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrev_h (__m256i a, __m256i b) | `xvbitrev.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrev_w (__m256i a, __m256i b) | `xvbitrev.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrevi_b (__m256i a, imm0_7 imm) | `xvbitrevi.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrevi_d (__m256i a, imm0_63 imm) | `xvbitrevi.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrevi_h (__m256i a, imm0_15 imm) | `xvbitrevi.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitrevi_w (__m256i a, imm0_31 imm) | `xvbitrevi.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Toggle the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitsel_v (__m256i a, __m256i b, __m256i c) | `xvbitsel.v xr, xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Compute bitwise selection: for each bit position, if the bit in `c` equals to one, copy the bit from `b` to `dst`, otherwise copy from `a`. | | __m256i __lasx_xvbitseli_b (__m256i a, __m256i b, imm0_255 imm) | `xvbitseli.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Compute bitwise selection: for each bit position, if the bit in `a` equals to one, copy the bit from `imm` to `dst`, otherwise copy from `b`. | | __m256i __lasx_xvbitset_b (__m256i a, __m256i b) | `xvbitset.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by elements in `b` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitset_d (__m256i a, __m256i b) | `xvbitset.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by elements in `b` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitset_h (__m256i a, __m256i b) | `xvbitset.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by elements in `b` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitset_w (__m256i a, __m256i b) | `xvbitset.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by elements in `b` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitseti_b (__m256i a, imm0_7 imm) | `xvbitseti.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by `imm` from 8-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitseti_d (__m256i a, imm0_63 imm) | `xvbitseti.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by `imm` from 64-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitseti_h (__m256i a, imm0_15 imm) | `xvbitseti.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by `imm` from 16-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvbitseti_w (__m256i a, imm0_31 imm) | `xvbitseti.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Set the bit specified by `imm` from 32-bit elements in `a`, save the result in `dst`. | | __m256i __lasx_xvclo_b (__m256i a) | `xvclo.b xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading ones of 8-bit elements in `a`. | | __m256i __lasx_xvclo_d (__m256i a) | `xvclo.d xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading ones of 64-bit elements in `a`. | | __m256i __lasx_xvclo_h (__m256i a) | `xvclo.h xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading ones of 16-bit elements in `a`. | | __m256i __lasx_xvclo_w (__m256i a) | `xvclo.w xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading ones of 32-bit elements in `a`. | | __m256i __lasx_xvclz_b (__m256i a) | `xvclz.b xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading zeros of 8-bit elements in `a`. | | __m256i __lasx_xvclz_d (__m256i a) | `xvclz.d xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading zeros of 64-bit elements in `a`. | | __m256i __lasx_xvclz_h (__m256i a) | `xvclz.h xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading zeros of 16-bit elements in `a`. | | __m256i __lasx_xvclz_w (__m256i a) | `xvclz.w xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Count leading zeros of 32-bit elements in `a`. | | __m256i __lasx_xvpcnt_b (__m256i a) | `xvpcnt.b xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Count the number of ones (population, popcount) in 8-bit elements in `a`. | | __m256i __lasx_xvpcnt_d (__m256i a) | `xvpcnt.d xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Count the number of ones (population, popcount) in 64-bit elements in `a`. | | __m256i __lasx_xvpcnt_h (__m256i a) | `xvpcnt.h xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Count the number of ones (population, popcount) in 16-bit elements in `a`. | | __m256i __lasx_xvpcnt_w (__m256i a) | `xvpcnt.w xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Count the number of ones (population, popcount) in 32-bit elements in `a`. | --- ## Branch | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | int __lasx_xbnz_b (__m256i a) | `xvsetallnez.b fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if all 8-bit elements in `a` are non-zero. | | int __lasx_xbnz_d (__m256i a) | `xvsetallnez.d fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if all 64-bit elements in `a` are non-zero. | | int __lasx_xbnz_h (__m256i a) | `xvsetallnez.h fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if all 16-bit elements in `a` are non-zero. | | int __lasx_xbnz_v (__m256i a) | `xvsetnez.v fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if the whole vector `a` is non-zero. | | int __lasx_xbnz_w (__m256i a) | `xvsetallnez.w fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if all 32-bit elements in `a` are non-zero. | | int __lasx_xbz_b (__m256i a) | `xvsetanyeqz.b fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if any 8-bit element in `a` equals to zero. | | int __lasx_xbz_d (__m256i a) | `xvsetanyeqz.d fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if any 64-bit element in `a` equals to zero. | | int __lasx_xbz_h (__m256i a) | `xvsetanyeqz.h fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if any 16-bit element in `a` equals to zero. | | int __lasx_xbz_v (__m256i a) | `xvseteqz.v fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if the whole vector `a` equals to zero. | | int __lasx_xbz_w (__m256i a) | `xvsetanyeqz.w fcc, xr; bcnez` | 3C5000/LA464: L=N/A, IPC=2; 3A6000/LA664: L=N/A, IPC=2; 3C6000/LA664: L=N/A, IPC=2 | Expected to be used in branches: branch if any 32-bit element in `a` equals to zero. | --- ## Floating Point Comparison | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvfcmp_caf_d (__m256d a, __m256d b) | `xvfcmp.caf.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_caf_s (__m256 a, __m256 b) | `xvfcmp.caf.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_ceq_d (__m256d a, __m256d b) | `xvfcmp.ceq.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_ceq_s (__m256 a, __m256 b) | `xvfcmp.ceq.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cle_d (__m256d a, __m256d b) | `xvfcmp.cle.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cle_s (__m256 a, __m256 b) | `xvfcmp.cle.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_clt_d (__m256d a, __m256d b) | `xvfcmp.clt.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_clt_s (__m256 a, __m256 b) | `xvfcmp.clt.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cne_d (__m256d a, __m256d b) | `xvfcmp.cne.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cne_s (__m256 a, __m256 b) | `xvfcmp.cne.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cor_d (__m256d a, __m256d b) | `xvfcmp.cor.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cor_s (__m256 a, __m256 b) | `xvfcmp.cor.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cueq_d (__m256d a, __m256d b) | `xvfcmp.cueq.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cueq_s (__m256 a, __m256 b) | `xvfcmp.cueq.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cule_d (__m256d a, __m256d b) | `xvfcmp.cule.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cule_s (__m256 a, __m256 b) | `xvfcmp.cule.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cult_d (__m256d a, __m256d b) | `xvfcmp.cult.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cult_s (__m256 a, __m256 b) | `xvfcmp.cult.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cun_d (__m256d a, __m256d b) | `xvfcmp.cun.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cun_s (__m256 a, __m256 b) | `xvfcmp.cun.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cune_d (__m256d a, __m256d b) | `xvfcmp.cune.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_cune_s (__m256 a, __m256 b) | `xvfcmp.cune.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Do not trap for QNaN. | | __m256i __lasx_xvfcmp_saf_d (__m256d a, __m256d b) | `xvfcmp.saf.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_saf_s (__m256 a, __m256 b) | `xvfcmp.saf.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if AF(Always False), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_seq_d (__m256d a, __m256d b) | `xvfcmp.seq.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_seq_s (__m256 a, __m256 b) | `xvfcmp.seq.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sle_d (__m256d a, __m256d b) | `xvfcmp.sle.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sle_s (__m256 a, __m256 b) | `xvfcmp.sle.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_slt_d (__m256d a, __m256d b) | `xvfcmp.slt.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_slt_s (__m256 a, __m256 b) | `xvfcmp.slt.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if LT(Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sne_d (__m256d a, __m256d b) | `xvfcmp.sne.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sne_s (__m256 a, __m256 b) | `xvfcmp.sne.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sor_d (__m256d a, __m256d b) | `xvfcmp.sor.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sor_s (__m256 a, __m256 b) | `xvfcmp.sor.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sueq_d (__m256d a, __m256d b) | `xvfcmp.sueq.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sueq_s (__m256 a, __m256 b) | `xvfcmp.sueq.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sule_d (__m256d a, __m256d b) | `xvfcmp.sule.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sule_s (__m256 a, __m256 b) | `xvfcmp.sule.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sult_d (__m256d a, __m256d b) | `xvfcmp.sult.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sult_s (__m256 a, __m256 b) | `xvfcmp.sult.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sun_d (__m256d a, __m256d b) | `xvfcmp.sun.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sun_s (__m256 a, __m256 b) | `xvfcmp.sun.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sune_d (__m256d a, __m256d b) | `xvfcmp.sune.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare double precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | | __m256i __lasx_xvfcmp_sune_s (__m256 a, __m256 b) | `xvfcmp.sune.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare single precision elements in `a` and `b`, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into `dst`. Trap for QNaN. | --- ## Floating Point Computation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvfadd_s (__m256 a, __m256 b) | `xvfadd.s xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Add single precision floating point elements in `a` to elements in `b`. | | __m256 __lasx_xvfdiv_s (__m256 a, __m256 b) | `xvfdiv.s xr, xr, xr` | 3C5000/LA464: L=11, 19.5, IPC=0.1(1/10.5); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5) | Divide single precision floating point elements in `a` by elements in `b`. | | __m256 __lasx_xvflogb_s (__m256 a) | `xvflogb.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Compute 2-based logarithm of single precision floating point elements in `a`. | | __m256 __lasx_xvfmax_s (__m256 a, __m256 b) | `xvfmax.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute maximum of single precision floating point elements in `a` and `b`. | | __m256 __lasx_xvfmaxa_s (__m256 a, __m256 b) | `xvfmaxa.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute maximum of single precision floating point elements in `a` and `b` by magnitude. | | __m256 __lasx_xvfmin_s (__m256 a, __m256 b) | `xvfmin.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute minimum of single precision floating point elements in `a` and `b`. | | __m256 __lasx_xvfmina_s (__m256 a, __m256 b) | `xvfmina.s xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute minimum of single precision floating point elements in `a` and `b` by magnitude. | | __m256 __lasx_xvfmul_s (__m256 a, __m256 b) | `xvfmul.s xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Multiply single precision floating point elements in `a` and elements in `b`. | | __m256 __lasx_xvfrecip_s (__m256 a) | `xvfrecip.s xr, xr` | 3C5000/LA464: L=27, IPC=0.14(1/7); 3A6000/LA664: L=27, IPC=0.18(1/5.5); 3C6000/LA664: L=27, IPC=0.12(1/8.5) | Compute reciprocal of single precision floating point elements in `a`. | | __m256 __lasx_xvfrecipe_s (__m256 a) | `xvfrecipe.s xr, xr` | 未提供 | Compute estimated reciprocal of single precision floating point elements in `a`. | | __m256 __lasx_xvfrsqrt_s (__m256 a) | `xvfrsqrt.s xr, xr` | 3C5000/LA464: L=25, IPC=0.03(1/32); 3A6000/LA664: L=25, IPC=0.05(1/19); 3C6000/LA664: L=21, IPC=0.11(1/9.5) | Compute reciprocal of square root of single precision floating point elements in `a`. | | __m256 __lasx_xvfrsqrte_s (__m256 a) | `xvfrsqrte.s xr, xr` | 未提供 | Compute estimated reciprocal of square root of single precision floating point elements in `a`. | | __m256 __lasx_xvfsqrt_s (__m256 a) | `xvfsqrt.s xr, xr` | 3C5000/LA464: L=15, IPC=0.07(1/13.5); 3A6000/LA664: L=15, IPC=0.08(1/12); 3C6000/LA664: L=25, IPC=0.09(1/11.5) | Compute square root of single precision floating point elements in `a`. | | __m256 __lasx_xvfsub_s (__m256 a, __m256 b) | `xvfsub.s xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Subtract single precision floating point elements in `a` by elements in `b`. | | __m256d __lasx_xvfadd_d (__m256d a, __m256d b) | `xvfadd.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Add double precision floating point elements in `a` to elements in `b`. | | __m256d __lasx_xvfdiv_d (__m256d a, __m256d b) | `xvfdiv.d xr, xr, xr` | 3C5000/LA464: L=8, 17, IPC=0.08(1/12.5); 3A6000/LA664: L=8, 21.5, IPC=0.25(1/4); 3C6000/LA664: L=8, 16.5, IPC=0.33(1/3) | Divide double precision floating point elements in `a` by elements in `b`. | | __m256d __lasx_xvflogb_d (__m256d a) | `xvflogb.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Compute 2-based logarithm of double precision floating point elements in `a`. | | __m256d __lasx_xvfmax_d (__m256d a, __m256d b) | `xvfmax.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute maximum of double precision floating point elements in `a` and `b`. | | __m256d __lasx_xvfmaxa_d (__m256d a, __m256d b) | `xvfmaxa.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute maximum of double precision floating point elements in `a` and `b` by magnitude. | | __m256d __lasx_xvfmin_d (__m256d a, __m256d b) | `xvfmin.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute minimum of double precision floating point elements in `a` and `b`. | | __m256d __lasx_xvfmina_d (__m256d a, __m256d b) | `xvfmina.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute minimum of double precision floating point elements in `a` and `b` by magnitude. | | __m256d __lasx_xvfmul_d (__m256d a, __m256d b) | `xvfmul.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Multiply double precision floating point elements in `a` and elements in `b`. | | __m256d __lasx_xvfrecip_d (__m256d a) | `xvfrecip.d xr, xr` | 3C5000/LA464: L=23, IPC=0.08(1/12); 3A6000/LA664: L=23, IPC=0.25(1/4); 3C6000/LA664: L=23, IPC=0.1(1/10.5) | Compute reciprocal of double precision floating point elements in `a`. | | __m256d __lasx_xvfrecipe_d (__m256d a) | `xvfrecipe.d xr, xr` | 未提供 | Compute estimated reciprocal of double precision floating point elements in `a`. | | __m256d __lasx_xvfrsqrt_d (__m256d a) | `xvfrsqrt.d xr, xr` | 3C5000/LA464: L=15, IPC=0.04(1/27.5); 3A6000/LA664: L=15, IPC=0.04(1/26.5); 3C6000/LA664: L=15, IPC=0.04(1/26) | Compute reciprocal of square root of double precision floating point elements in `a`. | | __m256d __lasx_xvfrsqrte_d (__m256d a) | `xvfrsqrte.d xr, xr` | 未提供 | Compute estimated reciprocal of square root of double precision floating point elements in `a`. | | __m256d __lasx_xvfsqrt_d (__m256d a) | `xvfsqrt.d xr, xr` | 3C5000/LA464: L=36, IPC=0.05(1/18.5); 3A6000/LA664: L=36, IPC=0.06(1/17.5); 3C6000/LA664: L=36, IPC=0.06(1/17) | Compute square root of double precision floating point elements in `a`. | | __m256d __lasx_xvfsub_d (__m256d a, __m256d b) | `xvfsub.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Subtract double precision floating point elements in `a` by elements in `b`. | --- ## Floating Point Conversion | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvfcvt_s_d (__m256d a, __m256d b) | `xvfcvt.s.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert double precision floating point elements in `a` and `b` to single precision. | | __m256 __lasx_xvfcvth_s_h (__m256i a) | `xvfcvth.s.h xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert half precision floating point elements in higher half of `a` to single precision. | | __m256 __lasx_xvfcvtl_s_h (__m256i a) | `xvfcvtl.s.h xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert half precision floating point elements in lower half of `a` to single precision. | | __m256 __lasx_xvffint_s_l (__m256i a, __m256i b) | `xvffint.s.l xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert 64-bit integer elements in `a` and `b` to single-precision floating point numbers. | | __m256 __lasx_xvffint_s_w (__m256i a) | `xvffint.s.w xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert signed 32-bit integer elements in `a` to single-precision floating point numbers. | | __m256 __lasx_xvffint_s_wu (__m256i a) | `xvffint.s.wu xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert unsigned 32-bit integer elements in `a` to single-precision floating point numbers. | | __m256d __lasx_xvfcvth_d_s (__m256 a) | `xvfcvth.d.s xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert single precision floating point elements in higher half of `a` to double precision. | | __m256d __lasx_xvfcvtl_d_s (__m256 a) | `xvfcvtl.d.s xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert single precision floating point elements in lower half of `a` to double precision. | | __m256d __lasx_xvffint_d_l (__m256i a) | `xvffint.d.l xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert signed 64-bit integer elements in `a` to double-precision floating point numbers. | | __m256d __lasx_xvffint_d_lu (__m256i a) | `xvffint.d.lu xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert unsigned 64-bit integer elements in `a` to double-precision floating point numbers. | | __m256d __lasx_xvffinth_d_w (__m256i a) | `xvffinth.d.w xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert 32-bit integer elements in higher part of `a` to double precision floating point numbers. | | __m256d __lasx_xvffintl_d_w (__m256i a) | `xvffintl.d.w xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert 32-bit integer elements in lower part of `a` to double precision floating point numbers. | | __m256i __lasx_xvfcvt_h_s (__m256 a, __m256 b) | `xvfcvt.h.s xr, xr, xr` | 3C5000/LA464: L=3, IPC=1; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Convert single precision floating point elements in `a` and `b` to half precision. | | __m256i __lasx_xvftint_l_d (__m256d a) | `xvftint.l.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to signed 64-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftint_lu_d (__m256d a) | `xvftint.lu.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to unsigned 64-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftint_w_d (__m256d a, __m256d b) | `xvftint.w.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftint_w_s (__m256 a) | `xvftint.w.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to signed 32-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftint_wu_s (__m256 a) | `xvftint.wu.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to unsigned 32-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftinth_l_s (__m256 a) | `xvftinth.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftintl_l_s (__m256 a) | `xvftintl.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, using current rounding mode specified in `fscr`. | | __m256i __lasx_xvftintrm_l_d (__m256d a) | `xvftintrm.l.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards negative infinity. | | __m256i __lasx_xvftintrm_w_d (__m256d a, __m256d b) | `xvftintrm.w.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards negative infinity. | | __m256i __lasx_xvftintrm_w_s (__m256 a) | `xvftintrm.w.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards negative infinity. | | __m256i __lasx_xvftintrmh_l_s (__m256 a) | `xvftintrmh.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards negative infinity. | | __m256i __lasx_xvftintrml_l_s (__m256 a) | `xvftintrml.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards negative infinity. | | __m256i __lasx_xvftintrne_l_d (__m256d a) | `xvftintrne.l.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards nearest even. | | __m256i __lasx_xvftintrne_w_d (__m256d a, __m256d b) | `xvftintrne.w.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards nearest even. | | __m256i __lasx_xvftintrne_w_s (__m256 a) | `xvftintrne.w.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards nearest even. | | __m256i __lasx_xvftintrneh_l_s (__m256 a) | `xvftintrneh.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards nearest even. | | __m256i __lasx_xvftintrnel_l_s (__m256 a) | `xvftintrnel.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards nearest even. | | __m256i __lasx_xvftintrp_l_d (__m256d a) | `xvftintrp.l.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards positive infinity. | | __m256i __lasx_xvftintrp_w_d (__m256d a, __m256d b) | `xvftintrp.w.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards positive infinity. | | __m256i __lasx_xvftintrp_w_s (__m256 a) | `xvftintrp.w.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards positive infinity. | | __m256i __lasx_xvftintrph_l_s (__m256 a) | `xvftintrph.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards positive infinity. | | __m256i __lasx_xvftintrpl_l_s (__m256 a) | `xvftintrpl.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards positive infinity. | | __m256i __lasx_xvftintrz_l_d (__m256d a) | `xvftintrz.l.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to signed 64-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrz_lu_d (__m256d a) | `xvftintrz.lu.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert double-precision floating point elements in `a` to unsigned 64-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrz_w_d (__m256d a, __m256d b) | `xvftintrz.w.d xr, xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert double-precision floating point elements in `a` and `b` to 32-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrz_w_s (__m256 a) | `xvftintrz.w.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to signed 32-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrz_wu_s (__m256 a) | `xvftintrz.wu.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=4; 3C6000/LA664: L=4, IPC=4 | Convert single-precision floating point elements in `a` to unsigned 32-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrzh_l_s (__m256 a) | `xvftintrzh.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in higher part of `a` to 64-bit integer, rounding towards zero. | | __m256i __lasx_xvftintrzl_l_s (__m256 a) | `xvftintrzl.l.s xr, xr` | 3C5000/LA464: L=5, IPC=1; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Convert single-precision floating point elements in lower part of `a` to 64-bit integer, rounding towards zero. | --- ## Floating Point Misc | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvfrint_s (__m256 a) | `xvfrint.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers. | | __m256 __lasx_xvfrintrm_s (__m256 a) | `xvfrintrm.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers. | | __m256 __lasx_xvfrintrne_s (__m256 a) | `xvfrintrne.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers. | | __m256 __lasx_xvfrintrp_s (__m256 a) | `xvfrintrp.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers. | | __m256 __lasx_xvfrintrz_s (__m256 a) | `xvfrintrz.s xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers. | | __m256d __lasx_xvfrint_d (__m256d a) | `xvfrint.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, using current rounding mode specified in `fscr`, and store as floating point numbers. | | __m256d __lasx_xvfrintrm_d (__m256d a) | `xvfrintrm.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards negative infinity, and store as floating point numbers. | | __m256d __lasx_xvfrintrne_d (__m256d a) | `xvfrintrne.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards nearest even, and store as floating point numbers. | | __m256d __lasx_xvfrintrp_d (__m256d a) | `xvfrintrp.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards positive infinity, and store as floating point numbers. | | __m256d __lasx_xvfrintrz_d (__m256d a) | `xvfrintrz.d xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Round single-precision floating point elements in `a` to integers, rounding towards zero, and store as floating point numbers. | | __m256i __lasx_xvfclass_d (__m256d a) | `xvfclass.d xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Classifiy each double precision floating point elements in `a`. | | __m256i __lasx_xvfclass_s (__m256 a) | `xvfclass.s xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Classifiy each single precision floating point elements in `a`. | --- ## Fused Multiply-Add | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvfmadd_s (__m256 a, __m256 b, __m256 c) | `xvfmadd.s xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`. | | __m256 __lasx_xvfmsub_s (__m256 a, __m256 b, __m256 c) | `xvfmsub.s xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`. | | __m256 __lasx_xvfnmadd_s (__m256 a, __m256 b, __m256 c) | `xvfnmadd.s xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`. | | __m256 __lasx_xvfnmsub_s (__m256 a, __m256 b, __m256 c) | `xvfnmsub.s xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`. | | __m256d __lasx_xvfmadd_d (__m256d a, __m256d b, __m256d c) | `xvfmadd.d xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the result in `dst`. | | __m256d __lasx_xvfmsub_d (__m256d a, __m256d b, __m256d c) | `xvfmsub.d xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the result in `dst`. | | __m256d __lasx_xvfnmadd_d (__m256d a, __m256d b, __m256d c) | `xvfnmadd.d xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, accumulate to elements in `c` and store the negated result in `dst`. | | __m256d __lasx_xvfnmsub_d (__m256d a, __m256d b, __m256d c) | `xvfnmsub.d xr, xr, xr, xr` | 3C5000/LA464: L=5, IPC=2; 3A6000/LA664: L=5, IPC=2; 3C6000/LA664: L=5, IPC=2 | Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in `a` and `b`, subtract elements in `c` and store the negated result in `dst`. | --- ## Integer Comparison | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvseq_b (__m256i a, __m256i b) | `xvseq.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 8-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseq_d (__m256i a, __m256i b) | `xvseq.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 64-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseq_h (__m256i a, __m256i b) | `xvseq.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 16-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseq_w (__m256i a, __m256i b) | `xvseq.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 32-bit elements in `a` and `b`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseqi_b (__m256i a, imm_n16_15 imm) | `xvseqi.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 8-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseqi_d (__m256i a, imm_n16_15 imm) | `xvseqi.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 64-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseqi_h (__m256i a, imm_n16_15 imm) | `xvseqi.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 16-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvseqi_w (__m256i a, imm_n16_15 imm) | `xvseqi.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the 32-bit elements in `a` and `imm`, store all-ones to `dst` if equal, zero otherwise. | | __m256i __lasx_xvsle_b (__m256i a, __m256i b) | `xvsle.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_bu (__m256i a, __m256i b) | `xvsle.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_d (__m256i a, __m256i b) | `xvsle.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_du (__m256i a, __m256i b) | `xvsle.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_h (__m256i a, __m256i b) | `xvsle.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_hu (__m256i a, __m256i b) | `xvsle.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_w (__m256i a, __m256i b) | `xvsle.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvsle_wu (__m256i a, __m256i b) | `xvsle.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `b`, zero otherwise. | | __m256i __lasx_xvslei_b (__m256i a, imm_n16_15 imm) | `xvslei.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_bu (__m256i a, imm0_31 imm) | `xvslei.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_d (__m256i a, imm_n16_15 imm) | `xvslei.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_du (__m256i a, imm0_31 imm) | `xvslei.du xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_h (__m256i a, imm_n16_15 imm) | `xvslei.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_hu (__m256i a, imm0_31 imm) | `xvslei.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_w (__m256i a, imm_n16_15 imm) | `xvslei.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslei_wu (__m256i a, imm0_31 imm) | `xvslei.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than or equal to `imm`, zero otherwise. | | __m256i __lasx_xvslt_b (__m256i a, __m256i b) | `xvslt.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_bu (__m256i a, __m256i b) | `xvslt.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 8-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_d (__m256i a, __m256i b) | `xvslt.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the signed 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_du (__m256i a, __m256i b) | `xvslt.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the unsigned 64-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_h (__m256i a, __m256i b) | `xvslt.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_hu (__m256i a, __m256i b) | `xvslt.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 16-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_w (__m256i a, __m256i b) | `xvslt.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslt_wu (__m256i a, __m256i b) | `xvslt.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 32-bit elements in `a` and `b`, store all-ones to `dst` if corresponding element in `a` is less than `b`, zero otherwise. | | __m256i __lasx_xvslti_b (__m256i a, imm_n16_15 imm) | `xvslti.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_bu (__m256i a, imm0_31 imm) | `xvslti.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 8-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_d (__m256i a, imm_n16_15 imm) | `xvslti.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the signed 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_du (__m256i a, imm0_31 imm) | `xvslti.du xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compare the unsigned 64-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_h (__m256i a, imm_n16_15 imm) | `xvslti.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_hu (__m256i a, imm0_31 imm) | `xvslti.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 16-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_w (__m256i a, imm_n16_15 imm) | `xvslti.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the signed 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | | __m256i __lasx_xvslti_wu (__m256i a, imm0_31 imm) | `xvslti.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compare the unsigned 32-bit elements in `a` and `imm`, store all-ones to `dst` if corresponding element in `a` is less than `imm`, zero otherwise. | --- ## Integer Computation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvabsd_b (__m256i a, __m256i b) | `xvabsd.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_bu (__m256i a, __m256i b) | `xvabsd.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_d (__m256i a, __m256i b) | `xvabsd.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_du (__m256i a, __m256i b) | `xvabsd.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_h (__m256i a, __m256i b) | `xvabsd.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_hu (__m256i a, __m256i b) | `xvabsd.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_w (__m256i a, __m256i b) | `xvabsd.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvabsd_wu (__m256i a, __m256i b) | `xvabsd.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Compute absolute difference of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadd_b (__m256i a, __m256i b) | `xvadd.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadd_d (__m256i a, __m256i b) | `xvadd.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadd_h (__m256i a, __m256i b) | `xvadd.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadd_q (__m256i a, __m256i b) | `xvadd.q xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add 128-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadd_w (__m256i a, __m256i b) | `xvadd.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadda_b (__m256i a, __m256i b) | `xvadda.b xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add absolute of 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadda_d (__m256i a, __m256i b) | `xvadda.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add absolute of 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadda_h (__m256i a, __m256i b) | `xvadda.h xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add absolute of 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvadda_w (__m256i a, __m256i b) | `xvadda.w xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add absolute of 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvaddi_bu (__m256i a, imm0_31 imm) | `xvaddi.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 8-bit elements in `a` and `imm`, save the result in `dst`. | | __m256i __lasx_xvaddi_du (__m256i a, imm0_31 imm) | `xvaddi.du xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 64-bit elements in `a` and `imm`, save the result in `dst`. | | __m256i __lasx_xvaddi_hu (__m256i a, imm0_31 imm) | `xvaddi.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 16-bit elements in `a` and `imm`, save the result in `dst`. | | __m256i __lasx_xvaddi_wu (__m256i a, imm0_31 imm) | `xvaddi.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Add 32-bit elements in `a` and `imm`, save the result in `dst`. | | __m256i __lasx_xvaddwev_d_w (__m256i a, __m256i b) | `xvaddwev.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwev_d_wu (__m256i a, __m256i b) | `xvaddwev.d.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwev_d_wu_w (__m256i a, __m256i b) | `xvaddwev.d.wu.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwev_h_b (__m256i a, __m256i b) | `xvaddwev.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwev_h_bu (__m256i a, __m256i b) | `xvaddwev.h.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwev_h_bu_b (__m256i a, __m256i b) | `xvaddwev.h.bu.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwev_q_d (__m256i a, __m256i b) | `xvaddwev.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwev_q_du (__m256i a, __m256i b) | `xvaddwev.q.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwev_q_du_d (__m256i a, __m256i b) | `xvaddwev.q.du.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwev_w_h (__m256i a, __m256i b) | `xvaddwev.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvaddwev_w_hu (__m256i a, __m256i b) | `xvaddwev.w.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvaddwev_w_hu_h (__m256i a, __m256i b) | `xvaddwev.w.hu.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvaddwod_d_w (__m256i a, __m256i b) | `xvaddwod.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwod_d_wu (__m256i a, __m256i b) | `xvaddwod.d.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwod_d_wu_w (__m256i a, __m256i b) | `xvaddwod.d.wu.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvaddwod_h_b (__m256i a, __m256i b) | `xvaddwod.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwod_h_bu (__m256i a, __m256i b) | `xvaddwod.h.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwod_h_bu_b (__m256i a, __m256i b) | `xvaddwod.h.bu.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvaddwod_q_d (__m256i a, __m256i b) | `xvaddwod.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwod_q_du (__m256i a, __m256i b) | `xvaddwod.q.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwod_q_du_d (__m256i a, __m256i b) | `xvaddwod.q.du.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvaddwod_w_h (__m256i a, __m256i b) | `xvaddwod.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvaddwod_w_hu (__m256i a, __m256i b) | `xvaddwod.w.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvaddwod_w_hu_h (__m256i a, __m256i b) | `xvaddwod.w.hu.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvavg_b (__m256i a, __m256i b) | `xvavg.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_bu (__m256i a, __m256i b) | `xvavg.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_d (__m256i a, __m256i b) | `xvavg.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute the average (rounded towards negative infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_du (__m256i a, __m256i b) | `xvavg.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_h (__m256i a, __m256i b) | `xvavg.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_hu (__m256i a, __m256i b) | `xvavg.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_w (__m256i a, __m256i b) | `xvavg.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavg_wu (__m256i a, __m256i b) | `xvavg.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_b (__m256i a, __m256i b) | `xvavgr.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of signed 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_bu (__m256i a, __m256i b) | `xvavgr.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_d (__m256i a, __m256i b) | `xvavgr.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute the average (rounded towards positive infinity) of signed 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_du (__m256i a, __m256i b) | `xvavgr.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_h (__m256i a, __m256i b) | `xvavgr.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of signed 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_hu (__m256i a, __m256i b) | `xvavgr.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_w (__m256i a, __m256i b) | `xvavgr.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of signed 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvavgr_wu (__m256i a, __m256i b) | `xvavgr.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvdiv_b (__m256i a, __m256i b) | `xvdiv.b xr, xr, xr` | 3C5000/LA464: L=32, 36, IPC=0.05(1/20.5); 3A6000/LA664: L=29, 32, IPC=0.06(1/15.5); 3C6000/LA664: L=55, 57, IPC=0.04(1/27.5) | Divide signed 8-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_bu (__m256i a, __m256i b) | `xvdiv.bu xr, xr, xr` | 3C5000/LA464: L=29, 36, IPC=0.05(1/20.5); 3A6000/LA664: L=29, 33, IPC=0.06(1/16.5); 3C6000/LA664: L=29, 36, IPC=0.07(1/13.5) | Divide unsigned 8-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_d (__m256i a, __m256i b) | `xvdiv.d xr, xr, xr` | 3C5000/LA464: L=8, 18.5, IPC=0.11(1/9); 3A6000/LA664: L=8, IPC=0.25(1/4); 3C6000/LA664: L=18.5, 19, IPC=0.12(1/8.5) | Divide signed 64-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_du (__m256i a, __m256i b) | `xvdiv.du xr, xr, xr` | 3C5000/LA464: L=8, 18.5, IPC=0.11(1/9); 3A6000/LA664: L=8, IPC=0.25(1/4); 3C6000/LA664: L=8, 18.5, IPC=0.33(1/3) | Divide unsigned 64-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_h (__m256i a, __m256i b) | `xvdiv.h xr, xr, xr` | 3C5000/LA464: L=21.5, 22, IPC=0.08(1/13); 3A6000/LA664: L=17, IPC=0.12(1/8.5); 3C6000/LA664: L=34, 40, IPC=0.05(1/19) | Divide signed 16-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_hu (__m256i a, __m256i b) | `xvdiv.hu xr, xr, xr` | 3C5000/LA464: L=17, 21.5, IPC=0.07(1/15); 3A6000/LA664: L=17, 22, IPC=0.11(1/9); 3C6000/LA664: L=17, 21.5, IPC=0.13(1/7.5) | Divide unsigned 16-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_w (__m256i a, __m256i b) | `xvdiv.w xr, xr, xr` | 3C5000/LA464: L=11, 17.5, IPC=0.09(1/11.5); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=23.5, 30, IPC=0.13(1/7.5) | Divide signed 32-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvdiv_wu (__m256i a, __m256i b) | `xvdiv.wu xr, xr, xr` | 3C5000/LA464: L=11, 17.5, IPC=0.07(1/15); 3A6000/LA664: L=11, IPC=0.18(1/5.5); 3C6000/LA664: L=11, 17.5, IPC=0.22(1/4.5) | Divide unsigned 32-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvhaddw_d_w (__m256i a, __m256i b) | `xvhaddw.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 32-bit elements in `a` to even-positioned signed 32-bit elements in `b` to get 64-bit result. | | __m256i __lasx_xvhaddw_du_wu (__m256i a, __m256i b) | `xvhaddw.du.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 32-bit elements in `a` to even-positioned unsigned 32-bit elements in `b` to get 64-bit result. | | __m256i __lasx_xvhaddw_h_b (__m256i a, __m256i b) | `xvhaddw.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 8-bit elements in `a` to even-positioned signed 8-bit elements in `b` to get 16-bit result. | | __m256i __lasx_xvhaddw_hu_bu (__m256i a, __m256i b) | `xvhaddw.hu.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 8-bit elements in `a` to even-positioned unsigned 8-bit elements in `b` to get 16-bit result. | | __m256i __lasx_xvhaddw_q_d (__m256i a, __m256i b) | `xvhaddw.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add odd-positioned signed 64-bit elements in `a` to even-positioned signed 64-bit elements in `b` to get 128-bit result. | | __m256i __lasx_xvhaddw_qu_du (__m256i a, __m256i b) | `xvhaddw.qu.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Add odd-positioned unsigned 64-bit elements in `a` to even-positioned unsigned 64-bit elements in `b` to get 128-bit result. | | __m256i __lasx_xvhaddw_w_h (__m256i a, __m256i b) | `xvhaddw.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned signed 16-bit elements in `a` to even-positioned signed 16-bit elements in `b` to get 32-bit result. | | __m256i __lasx_xvhaddw_wu_hu (__m256i a, __m256i b) | `xvhaddw.wu.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Add odd-positioned unsigned 16-bit elements in `a` to even-positioned unsigned 16-bit elements in `b` to get 32-bit result. | | __m256i __lasx_xvhsubw_d_w (__m256i a, __m256i b) | `xvhsubw.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 32-bit elements in `a` by even-positioned signed 32-bit elements in `b` to get 64-bit result. | | __m256i __lasx_xvhsubw_du_wu (__m256i a, __m256i b) | `xvhsubw.du.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 32-bit elements in `a` by even-positioned unsigned 32-bit elements in `b` to get 64-bit result. | | __m256i __lasx_xvhsubw_h_b (__m256i a, __m256i b) | `xvhsubw.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 8-bit elements in `a` by even-positioned signed 8-bit elements in `b` to get 16-bit result. | | __m256i __lasx_xvhsubw_hu_bu (__m256i a, __m256i b) | `xvhsubw.hu.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 8-bit elements in `a` by even-positioned unsigned 8-bit elements in `b` to get 16-bit result. | | __m256i __lasx_xvhsubw_q_d (__m256i a, __m256i b) | `xvhsubw.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract odd-positioned signed 64-bit elements in `a` by even-positioned signed 64-bit elements in `b` to get 128-bit result. | | __m256i __lasx_xvhsubw_qu_du (__m256i a, __m256i b) | `xvhsubw.qu.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract odd-positioned unsigned 64-bit elements in `a` by even-positioned unsigned 64-bit elements in `b` to get 128-bit result. | | __m256i __lasx_xvhsubw_w_h (__m256i a, __m256i b) | `xvhsubw.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 16-bit elements in `a` by even-positioned signed 16-bit elements in `b` to get 32-bit result. | | __m256i __lasx_xvhsubw_wu_hu (__m256i a, __m256i b) | `xvhsubw.wu.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 16-bit elements in `a` by even-positioned unsigned 16-bit elements in `b` to get 32-bit result. | | __m256i __lasx_xvmadd_b (__m256i a, __m256i b, __m256i c) | `xvmadd.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 8-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmadd_d (__m256i a, __m256i b, __m256i c) | `xvmadd.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 64-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmadd_h (__m256i a, __m256i b, __m256i c) | `xvmadd.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 16-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmadd_w (__m256i a, __m256i b, __m256i c) | `xvmadd.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 32-bit elements in `b` and `c`, add to elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmaddwev_d_w (__m256i a, __m256i b, __m256i c) | `xvmaddwev.d.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwev_d_wu (__m256i a, __m256i b, __m256i c) | `xvmaddwev.d.wu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwev_d_wu_w (__m256i a, __m256i b, __m256i c) | `xvmaddwev.d.wu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwev_h_b (__m256i a, __m256i b, __m256i c) | `xvmaddwev.h.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwev_h_bu (__m256i a, __m256i b, __m256i c) | `xvmaddwev.h.bu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwev_h_bu_b (__m256i a, __m256i b, __m256i c) | `xvmaddwev.h.bu.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwev_q_d (__m256i a, __m256i b, __m256i c) | `xvmaddwev.q.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply even-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwev_q_du (__m256i a, __m256i b, __m256i c) | `xvmaddwev.q.du xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply even-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwev_q_du_d (__m256i a, __m256i b, __m256i c) | `xvmaddwev.q.du.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply even-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwev_w_h (__m256i a, __m256i b, __m256i c) | `xvmaddwev.w.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmaddwev_w_hu (__m256i a, __m256i b, __m256i c) | `xvmaddwev.w.hu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmaddwev_w_hu_h (__m256i a, __m256i b, __m256i c) | `xvmaddwev.w.hu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmaddwod_d_w (__m256i a, __m256i b, __m256i c) | `xvmaddwod.d.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwod_d_wu (__m256i a, __m256i b, __m256i c) | `xvmaddwod.d.wu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 32-bit elements in `b` and unsigned elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwod_d_wu_w (__m256i a, __m256i b, __m256i c) | `xvmaddwod.d.wu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 32-bit elements in `b` and signed elements in `c`, add to 64-bit elements in `a`. | | __m256i __lasx_xvmaddwod_h_b (__m256i a, __m256i b, __m256i c) | `xvmaddwod.h.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwod_h_bu (__m256i a, __m256i b, __m256i c) | `xvmaddwod.h.bu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 8-bit elements in `b` and unsigned elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwod_h_bu_b (__m256i a, __m256i b, __m256i c) | `xvmaddwod.h.bu.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 8-bit elements in `b` and signed elements in `c`, add to 16-bit elements in `a`. | | __m256i __lasx_xvmaddwod_q_d (__m256i a, __m256i b, __m256i c) | `xvmaddwod.q.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply odd-positioned signed 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwod_q_du (__m256i a, __m256i b, __m256i c) | `xvmaddwod.q.du xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply odd-positioned unsigned 64-bit elements in `b` and unsigned elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwod_q_du_d (__m256i a, __m256i b, __m256i c) | `xvmaddwod.q.du.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=1.14; 3A6000/LA664: L=7, IPC=1.14; 3C6000/LA664: L=7, IPC=1.14 | Multiply odd-positioned unsigned 64-bit elements in `b` and signed elements in `c`, add to 128-bit elements in `a`. | | __m256i __lasx_xvmaddwod_w_h (__m256i a, __m256i b, __m256i c) | `xvmaddwod.w.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmaddwod_w_hu (__m256i a, __m256i b, __m256i c) | `xvmaddwod.w.hu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 16-bit elements in `b` and unsigned elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmaddwod_w_hu_h (__m256i a, __m256i b, __m256i c) | `xvmaddwod.w.hu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 16-bit elements in `b` and signed elements in `c`, add to 32-bit elements in `a`. | | __m256i __lasx_xvmax_b (__m256i a, __m256i b) | `xvmax.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 8-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_bu (__m256i a, __m256i b) | `xvmax.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 8-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_d (__m256i a, __m256i b) | `xvmax.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise maximum for signed 64-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_du (__m256i a, __m256i b) | `xvmax.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise maximum for unsigned 64-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_h (__m256i a, __m256i b) | `xvmax.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 16-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_hu (__m256i a, __m256i b) | `xvmax.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 16-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_w (__m256i a, __m256i b) | `xvmax.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 32-bit elements in `a` and `b`. | | __m256i __lasx_xvmax_wu (__m256i a, __m256i b) | `xvmax.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 32-bit elements in `a` and `b`. | | __m256i __lasx_xvmaxi_b (__m256i a, imm_n16_15 imm) | `xvmaxi.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 8-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_bu (__m256i a, imm0_31 imm) | `xvmaxi.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 8-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_d (__m256i a, imm_n16_15 imm) | `xvmaxi.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise maximum for signed 64-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_du (__m256i a, imm0_31 imm) | `xvmaxi.du xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise maximum for unsigned 64-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_h (__m256i a, imm_n16_15 imm) | `xvmaxi.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 16-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_hu (__m256i a, imm0_31 imm) | `xvmaxi.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 16-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_w (__m256i a, imm_n16_15 imm) | `xvmaxi.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for signed 32-bit elements in `a` and `imm`. | | __m256i __lasx_xvmaxi_wu (__m256i a, imm0_31 imm) | `xvmaxi.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise maximum for unsigned 32-bit elements in `a` and `imm`. | | __m256i __lasx_xvmin_b (__m256i a, __m256i b) | `xvmin.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 8-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_bu (__m256i a, __m256i b) | `xvmin.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 8-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_d (__m256i a, __m256i b) | `xvmin.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise minimum for signed 64-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_du (__m256i a, __m256i b) | `xvmin.du xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise minimum for unsigned 64-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_h (__m256i a, __m256i b) | `xvmin.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 16-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_hu (__m256i a, __m256i b) | `xvmin.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 16-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_w (__m256i a, __m256i b) | `xvmin.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 32-bit elements in `a` and `b`. | | __m256i __lasx_xvmin_wu (__m256i a, __m256i b) | `xvmin.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 32-bit elements in `a` and `b`. | | __m256i __lasx_xvmini_b (__m256i a, imm_n16_15 imm) | `xvmini.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 8-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_bu (__m256i a, imm0_31 imm) | `xvmini.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 8-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_d (__m256i a, imm_n16_15 imm) | `xvmini.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise minimum for signed 64-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_du (__m256i a, imm0_31 imm) | `xvmini.du xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=4; 3C6000/LA664: L=2, IPC=4 | Compute elementwise minimum for unsigned 64-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_h (__m256i a, imm_n16_15 imm) | `xvmini.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 16-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_hu (__m256i a, imm0_31 imm) | `xvmini.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 16-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_w (__m256i a, imm_n16_15 imm) | `xvmini.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for signed 32-bit elements in `a` and `imm`. | | __m256i __lasx_xvmini_wu (__m256i a, imm0_31 imm) | `xvmini.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute elementwise minimum for unsigned 32-bit elements in `a` and `imm`. | | __m256i __lasx_xvmod_b (__m256i a, __m256i b) | `xvmod.b xr, xr, xr` | 3C5000/LA464: L=29, 33, IPC=0.05(1/21.5); 3A6000/LA664: L=29, 41, IPC=0.06(1/15.5); 3C6000/LA664: L=29, IPC=0.07(1/13.5) | Modulo residual signed 8-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_bu (__m256i a, __m256i b) | `xvmod.bu xr, xr, xr` | 3C5000/LA464: L=29, 37, IPC=0.05(1/22); 3A6000/LA664: L=29, 37, IPC=0.06(1/17.5); 3C6000/LA664: L=29, IPC=0.07(1/13.5) | Modulo residual unsigned 8-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_d (__m256i a, __m256i b) | `xvmod.d xr, xr, xr` | 3C5000/LA464: L=8, 10, IPC=0.11(1/9.5); 3A6000/LA664: L=8, 10, IPC=0.25(1/4); 3C6000/LA664: L=8, IPC=0.33(1/3) | Modulo residual signed 64-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_du (__m256i a, __m256i b) | `xvmod.du xr, xr, xr` | 3C5000/LA464: L=8, 10, IPC=0.11(1/9.5); 3A6000/LA664: L=8, 10, IPC=0.25(1/4); 3C6000/LA664: L=8, IPC=0.33(1/3) | Modulo residual unsigned 64-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_h (__m256i a, __m256i b) | `xvmod.h xr, xr, xr` | 3C5000/LA464: L=17, 21, IPC=0.07(1/13.5); 3A6000/LA664: L=17, 21, IPC=0.12(1/8.5); 3C6000/LA664: L=17, IPC=0.13(1/7.5) | Modulo residual signed 16-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_hu (__m256i a, __m256i b) | `xvmod.hu xr, xr, xr` | 3C5000/LA464: L=17, 23, IPC=0.06(1/16); 3A6000/LA664: L=17, 25, IPC=0.11(1/9.5); 3C6000/LA664: L=17, IPC=0.13(1/7.5) | Modulo residual unsigned 16-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_w (__m256i a, __m256i b) | `xvmod.w xr, xr, xr` | 3C5000/LA464: L=11, 15, IPC=0.07(1/13.5); 3A6000/LA664: L=11, 13, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5) | Modulo residual signed 32-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmod_wu (__m256i a, __m256i b) | `xvmod.wu xr, xr, xr` | 3C5000/LA464: L=11, 15, IPC=0.06(1/16); 3A6000/LA664: L=11, 13, IPC=0.18(1/5.5); 3C6000/LA664: L=11, IPC=0.22(1/4.5) | Modulo residual unsigned 32-bit elements in `a` by elements in `b`. | | __m256i __lasx_xvmsub_b (__m256i a, __m256i b, __m256i c) | `xvmsub.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 8-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmsub_d (__m256i a, __m256i b, __m256i c) | `xvmsub.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 64-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmsub_h (__m256i a, __m256i b, __m256i c) | `xvmsub.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 16-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmsub_w (__m256i a, __m256i b, __m256i c) | `xvmsub.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 32-bit elements in `b` and `c`, negate and add elements in `a`, save the result in `dst`. | | __m256i __lasx_xvmuh_b (__m256i a, __m256i b) | `xvmuh.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply signed 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`. | | __m256i __lasx_xvmuh_bu (__m256i a, __m256i b) | `xvmuh.bu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply unsigned 8-bit elements in `a` and `b`, save the high 8-bit result in `dst`. | | __m256i __lasx_xvmuh_d (__m256i a, __m256i b) | `xvmuh.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply signed 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`. | | __m256i __lasx_xvmuh_du (__m256i a, __m256i b) | `xvmuh.du xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply unsigned 64-bit elements in `a` and `b`, save the high 64-bit result in `dst`. | | __m256i __lasx_xvmuh_h (__m256i a, __m256i b) | `xvmuh.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply signed 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`. | | __m256i __lasx_xvmuh_hu (__m256i a, __m256i b) | `xvmuh.hu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply unsigned 16-bit elements in `a` and `b`, save the high 16-bit result in `dst`. | | __m256i __lasx_xvmuh_w (__m256i a, __m256i b) | `xvmuh.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply signed 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`. | | __m256i __lasx_xvmuh_wu (__m256i a, __m256i b) | `xvmuh.wu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply unsigned 32-bit elements in `a` and `b`, save the high 32-bit result in `dst`. | | __m256i __lasx_xvmul_b (__m256i a, __m256i b) | `xvmul.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvmul_d (__m256i a, __m256i b) | `xvmul.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvmul_h (__m256i a, __m256i b) | `xvmul.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvmul_w (__m256i a, __m256i b) | `xvmul.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvmulwev_d_w (__m256i a, __m256i b) | `xvmulwev.d.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwev_d_wu (__m256i a, __m256i b) | `xvmulwev.d.wu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwev_d_wu_w (__m256i a, __m256i b) | `xvmulwev.d.wu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwev_h_b (__m256i a, __m256i b) | `xvmulwev.h.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwev_h_bu (__m256i a, __m256i b) | `xvmulwev.h.bu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwev_h_bu_b (__m256i a, __m256i b) | `xvmulwev.h.bu.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwev_q_d (__m256i a, __m256i b) | `xvmulwev.q.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwev_q_du (__m256i a, __m256i b) | `xvmulwev.q.du xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwev_q_du_d (__m256i a, __m256i b) | `xvmulwev.q.du.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply even-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwev_w_h (__m256i a, __m256i b) | `xvmulwev.w.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvmulwev_w_hu (__m256i a, __m256i b) | `xvmulwev.w.hu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvmulwev_w_hu_h (__m256i a, __m256i b) | `xvmulwev.w.hu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply even-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvmulwod_d_w (__m256i a, __m256i b) | `xvmulwod.d.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwod_d_wu (__m256i a, __m256i b) | `xvmulwod.d.wu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwod_d_wu_w (__m256i a, __m256i b) | `xvmulwod.d.wu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvmulwod_h_b (__m256i a, __m256i b) | `xvmulwod.h.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwod_h_bu (__m256i a, __m256i b) | `xvmulwod.h.bu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwod_h_bu_b (__m256i a, __m256i b) | `xvmulwod.h.bu.b xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvmulwod_q_d (__m256i a, __m256i b) | `xvmulwod.q.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwod_q_du (__m256i a, __m256i b) | `xvmulwod.q.du xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwod_q_du_d (__m256i a, __m256i b) | `xvmulwod.q.du.d xr, xr, xr` | 3C5000/LA464: L=7, IPC=2; 3A6000/LA664: L=7, IPC=2; 3C6000/LA664: L=7, IPC=2 | Multiply odd-positioned unsigned 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvmulwod_w_h (__m256i a, __m256i b) | `xvmulwod.w.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvmulwod_w_hu (__m256i a, __m256i b) | `xvmulwod.w.hu xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvmulwod_w_hu_h (__m256i a, __m256i b) | `xvmulwod.w.hu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=2; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Multiply odd-positioned unsigned 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvneg_b (__m256i a) | `xvneg.b xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Negate 8-bit elements in `a` and save the result in `dst`. | | __m256i __lasx_xvneg_d (__m256i a) | `xvneg.d xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Negate 64-bit elements in `a` and save the result in `dst`. | | __m256i __lasx_xvneg_h (__m256i a) | `xvneg.h xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Negate 16-bit elements in `a` and save the result in `dst`. | | __m256i __lasx_xvneg_w (__m256i a) | `xvneg.w xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Negate 32-bit elements in `a` and save the result in `dst`. | | __m256i __lasx_xvsadd_b (__m256i a, __m256i b) | `xvsadd.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the signed 8-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_bu (__m256i a, __m256i b) | `xvsadd.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the unsigned 8-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_d (__m256i a, __m256i b) | `xvsadd.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the signed 64-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_du (__m256i a, __m256i b) | `xvsadd.du xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the unsigned 64-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_h (__m256i a, __m256i b) | `xvsadd.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the signed 16-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_hu (__m256i a, __m256i b) | `xvsadd.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the unsigned 16-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_w (__m256i a, __m256i b) | `xvsadd.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the signed 32-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsadd_wu (__m256i a, __m256i b) | `xvsadd.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating add the unsigned 32-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_b (__m256i a, __m256i b) | `xvssub.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the signed 8-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_bu (__m256i a, __m256i b) | `xvssub.bu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the unsigned 8-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_d (__m256i a, __m256i b) | `xvssub.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the signed 64-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_du (__m256i a, __m256i b) | `xvssub.du xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the unsigned 64-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_h (__m256i a, __m256i b) | `xvssub.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the signed 16-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_hu (__m256i a, __m256i b) | `xvssub.hu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the unsigned 16-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_w (__m256i a, __m256i b) | `xvssub.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the signed 32-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvssub_wu (__m256i a, __m256i b) | `xvssub.wu xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Saturating subtract the unsigned 32-bit elements in `a` and `b`, store the result to `dst`. | | __m256i __lasx_xvsub_b (__m256i a, __m256i b) | `xvsub.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 8-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvsub_d (__m256i a, __m256i b) | `xvsub.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 64-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvsub_h (__m256i a, __m256i b) | `xvsub.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 16-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvsub_q (__m256i a, __m256i b) | `xvsub.q xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract 128-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvsub_w (__m256i a, __m256i b) | `xvsub.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 32-bit elements in `a` and `b`, save the result in `dst`. | | __m256i __lasx_xvsubi_bu (__m256i a, imm0_31 imm) | `xvsubi.bu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 8-bit elements in `a` by `imm`, save the result in `dst`. | | __m256i __lasx_xvsubi_du (__m256i a, imm0_31 imm) | `xvsubi.du xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 64-bit elements in `a` by `imm`, save the result in `dst`. | | __m256i __lasx_xvsubi_hu (__m256i a, imm0_31 imm) | `xvsubi.hu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 16-bit elements in `a` by `imm`, save the result in `dst`. | | __m256i __lasx_xvsubi_wu (__m256i a, imm0_31 imm) | `xvsubi.wu xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Subtract 32-bit elements in `a` by `imm`, save the result in `dst`. | | __m256i __lasx_xvsubwev_d_w (__m256i a, __m256i b) | `xvsubwev.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvsubwev_d_wu (__m256i a, __m256i b) | `xvsubwev.d.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvsubwev_h_b (__m256i a, __m256i b) | `xvsubwev.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvsubwev_h_bu (__m256i a, __m256i b) | `xvsubwev.h.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvsubwev_q_d (__m256i a, __m256i b) | `xvsubwev.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract even-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvsubwev_q_du (__m256i a, __m256i b) | `xvsubwev.q.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract even-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvsubwev_w_h (__m256i a, __m256i b) | `xvsubwev.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvsubwev_w_hu (__m256i a, __m256i b) | `xvsubwev.w.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract even-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvsubwod_d_w (__m256i a, __m256i b) | `xvsubwod.d.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 32-bit elements in `a` and signed elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvsubwod_d_wu (__m256i a, __m256i b) | `xvsubwod.d.wu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 32-bit elements in `a` and unsigned elements in `b`, save the 64-bit result in `dst`. | | __m256i __lasx_xvsubwod_h_b (__m256i a, __m256i b) | `xvsubwod.h.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 8-bit elements in `a` and signed elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvsubwod_h_bu (__m256i a, __m256i b) | `xvsubwod.h.bu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 8-bit elements in `a` and unsigned elements in `b`, save the 16-bit result in `dst`. | | __m256i __lasx_xvsubwod_q_d (__m256i a, __m256i b) | `xvsubwod.q.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract odd-positioned signed 64-bit elements in `a` and signed elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvsubwod_q_du (__m256i a, __m256i b) | `xvsubwod.q.du xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Subtract odd-positioned unsigned 64-bit elements in `a` and unsigned elements in `b`, save the 128-bit result in `dst`. | | __m256i __lasx_xvsubwod_w_h (__m256i a, __m256i b) | `xvsubwod.w.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned signed 16-bit elements in `a` and signed elements in `b`, save the 32-bit result in `dst`. | | __m256i __lasx_xvsubwod_w_hu (__m256i a, __m256i b) | `xvsubwod.w.hu xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Subtract odd-positioned unsigned 16-bit elements in `a` and unsigned elements in `b`, save the 32-bit result in `dst`. | --- ## Logical | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvand_v (__m256i a, __m256i b) | `xvand.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise AND between elements in `a` and `b`. | | __m256i __lasx_xvandi_b (__m256i a, imm0_255 imm) | `xvandi.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise AND between elements in `a` and `imm`. | | __m256i __lasx_xvandn_v (__m256i a, __m256i b) | `xvandn.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise ANDN between elements in `a` and `b`. | | __m256i __lasx_xvnor_v (__m256i a, __m256i b) | `xvnor.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise NOR between elements in `a` and `b`. | | __m256i __lasx_xvnori_b (__m256i a, imm0_255 imm) | `xvnori.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise NOR between elements in `a` and `imm`. | | __m256i __lasx_xvor_v (__m256i a, __m256i b) | `xvor.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise OR between elements in `a` and `b`. | | __m256i __lasx_xvori_b (__m256i a, imm0_255 imm) | `xvori.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise OR between elements in `a` and `imm`. | | __m256i __lasx_xvorn_v (__m256i a, __m256i b) | `xvorn.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise ORN between elements in `a` and `b`. | | __m256i __lasx_xvxor_v (__m256i a, __m256i b) | `xvxor.v xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise XOR between elements in `a` and `b`. | | __m256i __lasx_xvxori_b (__m256i a, imm0_255 imm) | `xvxori.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute bitwise XOR between elements in `a` and `imm`. | --- ## Memory Load & Store | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvld (void * addr, imm_n2048_2047 offset) | `xvld xr, r, imm` | 未提供 | Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors. | | __m256i __lasx_xvldrepl_b (void * addr, imm_n2048_2047 offset) | `xvldrepl.b xr, r, imm` | 未提供 | Read 8-bit data from memory address `addr + (offset << 0)`, replicate the data to all vector lanes and save into `dst`. | | __m256i __lasx_xvldrepl_d (void * addr, imm_n256_255 offset) | `xvldrepl.d xr, r, imm` | 未提供 | Read 64-bit data from memory address `addr + (offset << 3)`, replicate the data to all vector lanes and save into `dst`. | | __m256i __lasx_xvldrepl_h (void * addr, imm_n1024_1023 offset) | `xvldrepl.h xr, r, imm` | 未提供 | Read 16-bit data from memory address `addr + (offset << 1)`, replicate the data to all vector lanes and save into `dst`. | | __m256i __lasx_xvldrepl_w (void * addr, imm_n512_511 offset) | `xvldrepl.w xr, r, imm` | 未提供 | Read 32-bit data from memory address `addr + (offset << 2)`, replicate the data to all vector lanes and save into `dst`. | | __m256i __lasx_xvldx (void * addr, long int offset) | `xvldx xr, r, r` | 未提供 | Read whole vector from memory address `addr + offset`, save the data into `dst`. Note that you can use this intrinsic to load floating point vectors, even though the return type represents integer vectors. | | void __lasx_xvst (__m256i data, void * addr, imm_n2048_2047 offset) | `xvst xr, r, imm` | 未提供 | Write whole vector data in `data` to memory address `addr + offset`. | | void __lasx_xvstelm_b (__m256i data, void * addr, imm_n128_127 offset, imm0_31 lane) | `xvstelm.b xr, r, imm, imm` | 未提供 | Store the 8-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lasx_xvstelm_d (__m256i data, void * addr, imm_n128_127 offset, imm0_3 lane) | `xvstelm.d xr, r, imm, imm` | 未提供 | Store the 64-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lasx_xvstelm_h (__m256i data, void * addr, imm_n128_127 offset, imm0_15 lane) | `xvstelm.h xr, r, imm, imm` | 未提供 | Store the 16-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lasx_xvstelm_w (__m256i data, void * addr, imm_n128_127 offset, imm0_7 lane) | `xvstelm.w xr, r, imm, imm` | 未提供 | Store the 32-bit element in `data` specified by `lane` to memory address `addr + offset`. | | void __lasx_xvstx (__m256i data, void * addr, long int offset) | `xvstx xr, r, r` | 未提供 | Write whole-vector data in `data` to memory address `addr + offset`. | --- ## Misc | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvpickve_w_f (__m256 a, imm0_7 imm) | `xvpickve.w xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Copy one 32-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero. | | __m256d __lasx_xvpickve_d_f (__m256d a, imm0_3 imm) | `xvpickve.d xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Copy one 64-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero. | | __m256i __lasx_vext2xv_d_b (__m256i a) | `vext2xv.d.b xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 8-bit lane of `a` to signed 64-bit elements. | | __m256i __lasx_vext2xv_d_h (__m256i a) | `vext2xv.d.h xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 16-bit lane of `a` to signed 64-bit elements. | | __m256i __lasx_vext2xv_d_w (__m256i a) | `vext2xv.d.w xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 32-bit lane of `a` to signed 64-bit elements. | | __m256i __lasx_vext2xv_du_bu (__m256i a) | `vext2xv.du.bu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 8-bit lane of `a` to unsigned 64-bit elements. | | __m256i __lasx_vext2xv_du_hu (__m256i a) | `vext2xv.du.hu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 16-bit lane of `a` to unsigned 64-bit elements. | | __m256i __lasx_vext2xv_du_wu (__m256i a) | `vext2xv.du.wu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 32-bit lane of `a` to unsigned 64-bit elements. | | __m256i __lasx_vext2xv_h_b (__m256i a) | `vext2xv.h.b xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 8-bit lane of `a` to signed 16-bit elements. | | __m256i __lasx_vext2xv_hu_bu (__m256i a) | `vext2xv.hu.bu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 8-bit lane of `a` to unsigned 16-bit elements. | | __m256i __lasx_vext2xv_w_b (__m256i a) | `vext2xv.w.b xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 8-bit lane of `a` to signed 32-bit elements. | | __m256i __lasx_vext2xv_w_h (__m256i a) | `vext2xv.w.h xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend signed 16-bit lane of `a` to signed 32-bit elements. | | __m256i __lasx_vext2xv_wu_bu (__m256i a) | `vext2xv.wu.bu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 8-bit lane of `a` to unsigned 32-bit elements. | | __m256i __lasx_vext2xv_wu_hu (__m256i a) | `vext2xv.wu.hu xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Extend unsigned 16-bit lane of `a` to unsigned 32-bit elements. | | __m256i __lasx_xvexth_d_w (__m256i a) | `xvexth.d.w xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend signed 32-bit elements in the higher half of `a` to 64-bit. | | __m256i __lasx_xvexth_du_wu (__m256i a) | `xvexth.du.wu xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend unsigned 32-bit elements in the higher half of `a` to 64-bit. | | __m256i __lasx_xvexth_h_b (__m256i a) | `xvexth.h.b xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend signed 8-bit elements in the higher half of `a` to 16-bit. | | __m256i __lasx_xvexth_hu_bu (__m256i a) | `xvexth.hu.bu xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend unsigned 8-bit elements in the higher half of `a` to 16-bit. | | __m256i __lasx_xvexth_q_d (__m256i a) | `xvexth.q.d xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend signed 64-bit elements in the higher half of `a` to 128-bit. | | __m256i __lasx_xvexth_qu_du (__m256i a) | `xvexth.qu.du xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend unsigned 64-bit elements in the higher half of `a` to 128-bit. | | __m256i __lasx_xvexth_w_h (__m256i a) | `xvexth.w.h xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend signed 16-bit elements in the higher half of `a` to 32-bit. | | __m256i __lasx_xvexth_wu_hu (__m256i a) | `xvexth.wu.hu xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend unsigned 16-bit elements in the higher half of `a` to 32-bit. | | __m256i __lasx_xvextl_q_d (__m256i a) | `xvextl.q.d xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend signed 64-bit elements in the lower half of `a` to 128-bit. | | __m256i __lasx_xvextl_qu_du (__m256i a) | `xvextl.qu.du xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extend unsigned 64-bit elements in the lower half of `a` to 128-bit. | | __m256i __lasx_xvextrins_b (__m256i a, __m256i b, imm0_255 imm) | `xvextrins.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extract one 8-bit element in `b` and insert it to `a` according to `imm`. | | __m256i __lasx_xvextrins_d (__m256i a, __m256i b, imm0_255 imm) | `xvextrins.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extract one 64-bit element in `b` and insert it to `a` according to `imm`. | | __m256i __lasx_xvextrins_h (__m256i a, __m256i b, imm0_255 imm) | `xvextrins.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extract one 16-bit element in `b` and insert it to `a` according to `imm`. | | __m256i __lasx_xvextrins_w (__m256i a, __m256i b, imm0_255 imm) | `xvextrins.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Extract one 32-bit element in `b` and insert it to `a` according to `imm`. | | __m256i __lasx_xvfrstp_b (__m256i a, __m256i b, __m256i c) | `xvfrstp.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `c`. | | __m256i __lasx_xvfrstp_h (__m256i a, __m256i b, __m256i c) | `xvfrstp.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `c`. | | __m256i __lasx_xvfrstpi_b (__m256i a, __m256i b, imm0_31 imm) | `xvfrstpi.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Find the first negative 8-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`. | | __m256i __lasx_xvfrstpi_h (__m256i a, __m256i b, imm0_31 imm) | `xvfrstpi.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Find the first negative 16-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`. | | __m256i __lasx_xvilvh_b (__m256i a, __m256i b) | `xvilvh.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 8-bit elements in higher half of `a` and `b`. | | __m256i __lasx_xvilvh_d (__m256i a, __m256i b) | `xvilvh.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 64-bit elements in higher half of `a` and `b`. | | __m256i __lasx_xvilvh_h (__m256i a, __m256i b) | `xvilvh.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 16-bit elements in higher half of `a` and `b`. | | __m256i __lasx_xvilvh_w (__m256i a, __m256i b) | `xvilvh.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 32-bit elements in higher half of `a` and `b`. | | __m256i __lasx_xvilvl_b (__m256i a, __m256i b) | `xvilvl.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 8-bit elements in lower half of `a` and `b`. | | __m256i __lasx_xvilvl_d (__m256i a, __m256i b) | `xvilvl.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 64-bit elements in lower half of `a` and `b`. | | __m256i __lasx_xvilvl_h (__m256i a, __m256i b) | `xvilvl.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 16-bit elements in lower half of `a` and `b`. | | __m256i __lasx_xvilvl_w (__m256i a, __m256i b) | `xvilvl.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Interleave 32-bit elements in lower half of `a` and `b`. | | __m256i __lasx_xvinsgr2vr_d (__m256i a, long int b, imm0_3 imm) | `xvinsgr2vr.d xr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Insert 64-bit element into lane indexed `imm`. | | __m256i __lasx_xvinsgr2vr_w (__m256i a, int b, imm0_7 imm) | `xvinsgr2vr.w xr, r, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Insert 32-bit element into lane indexed `imm`. | | __m256i __lasx_xvinsve0_d (__m256i a, __m256i b, imm0_3 imm) | `xvinsve0.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Insert the first 64-bit lane of `b` into lane indexed `imm` of `a`. | | __m256i __lasx_xvinsve0_w (__m256i a, __m256i b, imm0_7 imm) | `xvinsve0.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Insert the first 32-bit lane of `b` into lane indexed `imm` of `a`. | | __m256i __lasx_xvldi (imm_n1024_1023 imm) | `xvldi xr, imm` | 未提供 | Initialize `dst` using predefined patterns: - `imm[12:10]=0b000`: broadcast `imm[7:0]` as 8-bit elements to all lanes - `imm[12:10]=0b001`: broadcast sign-extended `imm[9:0]` as 16-bit elements to all lanes - `imm[12:10]=0b010`: broadcast sign-extended `imm[9:0]` as 32-bit elements to all lanes - `imm[12:10]=0b011`: broadcast sign-extended `imm[9:0]` as 64-bit elements to all lanes - `imm[12:8]=0b10000`: broadcast `imm[7:0]` as 32-bit elements to all lanes - `imm[12:8]=0b10001`: broadcast `imm[7:0] << 8` as 32-bit elements to all lanes - `imm[12:8]=0b10010`: broadcast `imm[7:0] << 16` as 32-bit elements to all lanes - `imm[12:8]=0b10011`: broadcast `imm[7:0] << 24` as 32-bit elements to all lanes - `imm[12:8]=0b10100`: broadcast `imm[7:0]` as 16-bit elements to all lanes - `imm[12:8]=0b10101`: broadcast `imm[7:0] << 8` as 16-bit elements to all lanes - `imm[12:8]=0b10110`: broadcast `(imm[7:0] << 8) \| 0xFF` as 32-bit elements to all lanes - `imm[12:8]=0b10111`: broadcast `(imm[7:0] << 16) \| 0xFFFF` as 32-bit elements to all lanes - `imm[12:8]=0b11000`: broadcast `imm[7:0]` as 8-bit elements to all lanes - `imm[12:8]=0b11001`: repeat each bit of `imm[7:0]` eight times, and broadcast the result as 64-bit elements to all lanes - `imm[12:8]=0b11010`: broadcast `(imm[7] << 31) \| ((1-imm[6]) << 30) \| ((imm[6] * 0x1F) << 25) \| (imm[5:0] << 19)` as 32-bit elements to all lanes - `imm[12:8]=0b11011`: broadcast `(imm[7] << 31) \| ((1-imm[6]) << 30) \| ((imm[6] * 0x1F) << 25) \| (imm[5:0] << 19)` as 64-bit elements to all lanes - `imm[12:8]=0b11100`: broadcast `(imm[7] << 63) \| ((1-imm[6]) << 62) \| ((imm[6] * 0xFF) << 54) \| (imm[5:0] << 48)` as 64-bit elements to all lanes | | __m256i __lasx_xvmskgez_b (__m256i a) | `xvmskgez.b xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 8-bit element in `a`, if the element is greater than or equal to zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvmskltz_b (__m256i a) | `xvmskltz.b xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 8-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvmskltz_d (__m256i a) | `xvmskltz.d xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 64-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvmskltz_h (__m256i a) | `xvmskltz.h xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 16-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvmskltz_w (__m256i a) | `xvmskltz.w xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 32-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvmsknz_b (__m256i a) | `xvmsknz.b xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | For each 8-bit element in `a`, if the element is non-zero, set one bit in `dst`, otherwise clear it. | | __m256i __lasx_xvpackev_b (__m256i a, __m256i b) | `xvpackev.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack even-positioned 8-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackev_d (__m256i a, __m256i b) | `xvpackev.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack even-positioned 64-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackev_h (__m256i a, __m256i b) | `xvpackev.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack even-positioned 16-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackev_w (__m256i a, __m256i b) | `xvpackev.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack even-positioned 32-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackod_b (__m256i a, __m256i b) | `xvpackod.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack odd-positioned 8-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackod_d (__m256i a, __m256i b) | `xvpackod.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack odd-positioned 64-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackod_h (__m256i a, __m256i b) | `xvpackod.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack odd-positioned 16-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpackod_w (__m256i a, __m256i b) | `xvpackod.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Collect and pack odd-positioned 32-bit elements in `a` and `b` and store `dst`. | | __m256i __lasx_xvpickev_b (__m256i a, __m256i b) | `xvpickev.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick even-positioned 8-bit elements in `b` first, then pick even-positioned 8-bit elements in `a`. | | __m256i __lasx_xvpickev_d (__m256i a, __m256i b) | `xvpickev.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick even-positioned 64-bit elements in `b` first, then pick even-positioned 64-bit elements in `a`. | | __m256i __lasx_xvpickev_h (__m256i a, __m256i b) | `xvpickev.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick even-positioned 16-bit elements in `b` first, then pick even-positioned 16-bit elements in `a`. | | __m256i __lasx_xvpickev_w (__m256i a, __m256i b) | `xvpickev.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick even-positioned 32-bit elements in `b` first, then pick even-positioned 32-bit elements in `a`. | | __m256i __lasx_xvpickod_b (__m256i a, __m256i b) | `xvpickod.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick odd-positioned 8-bit elements in `b` first, then pick odd-positioned 8-bit elements in `a`. | | __m256i __lasx_xvpickod_d (__m256i a, __m256i b) | `xvpickod.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick odd-positioned 64-bit elements in `b` first, then pick odd-positioned 64-bit elements in `a`. | | __m256i __lasx_xvpickod_h (__m256i a, __m256i b) | `xvpickod.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick odd-positioned 16-bit elements in `b` first, then pick odd-positioned 16-bit elements in `a`. | | __m256i __lasx_xvpickod_w (__m256i a, __m256i b) | `xvpickod.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Pick odd-positioned 32-bit elements in `b` first, then pick odd-positioned 32-bit elements in `a`. | | __m256i __lasx_xvpickve_d (__m256i a, imm0_3 imm) | `xvpickve.d xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Copy one 64-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero. | | __m256i __lasx_xvpickve_w (__m256i a, imm0_7 imm) | `xvpickve.w xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Copy one 32-bit lane from `a` specified by `imm` to the first lane of `dst`, and set the other lanes to zero. | | __m256i __lasx_xvrepl128vei_b (__m256i a, imm0_15 idx) | `xvrepl128vei.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvrepl128vei_d (__m256i a, imm0_1 idx) | `xvrepl128vei.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvrepl128vei_h (__m256i a, imm0_7 idx) | `xvrepl128vei.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvrepl128vei_w (__m256i a, imm0_3 idx) | `xvrepl128vei.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvreplgr2vr_b (int val) | `xvreplgr2vr.b xr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m256i __lasx_xvreplgr2vr_d (long int val) | `xvreplgr2vr.d xr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m256i __lasx_xvreplgr2vr_h (int val) | `xvreplgr2vr.h xr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m256i __lasx_xvreplgr2vr_w (int val) | `xvreplgr2vr.w xr, r` | 3C5000/LA464: L=N/A, IPC=1; 3A6000/LA664: L=N/A, IPC=1; 3C6000/LA664: L=N/A, IPC=1 | Repeat `val` to whole vector. | | __m256i __lasx_xvrepli_b (imm_n512_511 imm) | `xvldi xr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m256i __lasx_xvrepli_d (imm_n512_511 imm) | `xvldi xr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m256i __lasx_xvrepli_h (imm_n512_511 imm) | `xvldi xr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m256i __lasx_xvrepli_w (imm_n512_511 imm) | `xvldi xr, imm` | 未提供 | Repeat `imm` to fill whole vector. | | __m256i __lasx_xvreplve0_b (__m256i a) | `xvreplve0.b xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Repeat the first 8-bit lane from `a` to all lanes of `dst`. | | __m256i __lasx_xvreplve0_d (__m256i a) | `xvreplve0.d xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Repeat the first 64-bit lane from `a` to all lanes of `dst`. | | __m256i __lasx_xvreplve0_h (__m256i a) | `xvreplve0.h xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Repeat the first 16-bit lane from `a` to all lanes of `dst`. | | __m256i __lasx_xvreplve0_q (__m256i a) | `xvreplve0.q xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Repeat the first 128-bit lane from `a` to all lanes of `dst`. | | __m256i __lasx_xvreplve0_w (__m256i a) | `xvreplve0.w xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Repeat the first 32-bit lane from `a` to all lanes of `dst`. | | __m256i __lasx_xvreplve_b (__m256i a, int idx) | `xvreplve.b xr, xr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvreplve_d (__m256i a, int idx) | `xvreplve.d xr, xr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvreplve_h (__m256i a, int idx) | `xvreplve.h xr, xr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvreplve_w (__m256i a, int idx) | `xvreplve.w xr, xr, r` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Repeat the element in lane `idx` of `a` to fill whole vector. | | __m256i __lasx_xvsat_b (__m256i a, imm0_7 imm) | `xvsat.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp signed 8-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_bu (__m256i a, imm0_7 imm) | `xvsat.bu xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp unsigned 8-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_d (__m256i a, imm0_63 imm) | `xvsat.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp signed 64-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_du (__m256i a, imm0_63 imm) | `xvsat.du xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp unsigned 64-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_h (__m256i a, imm0_15 imm) | `xvsat.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp signed 16-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_hu (__m256i a, imm0_15 imm) | `xvsat.hu xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp unsigned 16-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_w (__m256i a, imm0_31 imm) | `xvsat.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp signed 32-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsat_wu (__m256i a, imm0_31 imm) | `xvsat.wu xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Clamp unsigned 32-bit elements in `a` to range specified by `imm`. | | __m256i __lasx_xvsigncov_b (__m256i a, __m256i b) | `xvsigncov.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | If the 8-bit element in `a` equals to zero, set the result to zero. If the signed 8-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m256i __lasx_xvsigncov_d (__m256i a, __m256i b) | `xvsigncov.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | If the 64-bit element in `a` equals to zero, set the result to zero. If the signed 64-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m256i __lasx_xvsigncov_h (__m256i a, __m256i b) | `xvsigncov.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | If the 16-bit element in `a` equals to zero, set the result to zero. If the signed 16-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | __m256i __lasx_xvsigncov_w (__m256i a, __m256i b) | `xvsigncov.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | If the 32-bit element in `a` equals to zero, set the result to zero. If the signed 32-bit element in `a` is positive, copy element in `b` to result. Otherwise, copy negated element in `b` to result. If `a` and `b` are the same vectors, it is equivalent to computing absolute value. | | int __lasx_xvpickve2gr_w (__m256i a, imm0_7 idx) | `xvpickve2gr.w r, xr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | long int __lasx_xvpickve2gr_d (__m256i a, imm0_3 idx) | `xvpickve2gr.d r, xr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned int __lasx_xvpickve2gr_wu (__m256i a, imm0_7 idx) | `xvpickve2gr.wu r, xr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Pick the `lane` specified by `idx` from `a` and store into `dst`. | | unsigned long int __lasx_xvpickve2gr_du (__m256i a, imm0_3 idx) | `xvpickve2gr.du r, xr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Pick the `lane` specified by `idx` from `a` and store into `dst`. | --- ## Permutation | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvperm_w (__m256i a, __m256i b) | `xvperm.w xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Permute words from `a` with indices recorded in `b` and store into `dst`. | | __m256i __lasx_xvpermi_d (__m256i a, imm0_255 imm) | `xvpermi.d xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=4; 3C6000/LA664: L=3, IPC=4 | Permute double words from `a` with indices recorded in `imm` and store into `dst`. ![](../diagram/xvpermi_d.svg) | | __m256i __lasx_xvpermi_q (__m256i a, __m256i b, imm0_255 imm) | `xvpermi.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2.67; 3C6000/LA664: L=3, IPC=2.67 | Permute quad words from `a` and `b` with indices recorded in `imm` and store into `dst`. ![](../diagram/xvpermi_q.svg) | | __m256i __lasx_xvpermi_w (__m256i a, __m256i b, imm0_255 imm) | `xvpermi.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`. ![](../diagram/xvpermi_w.svg) | --- ## Shift | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvbsll_v (__m256i a, imm0_31 imm) | `xvbsll.v xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute whole vector `a` shifted left by `imm * 8` bits. | | __m256i __lasx_xvbsrl_v (__m256i a, imm0_31 imm) | `xvbsrl.v xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Compute whole vector `a` shifted right by `imm * 8` bits. | | __m256i __lasx_xvrotr_b (__m256i a, __m256i b) | `xvrotr.b xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvrotr_d (__m256i a, __m256i b) | `xvrotr.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvrotr_h (__m256i a, __m256i b) | `xvrotr.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvrotr_w (__m256i a, __m256i b) | `xvrotr.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvrotri_b (__m256i a, imm0_7 imm) | `xvrotri.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvrotri_d (__m256i a, imm0_63 imm) | `xvrotri.d xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvrotri_h (__m256i a, imm0_15 imm) | `xvrotri.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvrotri_w (__m256i a, imm0_31 imm) | `xvrotri.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Rotate right the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsll_b (__m256i a, __m256i b) | `xvsll.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsll_d (__m256i a, __m256i b) | `xvsll.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsll_h (__m256i a, __m256i b) | `xvsll.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsll_w (__m256i a, __m256i b) | `xvsll.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvslli_b (__m256i a, imm0_7 imm) | `xvslli.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvslli_d (__m256i a, imm0_63 imm) | `xvslli.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvslli_h (__m256i a, imm0_15 imm) | `xvslli.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvslli_w (__m256i a, imm0_31 imm) | `xvslli.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical left shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsllwil_d_w (__m256i a, imm0_31 imm) | `xvsllwil.d.w xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift signed 32-bit elements in `a` by `imm` to signed 64-bit result. | | __m256i __lasx_xvsllwil_du_wu (__m256i a, imm0_31 imm) | `xvsllwil.du.wu xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift unsigned 32-bit elements in `a` by `imm` to unsigned 64-bit result. | | __m256i __lasx_xvsllwil_h_b (__m256i a, imm0_7 imm) | `xvsllwil.h.b xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift signed 8-bit elements in `a` by `imm` to signed 16-bit result. | | __m256i __lasx_xvsllwil_hu_bu (__m256i a, imm0_7 imm) | `xvsllwil.hu.bu xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift unsigned 8-bit elements in `a` by `imm` to unsigned 16-bit result. | | __m256i __lasx_xvsllwil_w_h (__m256i a, imm0_15 imm) | `xvsllwil.w.h xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift signed 16-bit elements in `a` by `imm` to signed 32-bit result. | | __m256i __lasx_xvsllwil_wu_hu (__m256i a, imm0_15 imm) | `xvsllwil.wu.hu xr, xr, imm` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Extend and shift unsigned 16-bit elements in `a` by `imm` to unsigned 32-bit result. | | __m256i __lasx_xvsra_b (__m256i a, __m256i b) | `xvsra.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsra_d (__m256i a, __m256i b) | `xvsra.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsra_h (__m256i a, __m256i b) | `xvsra.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsra_w (__m256i a, __m256i b) | `xvsra.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrai_b (__m256i a, imm0_7 imm) | `xvsrai.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrai_d (__m256i a, imm0_63 imm) | `xvsrai.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrai_h (__m256i a, imm0_15 imm) | `xvsrai.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrai_w (__m256i a, imm0_31 imm) | `xvsrai.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Arithmetic right shift the signed 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsran_b_h (__m256i a, __m256i b) | `xvsran.b.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsran_h_w (__m256i a, __m256i b) | `xvsran.h.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsran_w_d (__m256i a, __m256i b) | `xvsran.w.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrani_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvsrani.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrani_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvsrani.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m256i __lasx_xvsrani_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvsrani.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrani_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvsrani.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrar_b (__m256i a, __m256i b) | `xvsrar.b xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrar_d (__m256i a, __m256i b) | `xvsrar.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrar_h (__m256i a, __m256i b) | `xvsrar.h xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrar_w (__m256i a, __m256i b) | `xvsrar.w xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrari_b (__m256i a, imm0_7 imm) | `xvsrari.b xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrari_d (__m256i a, imm0_63 imm) | `xvsrari.d xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrari_h (__m256i a, imm0_15 imm) | `xvsrari.h xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrari_w (__m256i a, imm0_31 imm) | `xvsrari.w xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrarn_b_h (__m256i a, __m256i b) | `xvsrarn.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrarn_h_w (__m256i a, __m256i b) | `xvsrarn.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrarn_w_d (__m256i a, __m256i b) | `xvsrarn.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrarni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvsrarni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrarni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvsrarni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m256i __lasx_xvsrarni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvsrarni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrarni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvsrarni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrl_b (__m256i a, __m256i b) | `xvsrl.b xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrl_d (__m256i a, __m256i b) | `xvsrl.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrl_h (__m256i a, __m256i b) | `xvsrl.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrl_w (__m256i a, __m256i b) | `xvsrl.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrli_b (__m256i a, imm0_7 imm) | `xvsrli.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrli_d (__m256i a, imm0_63 imm) | `xvsrli.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrli_h (__m256i a, imm0_15 imm) | `xvsrli.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrli_w (__m256i a, imm0_31 imm) | `xvsrli.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Logical right shift the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrln_b_h (__m256i a, __m256i b) | `xvsrln.b.h xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrln_h_w (__m256i a, __m256i b) | `xvsrln.h.w xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrln_w_d (__m256i a, __m256i b) | `xvsrln.w.d xr, xr, xr` | 3C5000/LA464: L=2, IPC=1; 3A6000/LA664: L=2, IPC=2; 3C6000/LA664: L=2, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrlni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvsrlni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrlni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvsrlni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m256i __lasx_xvsrlni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvsrlni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrlni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvsrlni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrlr_b (__m256i a, __m256i b) | `xvsrlr.b xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 8-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrlr_d (__m256i a, __m256i b) | `xvsrlr.d xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrlr_h (__m256i a, __m256i b) | `xvsrlr.h xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrlr_w (__m256i a, __m256i b) | `xvsrlr.w xr, xr, xr` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, store the result to `dst`. | | __m256i __lasx_xvsrlri_b (__m256i a, imm0_7 imm) | `xvsrlri.b xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 8-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrlri_d (__m256i a, imm0_63 imm) | `xvsrlri.d xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrlri_h (__m256i a, imm0_15 imm) | `xvsrlri.h xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrlri_w (__m256i a, imm0_31 imm) | `xvsrlri.w xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by `imm`, store the result to `dst`. | | __m256i __lasx_xvsrlrn_b_h (__m256i a, __m256i b) | `xvsrlrn.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrn_h_w (__m256i a, __m256i b) | `xvsrlrn.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrn_w_d (__m256i a, __m256i b) | `xvsrlrn.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvsrlrni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, truncate to 8-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvsrlrni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, truncate to 64-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvsrlrni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, truncate to 16-bit and store the result to `dst`. | | __m256i __lasx_xvsrlrni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvsrlrni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, truncate to 32-bit and store the result to `dst`. | | __m256i __lasx_xvssran_b_h (__m256i a, __m256i b) | `xvssran.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssran_bu_h (__m256i a, __m256i b) | `xvssran.bu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssran_h_w (__m256i a, __m256i b) | `xvssran.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssran_hu_w (__m256i a, __m256i b) | `xvssran.hu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssran_w_d (__m256i a, __m256i b) | `xvssran.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssran_wu_d (__m256i a, __m256i b) | `xvssran.wu.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrani.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_bu_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrani.bu.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrani.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_du_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrani.du.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrani.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_hu_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrani.hu.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrani.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrani_wu_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrani.wu.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_b_h (__m256i a, __m256i b) | `xvssrarn.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_bu_h (__m256i a, __m256i b) | `xvssrarn.bu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_h_w (__m256i a, __m256i b) | `xvssrarn.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_hu_w (__m256i a, __m256i b) | `xvssrarn.hu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_w_d (__m256i a, __m256i b) | `xvssrarn.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarn_wu_d (__m256i a, __m256i b) | `xvssrarn.wu.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrarni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_bu_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrarni.bu.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrarni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_du_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrarni.du.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Arithmetic right shift (with rounding) the signed 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrarni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_hu_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrarni.hu.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrarni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrarni_wu_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrarni.wu.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Arithmetic right shift (with rounding) the signed 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_b_h (__m256i a, __m256i b) | `xvssrln.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_bu_h (__m256i a, __m256i b) | `xvssrln.bu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_h_w (__m256i a, __m256i b) | `xvssrln.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_hu_w (__m256i a, __m256i b) | `xvssrln.hu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_w_d (__m256i a, __m256i b) | `xvssrln.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrln_wu_d (__m256i a, __m256i b) | `xvssrln.wu.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrlni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_bu_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrlni.bu.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrlni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_du_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrlni.du.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrlni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_hu_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrlni.hu.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrlni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlni_wu_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrlni.wu.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_b_h (__m256i a, __m256i b) | `xvssrlrn.b.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_bu_h (__m256i a, __m256i b) | `xvssrlrn.bu.h xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` by elements in `b`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_h_w (__m256i a, __m256i b) | `xvssrlrn.h.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_hu_w (__m256i a, __m256i b) | `xvssrlrn.hu.w xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` by elements in `b`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_w_d (__m256i a, __m256i b) | `xvssrlrn.w.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrn_wu_d (__m256i a, __m256i b) | `xvssrlrn.wu.d xr, xr, xr` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` by elements in `b`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_b_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrlrni.b.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in signed 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_bu_h (__m256i a, __m256i b, imm0_15 imm) | `xvssrlrni.bu.h xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 16-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 8-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_d_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrlrni.d.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in signed 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_du_q (__m256i a, __m256i b, imm0_127 imm) | `xvssrlrni.du.q xr, xr, imm` | 3C5000/LA464: L=3, IPC=2; 3A6000/LA664: L=3, IPC=2; 3C6000/LA664: L=3, IPC=2 | Logical right shift (with rounding) the unsigned 128-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 64-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_h_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrlrni.h.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in signed 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_hu_w (__m256i a, __m256i b, imm0_31 imm) | `xvssrlrni.hu.w xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 32-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 16-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_w_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrlrni.w.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in signed 32-bit integer and store the result to `dst`. | | __m256i __lasx_xvssrlrni_wu_d (__m256i a, __m256i b, imm0_63 imm) | `xvssrlrni.wu.d xr, xr, imm` | 3C5000/LA464: L=4, IPC=1; 3A6000/LA664: L=4, IPC=2; 3C6000/LA664: L=4, IPC=2 | Logical right shift (with rounding) the unsigned 64-bit elements in `a` and `b` by `imm`, clamp to fit in unsigned 32-bit integer and store the result to `dst`. | --- ## Shuffling | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256i __lasx_xvshuf4i_b (__m256i a, imm0_255 imm) | `xvshuf4i.b xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Shuffle every four 8-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/xvshuf4i_b.svg) | | __m256i __lasx_xvshuf4i_d (__m256i a, __m256i b, imm0_255 imm) | `xvshuf4i.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Shuffle every four 64-bit elements in `a` and `b` with indices packed in `imm`, save the result to `dst`. ![](../diagram/xvshuf4i_d.svg) | | __m256i __lasx_xvshuf4i_h (__m256i a, imm0_255 imm) | `xvshuf4i.h xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Shuffle every four 16-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/xvshuf4i_h.svg) | | __m256i __lasx_xvshuf4i_w (__m256i a, imm0_255 imm) | `xvshuf4i.w xr, xr, imm` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=4; 3C6000/LA664: L=1, IPC=4 | Shuffle every four 32-bit elements in `a` with indices packed in `imm`, save the result to `dst`. ![](../diagram/xvshuf4i_w.svg) | | __m256i __lasx_xvshuf_b (__m256i a, __m256i b, __m256i c) | `xvshuf.b xr, xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Shuffle bytes from `a` and `b` with indices from `c`. Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics, they are placed in `a`. ![](../diagram/xvshuf_b.svg) | | __m256i __lasx_xvshuf_d (__m256i a, __m256i b, __m256i c) | `xvshuf.d xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Shuffle 64-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/xvshuf_d.svg) | | __m256i __lasx_xvshuf_h (__m256i a, __m256i b, __m256i c) | `xvshuf.h xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Shuffle 16-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/xvshuf_h.svg) | | __m256i __lasx_xvshuf_w (__m256i a, __m256i b, __m256i c) | `xvshuf.w xr, xr, xr` | 3C5000/LA464: L=1, IPC=2; 3A6000/LA664: L=1, IPC=2; 3C6000/LA664: L=1, IPC=2 | Shuffle 32-bit elements in `b` and `c` with indices from `a`, save the result to `dst`. ![](../diagram/xvshuf_w.svg) | --- ## Undocumented Intrinsics | 函数 | 汇编指令 | 延迟 / IPC 摘要 | 说明 | |------|----------|------------------|------| | __m256 __lasx_xvfscaleb_s (__m256 a, __m256i b) | `xvfscaleb.s xr, xr, xr` | 3C6000/LA664: L=4, IPC=2 | Compute IEEE754 scaleB of single precision floating point elements in `a` by integer elements in `b`. Currently undocumented. | | __m256d __lasx_xvfscaleb_d (__m256d a, __m256i b) | `xvfscaleb.d xr, xr, xr` | 3C6000/LA664: L=4, IPC=2 | Compute IEEE754 scaleB of double precision floating point elements in `a` by integer elements in `b`. Currently undocumented. | | __m256i __lasx_xvhseli_d (__m256i a, imm0_31 imm) | `xvhseli.d xr, xr, imm` | 3C5000/LA464: L=1, IPC=1; 3A6000/LA664: L=1, IPC=1; 3C6000/LA664: L=1, IPC=1 | Select double words from `a` with indices recorded in `imm` and store into `dst`. ![](../diagram/xvhseli_d.svg) | | __m256i __lasx_xvmepatmsk_v (int mode, int uimm5) | `xvmepatmsk.v xr, mode, uimm5` | 3C6000/LA664: L=N/A, IPC=4 | Compute pattern according to `mode`, then add `uimm5` to each element. | ---